Conduction channel configuration controlled digital and analog response in TiO₂-based inorganic memristive artificial synapses

Analog memristor technologies offer promising potential for in-memory computing applications.¹ In-memory computing is a state-of-the-art computer architecture that envisages data processing in the memory unit and thus overcomes data latency between memory and central processing units.¹ A memristor device has a facile top-electrode/metal oxide (switching layer)/bottom-electrode sandwiched architectonic rendering ultra-high-density circuits;² the recent effort has successfully fabricated cross-bar arrays having sub-15 nm cells.³ Moreover, such a small dimension and its low power operation could realize memristor–neuron coupling to enable the silicon–brain interface.^4,5

Several physical and chemical mechanisms have been proposed to explain the electron conduction in the memory cell, such as those based on metallic diffusion (electrochemical metallization), valence change, thermo-chemical, and interfacial coupling.^6–8 A valence change memristor is controlled by an electric field that induces the formation and rupture of oxygen vacancy filaments to switch the device On (state 1) and Off (state 0), respectively, also called memristive behavior.⁹ The formation of the filament is initiated by the creation of oxygen vacancies by ionizing the oxygen from the lattice of the oxide switching layer, and these vacancies grow from the cathode to anode while the oxygen ions drift to and are oxidized at the anode/switching layer interface; the electrons, then, can easily flow through this filament, enabling the device in a low resistance state (LRS, state 1).¹⁰ Conversely, the filament can be ruptured by re-ionizing the oxygen at the anode/switching layer interface to recombine with the vacancies, creating a conduction gap between the electrode and remnant of the filament and, hence, switching the device to a high resistance state (HRS, state 0).¹⁰ 

Furthermore, the formation and rupture of the filaments can be used by an electric stimulus having short pulses and small amplitude to exhibit multiple states (states beyond 1 and 0); consequently, the device can perform an analogous gradual rise and fall of conductance.¹¹ The gradual rise and fall of the conductance are called potentiation and depression, respectively, mimicking the mammalian brain's analogous synaptic weight response.¹² However, the fabrication of analog memristors requires careful design and optimization, which makes the manufacturing process greatly challenging; this is because memristor devices often show digital behavior instead of analog, where the conductance change occurs abruptly.¹³ 

Various designs have been proposed to achieve a reliable synaptic response but mostly focus on programming the pulse scheme¹¹ and engineering the switching materials such as bi-layering,¹⁴ doping,¹⁵ embedding with nanocrystals,¹⁶ and surface modification.¹⁷ These methods could indeed improve the synaptic response; however, the fundamental question of the relationship between the electron conduction and the structure of the filaments determining such analog and digital behavior in memristor devices is still less examined. In this work, we investigate the conduction channel configuration at the interface responsible for dictating the analog and digital response of the memristors. We explain the occurrence of digital-to-analog transformation in the device, and the conduction mechanism is also proposed by studying the phenomenon observed in devices having different thicknesses.

The device architecture and measurement setup are depicted in Figs. 1(a) and 1(b), respectively. A 15 nm TiN bottom electrode (BE) was deposited onto a Pt/Ti-coated Si-wafer substrate employing the atomic layer deposition technique. TiO₂ switching layer films with thicknesses of 16 and 25 nm were deposited onto the bottom electrode. Hereafter, TiN/Ti bilayer top electrodes (TEs) having a diameter of 250 µm were patterned onto the TiO₂ films using a metal shadow mask. The sheet resistance of the TiN electrodes is found to be less than 19 Ω/sq. The thicknesses of TiN and Ti are 50 and 15 nm, respectively. The TiO₂, TiN, and Ti films were deposited using a DC sputtering system from a Ti target in a mixture of Ar/O₂, Ar/N₂, and Ar ambience, respectively. The devices made with 16 and 25 nm thick TiO₂ films were denoted as D16 and D25, respectively. The electrical characteristics were investigated using an Agilent B1500A semiconductor analyzer. A voltage bias was applied to the top electrode while the bottom electrode was grounded; a current compliance (CC) was used during the positive bias voltage sweep to avoid permanent breakdown. For DC sweep, a negative bias of −1.4 V was used for all devices to switch the device Off. In the case of synaptic measurement, AC pulse schemes were used to induce the response by applying pulse amplitudes of −1.2 and 1 V for depression and potentiation, respectively, with a pulse width of 20 µs. Meanwhile, the pulse read was conducted using an amplitude of 0.1 V with a width of 1 ms. An epoch consists of 500 pulses of depression (D) and 500 pulses of potentiation (P). Note that the synaptic response test was conducted after several switching cycles. The element profile and defect were measured by x-ray photoelectron spectroscopy (XPS, PHI Quantera SXM).

The D16 device requires an electroforming process with a CC of 10 mA to activate the memristive behavior by switching the pristine resistance state to a low resistance state (LRS, On) with a positive bias of 2.7 V, as depicted in Fig. 1(c). Hereafter, the device can be switched to a high resistance state (HRS, Off) and low resistance state (LRS, On) by sweeping a negative bias voltage (called RESET) and a positive bias of ∼0.9 V (called SET). The synaptic behavior of the devices was initiated with a depression scheme after the devices were switched to the On state. It is found that the conductance of D16 is abruptly decreased during the first pulse, from ∼8 to 1 ms, and the conductance value saturates at ∼1 ms regardless of the continuous pulses [inset of Fig. 1(c)]; similarly, the conductance is abruptly increased to ∼9 ms during the first pulse of the potentiation scheme, and conductance saturates at this level. Note that pulse amplitudes of −1.2 V for depression and 1 V for potentiation are the minimum voltages to exhibit such conductance changes in D16. The abrupt conductance change indicates that the D16 device shows digital behavior and is unable to perform an analog synaptic response (denoted as D16CC10). However, the synaptic response can be observed after we carry out the switching process at a lower operating current (employing a CC of 2 mA for the SET process prior to the synaptic response test, denoted as D16CC2), as shown in Fig. 1(d). Figure 1(e) shows that D16CC2 is able to show gradual analogous conductance changes performing nine stable epochs (a total of 9000 pulses) with a dynamic range of ∼3.6 times.

The above-mentioned results brought us to question why a device that was initially operated using a high CC can be programmed to perform a digital-to-analog transformation by utilizing a low CC. To confirm the relationship between the operating current and switching transformation and whether such a phenomenon can occur in the reverse direction (analog-to-digital) by increasing the CC, we conducted the same experiment on a device having a thicker switching layer (D25). A thicker switching layer film provides enough pristine cell resistance that allows us to activate the memristive behavior at a lower CC.¹⁸ D25 requires an electroforming at a CC of 2 mA with a positive bias of 3.6 V, and thereafter, the RESET and SET processes can be performed at this current level, as depicted in Fig. 2(a). The forming voltage of D25 is higher than that of D16 due to the higher energy needed to construct the filament across the larger gap between the BE and TE.¹⁸ The D25 device is able to perform an analogous synaptic response by exhibiting gradual fall (depression) and rise (potentiation) of conductance due to the repeated pulses, as depicted in the inset of Fig. 2(a) (denoted as D25CC2). Hereafter, for comparison, we raised the CC of the SET process to 10 mA, and the device switches at this current level, as shown in Fig. 2(b) (denoted as D25CC10). Similar to the D16CC10 case [Fig. 1(c)], the high CC leads to an abrupt conductance change [inset of Fig. 2(b)]. The employment of the SET process with a high CC prior to the synaptic test degenerates the synaptic response in the D25 device; the conductance falls (during the depression) and rises (during potentiation) abruptly during the first few pulses, and their conductance level saturates thereafter [inset of Fig. 2(b)]. This abrupt characteristic can be classified as digital behavior. The epoch endurance of the D25CC10 exhibits highly nonlinear potentiation and depression with a larger dynamic range as compared to the D25CC2 device, as demonstrated in Figs. 2(c) and 2(d), indicating an analog-to-digital transformation phenomenon.

We observed that the rise and fall of conductance in D25CC2 are rather steep; this is because the pulse amplitudes were too high for this device. The synaptic linearity can be adjusted by simply varying the pulse amplitude,¹¹ as demonstrated in Fig. 3. The nonlinearity can be decreased to 42% by employing a pulse amplitude of −0.9 and 0.86 V for depression and potentiation, respectively. The linearity-dynamic range trade-off dilemma is commonly observed in analog synaptic memristor devices;¹⁹ when the pulse amplitudes decrease, the linearity increases while the dynamic range of the synaptic response decreases. Nonetheless, all of the pulse schemes show robust epoch endurance for more than 9000 pulses.

Several reports suggest that the thickness of the oxide material controls the switching characteristics of the device.^20–23 However, in our case, we observed that the switching characteristic (digital or analog) is dependent on the applied current level (CC) to construct the filament (forming/SET), not the thickness. The CC level dictates the number of electrons that can flow through the cell²⁴ and, thus, could determine the structure of the filament (size and shape) in the cell. We conduct curve-fitting on the LRS curves to elucidate the electron conduction mechanism in the devices, and the result is shown in Fig. 4; the LRS curves were taken from the SET process. The electron conduction in the devices that endure a SET process using a CC of 10 mA is dominated by Ohmic conduction (I α V).²⁵ Meanwhile, the ones using a CC of 2 mA have two mechanisms; the low and high voltage regions are dominated by Ohmic and Frenkel–Poole [log(I/V) α√V]²⁵ emissions, respectively. The schematic of the band diagram is shown in Figs. 4(c)–4(e).^26–28 In Ohmic conduction, a number of electrons are generated due to thermal excitation and move in the conduction band, whereas in Frenkel–Poole conduction, the electrons can hop from the traps to the conduction band owing to the high electric field.²⁵ The transition from single to double conduction mechanisms when the maximum operating current level of the device is changed from high (10 mA) to low (2 mA), or vice versa, indicates that the conduction channels (filament structure) of the two cases may be different.

The defect concentration in the switching layer, especially at the interface region where the switching mainly occurs, plays a role in determining the formation of the conduction channels;²⁹ hence, we carried out XPS analysis to elucidate the oxygen vacancy (Vo) defect distribution in the device. Figure 5(a) shows the depth-XPS spectra of the TiN/Ti/TiO₂/TiN (D25) stack. It is observed that the Ti layer scavenged some oxygen from the TiO₂ layer. We analyzed the O1s spectra of the TiO₂ at the top interface (near TE), middle, bottom interface (near BE) regions, and the result is shown in Fig. 5(b). The spectra can be deconvoluted into two distinct peaks centered at 529.8 and 531.9 eV owing to the oxygen concentration in the lattice (fully oxidized) and non-lattice (oxygen-deficient) regions, respectively.³⁰ The defect concentration was calculated by taking the ratio between non-lattice and lattice oxygen,³⁰ and it is found that the Vo concentration near the TE is high and it gradually decreases when closer to the BE; the Vo concentration at the top interface, middle, and bottom interface is 28.8%, 21.3%, and 14.9%, respectively.

Based on the above-mentioned results, we propose a conduction mechanism to explain the electrical phenomenon in the device, as depicted in Fig. 6. The pristine state of the TiO₂ layer has a high amount of Vo [Fig. 5(b)], and most of these pre-existing Vo drift to the BE during positive bias sweep and form a filament that grows from the BE to the TE; however, the employment of low CC (2 mA) is not sufficient to form a complete filament [Fig. 6(a)(i)]. Nevertheless, the electron can still flow through the abundant Vo defects that are scattered in the O-poor region at the Ti/TiO₂ interface [Fig. 5(b)]. Hence, we suggest that the conduction channel in a low CC scenario (D16CC2 and D25CC2) consists of an incomplete filament and a conducting bulk (homogeneous) configuration. At low voltage supply, a low number of electrons are injected into the cell, and the electrons can easily flow from the cathode to anode following the Ohmic conduction mechanism; however, at high voltage supply, the conducting bulk (homogeneous region) needs to accommodate the flow of a large number of electrons where most of the electrons hop through the traps (Vo) following the Frenkel–Poole emission mechanism (Fig. 4). This filamentary-homogeneous configuration helps the occurrence of analog characteristics. During depression [Fig. 6(a)(ii)], the negative amplitude pulses gradually ionize the pre-existing oxygen in the Ti layer $(12O2+2e−→Oi2−)$⁠, which were scavenged from TiO₂ (during the fabrication process), and then recombine with Vo defects in the O-poor region $(TiTix+2Vo2++2Oi2−→TiO2)$⁠. Conversely, the potentiation process is followed by continuous re-ionization of oxygen from the homogeneous region, and this oxygen drifts back to the Ti scavenger layer. Note that only a small number of electrons can be injected into the cell at each pulse since the operating current level in the device is low; hence, this condition further assists the moderate oxygen ionization and recombination processes. On the other hand, high CC (10 mA) is employed to SET the device, providing sufficient energy to repulse the Vo (including from the O-poor region at the top interface) toward the bottom electrode and forming a complete filament [Fig. 6(b)(i)]; moreover, since the operating current level in the device is high, a high electric field is generated in the cell, and it encourages the creation of new Vo defects (⁠$(Oox→Vo2++Oi2−)$ to accelerate the filament formation further, thus resulting some additional oxygen drift to the Ti scavenger layer. Hence, a single or a few negative pulses [during the depression scheme, Fig. 6(b)(ii)] are enough to ionize most of the pre-existing and additional oxygen in the Ti layer to rupture the filament, resulting in a large gap between the top interface and the apex of the remnant filament. The reverse process occurs in potentiation [Fig. 6(b)(iii)], and a high injection of electrons with a single or a few positive pulses can spontaneously rejuvenate the filament by re-ionizing the oxygen and repulsing them back to the Ti scavenger layer. The rupture and rejuvenation of the filament happen instantaneously [inset of Figs. 1(c) and 2(b)], and these processes result in large dynamic ranges [inset of Figs. 1(c) and 2(d)], which demonstrates digital characteristics.

The potentiation and depression curves of the D25CC2 device [inset of Fig. 2(a)] are steeper than those of the D16CC2 device [inset of Fig. 1(d)]; we assume that this is because the pristine resistance of the two devices is different (owing to the thickness effect), and hence, the electroforming results in different filament dimension. As observed in the electron conduction analysis [Figs. 4(a) and 4(b)], he slope of the D25CC2 device in the low voltage region is closer to the ideal ohmic relationship than that of D16CC2, and this could be due to a wider filament existing at the TiO₂/TiN bottom interface of D25CC2. Thus, the electron injection into D25CC2 is slightly easier and makes the synaptic weight change be more responsive (nonlinear) to the electrical pulse stimulus. Consequently, the employment of a pulse amplitude with a lower voltage (Fig. 3) for the synaptic operation helps enhance the linearity of the potentiation and depression curves.

Analog and digital memristors have different circuit functionalities due to their distinct electrical characteristics (operational speed, current level, voltage range, etc.). For example, digital memristors could be used for making content addressable memory, reconfigurable logic circuits and operations, digital gates, etc.; on the other hand, analog memristors could enable neuromorphic networks, chaos circuits, variable gain amplifiers, difference comparators, oscillators, etc.³¹ Hence, the realization of convertible digital–analog memristors could open broad opportunities in electronics, such as enabling simultaneously tunable and bypass-able filters³² and the design and implementation of mixed-signal circuits utilizing the same device technology. This technology could also allow for the implementation of a customizable balance between high-speed operation in the digital low resistive state and low power operation in the digital high resistive state.³³ 

In conclusion, the maximum operating current level determines the synaptic response of memristor devices. The devices that operate at high operating current exhibit digital behavior; conversely, the device exhibits analog behavior when it operates at low operating current. The employment of high current compliance encourages the formation of a complete filament conduction channel that connects the cathode and anode, and thus, the high electric field induces the movement of a high number of defects, promoting an instantaneous redox reaction during synaptic operations. On the other hand, a low operating current level results in the formation of filamentary-homogeneous configuration and induces analog behavior where each pulse stimulus can only ionize a small amount of oxygen during depression and potentiation, which occur in the homogeneous region. This study not only provides an insight into producing an analogous synaptic response of memristor devices but also offers a technique to realize convertible digital–analog memristors that could open broad capabilities in electronic circuits and systems.

This work was supported by the Ministry of Science and Technology, Taiwan (Grant No. MOST 109-2221-E-009-034-MY3), the NCTU Visiting Research Fellowship Program, the EPSRC Program (Grant No. EP/R024642/1), Project No. H2020-FETPROACT-2018-01 SYNCH, and EC Grant Agreement No. 101029535—MENESIS.