For over 15 years, the number of studies on graphene electronics has not ceased growing. The rich physics, a set of outstanding properties, and the envisioned range of potential applications have consolidated graphene as a research field in its own. In this Research Update, we address a specific case of graphene for electronics, epitaxial graphene on silicon carbide (SiC) substrates. This paper mainly focuses on the electronic interface of graphene with metals. The first part of this paper describes the most characteristic aspects of the growth of epitaxial graphene on SiC wafers, and the main techniques for graphene material characterization are presented first. The main objective of this paper is to gather and discuss the most representative studies on the graphene–metal interface and the strategies employed to obtain low values for the contact resistances, which is a key feature for achieving the best performance of any graphene electronic devices. To benchmark developments in specifically epitaxial graphene on SiC, we include the results on mechanically exfoliated graphene from HOPG, as well as chemical vapor deposition graphene. In the last part of this paper, relevant device architectures for electrically gating graphene are briefly discussed.

Isolating a single-atom thick sheet of high-quality graphite, graphene, and revealing its extraordinary electronic properties, has had a massive and unprecedented impact in electronics research. Initially, recalling a naïve promise of a potential substitute to silicon already started by the previous breakthrough of single walled carbon nanotubes, graphene also, and understandably, reactivated some skepticism. Yet, opportunities opened by graphene in and for electronics are intrinsically different and superior, and even after more than 15 years from its first realization, graphene is still surprising us with new possibilities, such as its recently revealed superconductivity.1 Accordingly, the implications and reach of prospects for graphene electronics, and actually not only for electronics, are prevalent.2,3

Simplistically presented, we were invited to think outside the silicon box,4 based on graphene potential, meaning to fully exploit, e.g., its linear dispersion and extreme charge carrier mobility values for new or truly advanced electronic devices (Fig. 1). Graphene would replace silicon as a key active element, whereas the device technology would still rely on integrating graphene on the/a silicon electronics platform. However, as for today, most of its fundamental discoveries and advances are only or often accomplished on exfoliated materials, which is not practical for real applications. While excellent quality graphene is routinely and since long produced by chemical vapor deposition (CVD),5 it is deposited extrinsically to the silicon substrate; therefore, costly and demanding transfer is required. Indeed, the processing sequence is currently the main limitation hindering the full deployment of graphene potential in electronics.

FIG. 1.

Electron energy bands of a single layer (a), symmetric double layer (b), and asymmetric double layer (c) of graphene. Reprinted with permission from T. Ohta et al., Science 313(5789), 951-954 (2006). Copyright 2006 AAAS.187 

FIG. 1.

Electron energy bands of a single layer (a), symmetric double layer (b), and asymmetric double layer (c) of graphene. Reprinted with permission from T. Ohta et al., Science 313(5789), 951-954 (2006). Copyright 2006 AAAS.187 

Close modal

Thinking beyond the actual silicon box, alternative substrate materials could be considered. For example, high frequency electronics are the niche for III–V semiconductor materials such as GaAs or Ge, while SiC, GaN, or diamond, additionally, outperforms for high power, high voltage applications.6 In many configurations, these wide bandgap (WBG) materials are epitaxially grown on a wafer, so early upon the announcement of graphene, particularly, the possibility of epitaxial graphene on SiC (EG–SiC) was pointed by the research community7–11 followed by SiC experts who showed that the graphitization of SiC in argon ambient produced higher quality, monolayer graphene films.12 Since 2004, EG–SiC has been used as a two-dimensional electron gas (2DEG) material,7,13 demonstrating basic properties such as an integer quantum Hall effect,14,15 thus opening the possibility to substitute GaAs metrology with a more practical quantum resistance standard based on EG–SiC.16 

In this Research Update, we cover two key aspects in the design and fabrication of any microelectronics devices. Indeed, electronic device making and ultimate performance do not only rely on the active layer quality, e.g., the transistor channel, but also a good electrical interface and electronic state control are crucial. Thus, we address the challenge of defining graphene–metal contact resistance and modulating the graphene charge carrier density using electrical fields or gates. The available literature is gathered for EG–SiC, which is the focus of this paper, while the subject is discussed or benchmarked against the works done with other graphene materials, such as CVD graphene or mechanically exfoliated graphite. First, before going to the point, we briefly summarize the basic aspects of the making of EG–SiC and its physical characteristics.

Using epitaxial graphene (EG) on SiC, also known as epigraphene,17–20 is a reliable route for wafer-scale integration of graphene-based electronics. Its major advantage is that large graphene sheets can be grown directly on electrically insulating SiC substrates. The growth process is compatible with standard complementary metal-oxide semiconductor (CMOS) technology, as it takes advantage of the catalyst- and transfer-free growth method and provides high crystal quality graphene. For instance, EG-based electronic devices showing high performance such as transistors,21,22 integrated circuits,23 biosensors,24 UV photodetectors,25 gas sensors,26 and programmable electrical systems for resistance metrology27 have been demonstrated. Comprehensively, conventional silicon microelectronics processing including ion implantation allows the controlled doping of SiC for its bandgap tuning, which can be effectively combined with EG growth for realizing local electrical gating.

Limited in the past by the poor quality of SiC wafers, the superior intrinsic properties of SiC are, specifically for 4H–SiC, which is most commonly used, a wide bandgap of 3.26 eV, a high-breakdown electric field of 2.2 MV/cm when the electric field EB is perpendicular to the c-axis and 2.8 MV/cm when EB is parallel to the c-axis, good thermal conductivity around 3.3 W/K cm–4.9 W/K cm, and high saturated electron velocity 2.2 · 107 cm/s. Accordingly, it is justified as the interest of the power semiconductor industry for the SiC material. The major efforts have notably improved SiC crystal quality and increased the size of wafers during the last few years. Precisely, a drastic decrease in the number of defects such as micropipe density (<1 cm−2) has been accompanied by an increase in the wafer size up to the 6-in. diameter wafers, which are currently used for the industrial production of power devices.

Unlike common thin film epitaxial growth techniques employed in microelectronic fabrication, where micrometer thick or nanometer thin layers are directly deposited on top of buffer substrates or layers by the extrinsically added material, the nucleation of EG on SiC results from the thermal decomposition of the same SiC crystal surface occurring at high temperatures. Process temperatures typically range from 1500 °C to 2000 °C. The key phenomenon is to take advantage of the higher sublimation rate of silicon (Si) atoms compared to carbon (C) atoms upon the thermal treatment in a vacuum, Ar ambient28,29 or under N2, and Si fluxes30 due to its higher vapor pressure. Under these conditions, excess of carbon atoms on the surface of SiC tend to nucleate and form graphitic arrangements; thus, SiC can be covered with single, few, or multilayer graphene layers. Actually, this process, which can also be called graphitization of SiC, is known since the 1960s,31,32 and usually required the use of specific airtight furnaces with a controlled inert gas environment (e.g., Ar).

A particular feature of SiC is the existence of a number of different polytypes,33 yet hexagonal ones, 4H–SiC and 6H–SiC substrates, are mostly used in EG–SiC fabrication for two reasons. First, in principle, they provide the best lattice match for the subsequent graphene growth, i.e., it would act as most suitable templates for epitaxial growth. Additionally, the most high-quality wafers with controlled doping and low density of defects are commercially available for both 4H–SiC and 6H–SiC, specifically. However, the EG deposition is far from simple, and a number of issues arise, which are described later.

As introduced, the growth of EG on SiC is based, in essence, on the decomposition of the SiC crystal surface; thus, the final result is affected by the physics of sublimation, as well as the morphology aspects, such as the reconstruction or subsequent formation of, for instance, micrometer-width terraces and nanometer-height steps.34 Ideally, thermodynamics can be precisely controlled, yet similar to the imperfections of polycrystalline Cu foils used in CVD graphene, the starting SiC surface at the atomic scale is also crucial. Surface conditioning of commercial SiC wafers requires dedicated optical polishing and chemical mechanical polishing (OP and CMP, respectively), which is significantly more expensive than for Si wafers while providing the lower-quality results. The reasons are the chemical stability and extreme hardness of SiC that make the planarization processes difficult, leaving scratches and residuals over the SiC surface, while an unintentionally off-axis cut (miscut) from the basal c-plane, which can be as high as ±0.5°, promotes the formation of atomic step-terraces with the height of several cells.35 Additionally, prior to the EG thermal process, surface conditioning includes that, first, organic residues are usually removed from the substrate by rinsing the substrate in acetone. Immersion in isopropyl alcohol leaves the substrate clean of acetone residues and other inorganic molecules. Finally, the native oxide layer is etched by a subsequent dip in dilute HF solution. Standard RCA cleaning,36 which consists of four steps and is routinely used for Si wafer treatment in semiconductor fabrication, has also been applied for preparing the SiC wafer surface. However, analysis with x-ray photoelectron spectroscopy (XPS) showed that after RCA treatment, fluorine was chemically bound to carbon in SiC. Additionally, computer simulations proved that the bandgap of SiC became narrower after RCA cleaning.37 

A way to improve the imperfections of the SiC surface and control growth is to add an extra in situ conditioning of the SiC surface, e.g., consisting in a certain thermal annealing step before the EG growth step. For example, it can consist of the surface etching of the Si face of SiC wafers by using a hydrogen–gaseous mixture at a lower temperature value than that required for SiC thermal sublimation, typically ranging from 1200 °C to 1400 °C.38 This hydrogen etching process compensates polishing damage, leaving instead a microstructured surface of well-defined flat terraces with height and width values typically of few Å and few hundred nm, respectively. However, the final result strongly depends on a number of experimental conditions and variables,39 including random small variations from wafer providers such as actual or inhomogeneous miscut angle of SiC.40 

As for EG deposition, the formation of graphene is definitely a non-trivial process. A major factor is, for example, that the subsequent nucleation of EG is influenced by both the atomic termination (Si or C polarity, as well as terrace vs step) (Fig. 2) and the crystallographic planes (e.g., degree of miscut) of the given SiC wafer.41 On the Si-terminated (0001) surface [Fig. 2(a)], the SiC surface is reconstructed upon atomic species sublimation at high temperatures, producing a (6√3 × 6√3)R30° hexagonal carbon layer with sp3-hybridized sites. This rearrangement is the so-called buffer layer and implies that C atoms are covalently bonded to the SiC substrate. Accordingly, this atom-thick C layer does not exhibit the extreme charge-carrier transport properties of ideal or pristine graphene whose crystal lattice atoms are exclusively sp2-hybridized.42 When temperature is increased, SiC decomposition continues; therefore, the buffer layer turns into graphene while, underneath, SiC is covered by a new buffer layer.

FIG. 2.

(a) HR-TEM micrograph of the cross section of EG grown on the Si face of 4H–SiC, processed at the IMB-CNM-CSIC. Terraces covered by SLG or BLG, while the step is covered by multiple layers (FLG), are the typical results. (b) Top view SEM micrograph of a SLG flake deposited on the C face of 4H–SiC. By using the graphite cap method, higher control on SiC decomposition and, thus, the formation of highly crystalline SLG or BLG flakes can be obtained. Sample has been prepared at the IMB-CNM-CSIC.

FIG. 2.

(a) HR-TEM micrograph of the cross section of EG grown on the Si face of 4H–SiC, processed at the IMB-CNM-CSIC. Terraces covered by SLG or BLG, while the step is covered by multiple layers (FLG), are the typical results. (b) Top view SEM micrograph of a SLG flake deposited on the C face of 4H–SiC. By using the graphite cap method, higher control on SiC decomposition and, thus, the formation of highly crystalline SLG or BLG flakes can be obtained. Sample has been prepared at the IMB-CNM-CSIC.

Close modal

As mentioned above, the SiC surface is decomposed in terraces and step-edges, which in this case, are perpendicular to, respectively, (0001) and (110¯n) planes, where −n is an integer.40 It is found that the graphene nucleation over the latter is faster than over the (0001) basal planes.43 Moreover, Si and C atoms located on surface step facets present a larger dangling bond density value than the counterparts on basal planes. As a result, Si atoms desorb faster over the step-edges, giving rise to the nucleation of few substrate-decoupled graphene sheets, while terraces can still remain free of graphene. The propagation of graphene growth is favored at both the top and bottom parts of the edge, eventually forming a continuous layer along the step/terrace junction. Although the graphene growth over the terrace is self-limited to a few layers in the range of 1–3, multiple-layered graphene (∼10 layers) is formed over (110¯n) planes. Relevantly, the presence of the buffer layer is characteristic only on the terraces, leading to discontinuous charge carrier transport, i.e., a local decrease in carrier mobility (μ) value44 (up to 3000 cm2 V−1 s-−1 for T = 0.3 K in the patterned Hall bars) or a strong n-doping of the first layer of graphene.

Yet, to overcome buffer layer implications and limitations in EG grown on the Si face of SiC, hydrogen intercalation has proven to be a reliable route for decoupling the buffer layer from the substrate.45,46 The flow of molecular hydrogen at high temperatures (∼700 °C) leads to the migration of hydrogen atoms, being able to break the bonds between C and Si atoms, form Si–H bonds, and lift the buffer layer so that it displays the electronic properties of a quasi-free-standing graphene monolayer (QFSML).45,47,48 As a result, doping carrier density is reduced and carrier mobility significantly increases in the order of 2–4 times, specifically, up to μ≈11 000 cm2 V−1 s−1 for T = 0.3 K.44 Hydrogen can be subsequently desorbed by increasing the annealing temperature (>850 °C), and therefore, the decoupling process can be made reversible.45 

Apart from the atomic termination, the crystallographic planes, and the surface orientation of the given SiC wafer, the quality of epigraphene significantly depends on the growing conditions and environment. EG growing is done in vertical or horizontal graphite crucibles, inside of a heated chamber in order to preserve the homogeneity of temperature and controllability of pressure, usually in Ultra High Vacuum (UHV) or in Ar ambient.17,49 The most common graphite crucibles are Iso-statically pressed (ISP) graphite and glassy graphite. The first is porous so it shows high permeability to gases compared to the latter, which is impermeable, providing a cleaner furnace environment, for a longer time, and eliminating any unwanted contamination.50 Another crucial factor in the quality of epigraphene is the growing environment. In the UHV environment, the pressure during the growing process is often lower than the base pressure because of the degassing of the heating elements and the sample holders.51 The higher the temperatures, the more the residual gases could affect the quality of the formed EG, as they become more reactive. The presence of water molecules during growth is the most important factor, as it reacts with carbon and forms hydrogen, during all stages of the growth process, i.e., inducing defects on the graphitic carbon. On the other hand, growing in Ar ambient reduces the rate of water and carbon reaction, as it lowers the relative amount of hydrogen. As a result, it is demonstrated that the quality of the produced EG is higher.50 Furthermore, the presence of Ar lowers the sublimation rate of Si allowing the use of higher temperatures during growth. This leads to a more uniform growth by which the resulting epigraphene has proven to be of better quality, including lower roughness than epigraphene grown under UHV.12,50,51 However, it is mandatory for the Ar gas to be of the highest purity for reaching a chemical element purity similar to a UHV processing. That is to say, the higher the impurities in Ar gas, the larger the amount of present water, thus resulting in lower EG quality. Actually, water may become the dominant gas when the growing time increases. For this reason, processes of shorter time and increased temperature are preferred for better epigraphene quality.50 

The assisted EG growth, applying the CVD technique, is an alternative method for growing EG on the Si face of SiC.52,53 The main difference compared to standard growth based on simple SiC thermal decomposition is that an extrinsic carbon precursor is supplied into the process chamber, e.g., by flowing a hydrocarbon gas such as propane. While step-bunching and macro-step formation are also characteristic of CVD EG samples, the interaction between the first carbon layer and SiC is reported to differ significantly as compared to conventional EG grown on the Si face of SiC. As already introduced above, in the latter case, graphene is strongly pinned to the substrate, while in the CVD-assisted graphene on SiC, it seems to exhibit weaker pinning. This result has been characterized via Raman spectroscopy investigation, particularly, based on a red shift relaxation of the 2D band54 from ∼2740 cm−1 to ∼2700 cm−1 typically found in, respectively, a standard sublimation-based EG vs the CVD assisted graphene deposition. This Raman band shift has been ascribed to the release of the strain in graphene growth mediated by CVD (see more details on the Raman technique below).

As for EG growth on the basal plane (000-1) SiC, that is, C-terminated SiC polarity, the EG deposition and characteristics differ significantly from the Si-face [Fig. 2(b)]. Graphene nucleation on the C-face is not self-limited, and many graphene layers (graphitization) can be formed on the SiC surface.55,56 EG formation follows a three-dimensional island growth mechanism (the so-called Volmer–Weber growth), and as a result, the stack of multiple-layer graphene can be quite inhomogeneous even at the micronic scale. The main advantage of this option is that the first graphene layer is weakly coupled to the SiC surface, or what is called free standing or, essentially, decoupled graphene.57 Therefore, single and few-layer graphene regions directly grown on the C-face exhibit electronic properties similar to van der Waals or sp2-hybridized carbon films, relevantly, which can reach the outstanding charge carrier mobility values. Quantitatively, compared to the values reported on Si-face EG, typically ∼10 times higher values are easily reported on C-face EG.11 The early stage formation of graphene on the C-face takes place at high temperatures (>1400 °C) and facilitated by localized nucleation centers, i.e., it can be often identified with defects located over the terraces and step-edges. It is considered that Si atoms are early ejected from these defect sites, being desorbed perpendicular to the (000-1) surface, and consequently, graphene flakes are preferentially formed in these valleys. After this initial trigger, SiC decomposition changes and graphene propagates radially until, e.g., multiple-graphene layers originated from two adjacent voids coalesce, tending to form nanometer-height wrinkles.

The major difficulty of EG growth on C-face SiC is to prevent the high sublimation rate.58,59 Yet, a certain control can be actually achieved via local confinement. It consists of partial pressure containment of Si sublimated atoms by using a cap (e.g., made of graphite or SiC) over the sample surface upon thermal decomposition59–62 even under UHV conditions. Sometimes, this so-called confinement controlled sublimation (CCS) method allows, for example, growing large (∼100 μm long and ∼5 μm wide) isolated single layer graphene ribbons60,63 of monolayer graphene showing large domains of extremely flat topography, eventually disturbed in the presence of 1 nm–10 nm height wrinkles with a trigonal structure.

At this point, it is clear that far from the ideal picture of graphene as a single-atom thick, atomically flat, perfect arrangement of densely packed carbon atoms in a honeycomb structure, synthetic graphene shows several morphological and structural features (e.g., number of layers), imperfections (e.g., finite crystal domain size), defects (wrinkles, vacancies, etc.), and substrate effects. Also related to the substrate, and even if not required originally, the possibility to transfer EG has actually been developed by several routes successfully,64–66 therefore, spawning the possibilities of EG applications, for example, for flexible electronics. Ultimately, as it has been mentioned, for instance, when distinguishing the Si-face from C-face EG on SiC, all these aspects experimentally affect its intrinsic electronic characteristics, i.e., they can strongly manifest in electronic and electrical performance. For completeness, we briefly summarize most suitable and popular characterization techniques as follows.

The most common characterization methods used in the batch making of graphene materials and electronic devices are Raman spectroscopy, Scanning Electron Microscopy (SEM), and Atomic Force Microscopy (AFM), while Transmission Electron Microscopy (TEM) or optical microscopy is also employed when, respectively, a finer understanding of synthesis and performance aspects or, reversely, general survey are required. Actually, optical microscopy is usually used after graphene growth in order to test rapidly with a wide field of view the uniformity of the film and identify from the change of contrast the number of graphene layers. Its low spatial resolution though limits its use as it is not always easy or universal to determine exactly the number of layers or the thickness of graphene film.67 Other techniques such as X-ray Photoelectron Spectroscopy (XPS) analysis and Scanning Tunneling Microscopy (STM) provide information about the electronic structure of the graphene’s surface68 and nanoscale electrical characterization,69 respectively. In fact, the XPS method can reveal the chemical purity and the structural integrity of graphene films, e.g., before and even during cleaning treatments.70 Differently, STM provides the topography image with sub-atomic resolution, while it can give access to the electronic density of states (DOS) with energy resolution as low as ∼0.1 meV, which makes this method suitable for studying low energy excitation phenomena.71,72 In EG on SiC substrates, STM is used to study the effect of substrate steps/facets, as well as the effect of the lateral inhomogeneity in the number of graphene layers (e.g., monolayer/bilayer junctions) on the local resistance of epitaxial graphene films.69 Although these techniques provide useful information, they are not commonly used as they often have limited access, are more complex and time consuming compared to other characterization methods, or are not so practical for some of the distinctive graphene features. As a rule, a combination of at least two characterization methods provides the most complete information about the quality of graphene films and other features in order to be applied or assess the fabrication of graphene electronic devices.

Undeniably, Raman spectroscopy is a most convenient tool for materials characterization as it is a fast, non-destructive, and high-throughput technique and very powerful to determine both the structure and the quality of graphene.73,74 The Raman spectrum of pristine graphene has three signature peaks. Their bands are referred to as D, G, and 2D and located at ∼1350 cm−1, ∼1580 cm−1, and ∼2700 cm−1 Raman shifts, respectively. The peaks’ intensity ratio can be used to investigate the defects and the number of layers in graphene sheets. The D band is very weak in the case of high-quality graphene but increases with the number of defects in the graphene sheet.75 In fact, the ID/IG ratio accounts for the defects in the graphene film, which includes features such as vacancies, functionalization, or finite domain size, and its value can be even used to estimate defects’ amount or density. I2D/IG in combination with the position and shape of the 2D peak is used for determining the number of layers. With the increasing number of layers, the ratio I2D/IG decreases, as 2D peak intensity is lower, FWHM widens, and its position is red shifted.76–78 Actually, the shifts of the Raman bands can be precisely correlated with uniaxial and biaxial strains and are a distinctive feature of EG on SiC Raman spectra, which provides relevant and accurate information to study and understand the local characteristics of EG.79 

Another method to determine unequivocally the number of layers is TEM, which is also very important in the basic investigation of structural quality of graphene [Fig. 2(a)].73 For the determination of graphene layers, the electron beam is focused on the folding edge of the graphene flake, which has been transferred to a TEM grid, while the cross-sectional view is most suitable on EG on SiC to study the SiC–graphene interface but requires lamella preparation. With bright field High Resolution TEM (HRTEM) images, one can determine the thickness of graphene flakes even in folded or wrinkled samples, while diffraction can also assess top view inspection.80 Even more, aberration corrected HRTEM exhibits high spatial and temporal resolution providing information down to atomic scale defects on the graphene flake.81 Yet, low yield, complexity, and cost make TEM impractical for routine quality control.

Differently, SEM is a fast and non-invasive method mostly used for the investigation of surface morphology of graphene sheets as it allows observing features such as wrinkles, folds, cracks, or even residues from transfer processes [Fig. 2(b)]. Both in-lens and backscattered electron detectors are used, but in-lens images have higher contrast, providing better information, such as local variations of the number of graphene layers.67,82,83 In a recent development, a dark field imaging technique was implemented in a conventional SEM, which achieved significant contrast, and relevantly, it enabled the mapping of lattice orientation in graphene monolayers and exact misorientation of twisted bilayers,84 which is a very relevant and specific feature of graphene with superconducting characteristics.

Complementary to SEM, AFM is a type of scanning probe microscopy, and it is proven to be a most accurate way to visualize graphene surface topography. AFM is especially relevant and convenient for EG, given the central role of SiC thermal decomposition and how topography affects EG electronic properties. Additionally, applying specific implementation modes, AFM can give insights into the mechanical and electrical properties of graphene as well as the surface characteristics with very high spatial resolution and sensitivity.85 Practically, AFM has low throughput, and its application, e.g., for unequivocally determining the number of graphene layers is limited due to, among other reasons, variations in the interactions of graphene–substrate and AFM probe–graphene, such as depending on the substrate surface energy, the sample preparation, or the graphene structure.73,77 Yet, very recently, Peak Force Tapping (PFT) came up, which is a method that combines the advantages of the so-called tapping mode with linear piconewton force control giving nanomechanical information with very high accuracy.86 In fact, it has been shown that it is possible to accurately measure graphene height if a certain high value of applied force is employed in PFT inspection.77 

One of the key aspects in any semiconductor technology is the formation of an ohmic contact in the metal–semiconductor interface, i.e., resistive conduction, with as much low contact resistance to minimize losses. Similar to other WBG semiconductors, the technology and processing of silicon carbide is more complex than for silicon.

In silicon, depositing a properly selected metal, like aluminum, directly on a medium- or highly doped Si region allows us to form a low resistivity ohmic contact on both n- or p-type doped Si and without any extra treatment. Differently, in SiC, typically a high temperature annealing (900 °C–1050 °C) is required after metal contact deposition on a highly doped SiC region to avoid a rectifying contact, i.e., to obtain an ohmic interface.87–89 Moreover, unlike Si, distinctive metals must be used to get an optimal behavior depending on whether metal contacts are made on either n-type or p-type highly doped regions >2 × 1018 cm−3. For instance, nickel is usually preferred for n-type contacts,90,91 while a bilayer of titanium plus aluminum is used for p-type doped SiC.92,93 Typical resistivities obtained with these configurations are 1 × 10−6 Ω cm (n-type SiC) and 1 × 10−5 Ω cm (p-type SiC).

Yet, when the patterned metal is deposited on a low- or medium-doped SiC layer <1 × 1017 cm−3, a Schottky contact is always obtained, regardless of dopant type. A Schottky contact stands for an energy barrier of the misaligned metal and semiconductor work functions, which implies that current can flow only in one direction (for one polarization of the bias voltage) while blocks the current flow in the other direction (for the opposite polarization of the applied voltage). Interestingly, this behavior can be used for the design of specific type of device such as Schottky diodes. Most chemical elements allow metal deposition for making a Schottky contact on SiC with reliable characteristics. The main difference will be the effective barrier height, which will depend on the selected metal work function. Schottky SiC diodes are extensively used in power electronics, where they are essential elements of relevant applications, such as power rectifiers or preventing solar cell discharging at night, as well as in daily-used electrical appliances.

Eventually, when considering the integration of graphene in either Si or SiC platforms, e.g., transistors or diodes, several configurations arise in regard to electrically and electronically interfacing graphene depending on whether a metal–graphene or graphene–semiconductor interface is at stake. As covered next, most of the technology developments address the metal–graphene case, and particularly on exfoliated and CVD graphene typically transferred onto a dielectric layer (e.g., silicon dioxide). The challenge of patterning metal contacts on graphene includes preserving its integrity while maximizing contact performance. Thus, the review especially includes research works focusing on methods that could effectively reduce contact resistance. The compilation cannot be exhaustive but aims at covering the main aspects by describing a number of representative works.

Generally, in microelectronics, likewise for graphene, the metals that are most commonly used as electrical contacts are Au, Ti, Cu, Ni, Al, Ag, Pt, Co, Cr, and Pd.94 

Fundamentally, the electronic interaction of a given metal with graphene is mainly determined by the configuration of electrons in the metal atoms. As a result, two types of graphene–metal physical interactions could be distinguished.95 The first type is physisorption, where metal atoms form a weak bond with graphene atoms. In this case, most electronic properties of graphene, such as graphene energy bands and conical points, are preserved, but the Fermi level is shifted due to charge transfer. Either electrons or holes are transferred from the metal to graphene causing n-type or p-type doping, i.e., increasing or lowering the Fermi level, respectively (Fig. 1). This charge donation is responsible for the formation of an interface dipole layer between metal and graphene surfaces. The dipole layer adds a potential step ΔV that depends strongly on the distance between the two surfaces.96 Metals that are considered physisorbed on graphene are Al, Cu, Ag, Au, and Pt. On the other hand, some metals interact strongly with graphene. This type of interaction, chemisorption, is caused by the hybridization of the d-orbitals of metals with the pz-orbitals of graphene. Consequently, the electronic structure of graphene is highly perturbed, and its electronic properties are significantly altered. Specifically, graphene’s band structure is destroyed, and there is an increase in the density of states (DOS).97 Moreover, it has been shown that the perturbation extends laterally up to 500 nm in the graphene sheet, i.e., beyond the graphene immediately below the metal surface.98 Ni, Ti, Co, and Pd are chemisorbed on graphene’s surface.

Practically, physisorbed metals dope the graphene sheet, while chemisorbed metals can diffuse in graphene and either bond with carbon atoms or occupy vacancies of the graphene lattice.99 It has been shown that inert metals such as Ag, Pd, and Au with thicknesses from 20 nm to 50 nm deposited on CVD graphene have lower values of contact resistance normalized by the contact width between 3 kΩ μm and 5 kΩ μm than more reactive metals such as Ti, Ni, Cr, and Co, which tend to form metal-carbides in the interface of metal–graphene.100 In the case of Pd contacts specifically, while it is a chemisorbed metal, it interacts weakly with graphene and, as a result, shows a low contact resistance, which is similar to the values for Au and Ag contacts.100,101 Nagashio et al. studied the metals Cr, Ti, and Ni, which were deposited on exfoliated graphene. In their experimental study, they indicated that metals with a higher working function ΔΦ also result in a lower contact resistivity. This behavior is explained by the charge transfer taking place from graphene to the metal, i.e., by increasing the DOS of graphene.102 

Actually, not only chemical composition but also metal characteristics such as thickness, uniformity, and deposition methods are also significant factors that would affect the patterning efficiency and performance of graphene electronic devices. Yang et al. showed that by gradually increasing metal thickness from 0.2 nm to 4.2 nm, in their case of Ni and Ti, the process of charge transfer was changing from metal to graphene and then from graphene to metal and the energy barrier of metal–graphene could be tuned and that the working function of metal graphene increased until the point where the thin metal film turned into bulk-like, i.e., its work function reached the theoretical work function value.103 Another crucial variable for achieving low contact resistance is the roughness of graphene–metal interface. Metals with small grain size and high uniformity have low contact resistance, such as 700 ± 500 Ω μm for Ti contacts of 100 nm in thickness and deposited by electron beam evaporation on exfoliated graphene.104 Indeed, the metal deposition method plays a crucial role in the contact resistance (Rc) values. For high vacuum (HV) e-beam evaporation, it was shown that lower base pressure and fast deposition rate lead to lower Rc values.105 In sputtering processes, as compared to e-beam evaporation, much higher Rc values are often observed.106 Yet, Di Bartolomeo et al. showed that Nb/Au (25 nm/75 nm) deposited by magnetron sputtering on exfoliated graphene formed contacts with resistivity ρc ∼ 25 kΩ μm, i.e., similar to the values achieved for evaporated metals, provided that it is processed with a low-power sputtering.107 Atomic layer deposition (ALD) of Pt contacts on CVD graphene in Ref. 108 reports the clean contact surface free of resist residues.

While the modulation of charge carrier transport by gates will be addressed in Sec. III, it is worth mentioning that a lot of research has been done to study the dependence of contact resistance with the applied gate voltage (Vg) in graphene devices. Gahoi et al. fabricated transfer length method (TLM) structures on CVD graphene and using various metal contacts. For Au contacts of 81 nm in thickness, the Rc reaches a maximum of 2100 Ω μm at the Dirac voltage of 104.5 V and decreases to 92 Ω μm when a back-gate voltage Vg = −40 V is applied.109 Indeed, it has been proven that the back-gate voltage alters the charge carrier density not only in the graphene channel but also underneath the metal contacts.97,109–111 Furthermore, a study with Ti/Pd/Au contacts on monolayer CVD-G Field Effect Transistors (FETs) has shown that there is a clear correlation with the Rc values, even when the device consisted in a local top-gate.110 

Contaminations at the metal–graphene interface that are generated during the synthesis and transfer of graphene, the photolithography steps, or during the deposition of the metal contacts are major factors for the increase in Rc values. For over a decade, numerous studies have been conducted using a variety of methods and treatments in order to achieve the lowest Rc values possible. One of the main problems in both CVD and exfoliated graphene devices is that graphene has to be transferred on a target substrate such as silicon wafer. The most common transfer method uses poly(methyl methacrylate) (PMMA) as the transfer media but often is not fully removed after intensive cleaning processes. Consequently, different approaches have been tested to clean the graphene sheet prior to the deposition of metal contacts. Modified RCA cleaning processes are superior to standard RCA, leaving the graphene cleaner with less residues. Her et al. used acetic acid instead of acetone, removing the residues of PMMA in a more effective way without damaging the graphene flake.112 The standard RCA method for cleaning graphene includes two basic steps, the standard clean 1 (SC-1) to remove the organic residues followed by the standard clean 2 (SC-2) that removes ionic and heavy metal contaminants. Liang et al. modified this process by reversing the cleaning steps and successfully removed more transfer induced residues from the graphene without damaging it. They also took one step further and used HF solution to increase the hydrophilicity of the SiO2 substrate. As a result, the formation of large folds and wrinkles was reduced so the cracks on the graphene sheet were avoided.113 Ultraviolet ozone (UVO) treatment is also an effective method for cleaning the graphene surface in the contact region from the residues of PMMA.114 They reported that the duration of UVO treatment should be between 20 min and 30 min to avoid any damage on the graphene sheet. Contact resistance of graphene with Ni/Au contacts was found to be 3 kΩ μm–4 kΩ μm, while applying the UVO treatment, it dropped to 600 Ω μm. Similarly, Li et al. reported a very low contact resistance of 184 Ω μm for Ti/Au contacts on CVD graphene after the contact regions were treated with UVO for 25 min.115 Low-energy CO2 cluster-cleaning is also an efficient method for large scale CVD graphene cleaning.116 For 20 l/min, 4-time-treated devices, the Cr/Au contact resistance was 1.69 kΩ μm, as compared to 6.35 kΩ µm for untreated graphene, which was reduced even more (0.27 kΩ μm) when a gate voltage Vg = −40 V was applied. Differently, Lee et al. used a metal-assisted transfer method for CVD graphene instead of PMMA. They used the same gold film for the transfer of graphene, as the metal electrode. The contact resistance they achieved was 564 Ω μm, while with PMMA, it was 2136 Ω μm, and it dropped to 1497 Ω μm after some thermal annealing for 3 h.117 A different method for minimizing resist contamination is by creating a metal-on-bottom structure, where metal contacts are first deposited on the substrate and then transfer is done. Yet, the lowest contact resistance obtained with this method was 1200 Ω μm.118 

As an alternative strategy, plasma treatments with various gases have been used based on the idea of enhancing metal adhesion on graphene by changing its hydrophilicity. In some cases, this implies that robust metal deposition (for example, for Au) could be enabled without the use of adhesion layers, which tends to form carbides in the metal–graphene interface. O2 and Ar plasma were the most effective, and the hole mobility for the 4 s plasma-treated devices was estimated to be 5200 cm2/V s119 O2 plasma treatment was also used to make a graphene–semiconductor interface, in particular, creating a Schottky-type junction on single layer exfoliated graphene with Cr contacts.120 Actually, chemical doping of graphene before the metallization is another approach that results in lower contact resistance values. In a research conducted by Park et al., poly(4-vinylphenol)/poly(melamine-co-formaldehyde) (PVP/PMF) was used for n-doping graphene. This method, different from most plasmas, did not damage graphene, and high temperature annealing for dopant activation is not necessary. The result was that after PVP/PMF doping, contact resistance was two times lower than that of untreated graphene and less dependent on the metal type used.121 Rapid Thermal Annealing (RTA) after metal deposition has been proven to be very effective method for reaching low contact resistance as it improves metal adhesion on graphene.109,122,123

Ultimately, further reduction in contact resistance value was also achieved when the chemical doping was combined with edge contact schemes in Ref. 121. The lowest Rc value was 23 Ω µm for Ti contacts. Also original, the Ni-catalyzed graphene etching process before metal deposition resulted in very low contact resistance with an average of 89 Ω μm, by creating the zigzag graphene etched film.124 Thus, considering the design of edge contacts on graphene is very efficient to improve the performance of graphene electronic devices. Top contacted graphene has 8.1 × 105 times higher contact resistivity than edge-contacted graphene as measured in Ref. 125, and increasing the peripheral length of metal contacts promotes charge transfer. For Au contacts (50 nm) on single layer CVD graphene, the contact resistance dropped from 2.1 kΩ μm to 0.8 kΩ μm when the peripheral length was increased from 312 nm to 792 nm.125 In another work, Ni zigzag metal contacts were deposited on graphene resulting in 700 Ω μm at Vg = −40 V, as compared to no-zigzag contacts with 3.5 kΩ μm at the same gate bias.126 Engineering charge transfer sites in the metal–graphene interface is indeed a very promising method for achieving very low contact resistance values. Song et al. patterned dot arrays on CVD graphene in the contact area by e-beam lithography and O2 plasma etching with Pd/Au (20/30 nm) as contact. There was a remarkable decrease in contact resistance with the increase in peripheral length.127 In a similar study with holey contacts and Au (100 nm) metal, the lowest contact resistance obtained was 23 Ω μm at the Dirac point, as compared to conventional Au contacts with Rc = 200 Ω μm.128 

Table I gives a comprehensive compilation of reported methods and treatments for reducing contact resistance.

TABLE I.

Summary of methods and treatments for reducing contact resistance in CVD, exfoliated, and epitaxial graphene, as reported in the literature.

Fabrication orTreatment before
Graphenemetal depositionor after metalContact Rc * W−ΔRc * W
synthesisSubstrateMetalmethoddepositionμm)(%)References
CVD Si/SiO2 Cr/Al Lift-off process … 564.25 62.3 (compared 117  
      to Au contacts)  
    Pre-vacuum 2136.75 before   
  Au Au evaporation annealing 250 °C annealing 1497 30  
    for 3 h after annealing   
CVD  Ni zig-zag Sputtering Post-annealing in 700 80 100  
 p-doped shaped  the 1:2 mixture of    
 Si/SiO2 Ni straight  H2/Ar at 580 °C 3500   
  contacts  for 30 min    
CVD Si/SiO2 Au Patterning by  2100 (312 µ61.9 125  
   photolithography Post-annealing peripheral length)   
   and a metal wet 300 °C for 1 h 800 (792 µ  
   etching process  peripheral length)   
CVD  Au   500 (±213)/92 … 109  
   Reversal Rapid thermal (Vg = −40 V)   
 p-doped Ni lithography, annealing 450 °C 2248 (±417)   
 Si/SiO2 Ni/Au evaporation, and in Ar/H2 95/5 404 (±383)   
  Pd lift-off process under vacuum 968 (±317)   
  Pt/Au   1068 (±515)   
CVD  Pd  Thermal annealing 618 … 94  
 p-doped Cu Evaporation, 450 °C for 196   
 SI/SiO2 Ni reversal lithography 60 min in 30   
  Pt  Ar/H2 95/5 115 …  
CVD  Ti   1890 undoped/1454 23, only doping, 95  
     doped, 83 50 μm, 1 µm gaps  
     undoped/42 doped 94 nm,  
     1 µm gaps 23 doped 150 nm gaps  
     150 nm gaps   
 p++-Si Pd Electron beam Doping by 1533 undoped/1381 10, only doping;  
 substrate  evaporation PVP/PMF before doped, 484 74 μm, 7 μm,  
    metal deposition undoped/122 doped 1 µm gaps  
     1 µm gaps   
     2110 undoped/1539 27, only doping;  
  Cu   254 undoped/92 63 μm, 7 μm,  
     doped 1 µm gaps 1 µm gaps  
    Contact region 3000–4000   
CVD Si/SiO2 Ni/Au Evaporation exposed to untreated 300 with 90 88  
    UV-ozone UVO treatment   
CVD  Cu   8800 before RTA 67 96  
     2900 after RTA   
 Highly Ag UV-photolithography Rapid thermal 3400 before RTA 58.8  
 doped  process followed by annealing in 300 °C 1400 after RTA   
 Si/SiO2 Au metallization and for 40 s repeated 940 before RTA 33  
   lift-off steps 10 times 630 after RTA   
  Pd   820 before RTA 30.5  
     570 after RTA   
 
Fabrication orTreatment before
Graphenemetal depositionor after metalContact Rc * W−ΔRc * W
synthesisSubstrateMetalmethoddepositionμm)(%)References
CVD Si/SiO2 Cr/Al Lift-off process … 564.25 62.3 (compared 117  
      to Au contacts)  
    Pre-vacuum 2136.75 before   
  Au Au evaporation annealing 250 °C annealing 1497 30  
    for 3 h after annealing   
CVD  Ni zig-zag Sputtering Post-annealing in 700 80 100  
 p-doped shaped  the 1:2 mixture of    
 Si/SiO2 Ni straight  H2/Ar at 580 °C 3500   
  contacts  for 30 min    
CVD Si/SiO2 Au Patterning by  2100 (312 µ61.9 125  
   photolithography Post-annealing peripheral length)   
   and a metal wet 300 °C for 1 h 800 (792 µ  
   etching process  peripheral length)   
CVD  Au   500 (±213)/92 … 109  
   Reversal Rapid thermal (Vg = −40 V)   
 p-doped Ni lithography, annealing 450 °C 2248 (±417)   
 Si/SiO2 Ni/Au evaporation, and in Ar/H2 95/5 404 (±383)   
  Pd lift-off process under vacuum 968 (±317)   
  Pt/Au   1068 (±515)   
CVD  Pd  Thermal annealing 618 … 94  
 p-doped Cu Evaporation, 450 °C for 196   
 SI/SiO2 Ni reversal lithography 60 min in 30   
  Pt  Ar/H2 95/5 115 …  
CVD  Ti   1890 undoped/1454 23, only doping, 95  
     doped, 83 50 μm, 1 µm gaps  
     undoped/42 doped 94 nm,  
     1 µm gaps 23 doped 150 nm gaps  
     150 nm gaps   
 p++-Si Pd Electron beam Doping by 1533 undoped/1381 10, only doping;  
 substrate  evaporation PVP/PMF before doped, 484 74 μm, 7 μm,  
    metal deposition undoped/122 doped 1 µm gaps  
     1 µm gaps   
     2110 undoped/1539 27, only doping;  
  Cu   254 undoped/92 63 μm, 7 μm,  
     doped 1 µm gaps 1 µm gaps  
    Contact region 3000–4000   
CVD Si/SiO2 Ni/Au Evaporation exposed to untreated 300 with 90 88  
    UV-ozone UVO treatment   
CVD  Cu   8800 before RTA 67 96  
     2900 after RTA   
 Highly Ag UV-photolithography Rapid thermal 3400 before RTA 58.8  
 doped  process followed by annealing in 300 °C 1400 after RTA   
 Si/SiO2 Au metallization and for 40 s repeated 940 before RTA 33  
   lift-off steps 10 times 630 after RTA   
  Pd   820 before RTA 30.5  
     570 after RTA   
 
Fabrication orTreatment before
Graphenemetal depositionor after metalContact Rc * W−ΔRc * W
synthesisSubstrateMetalmethoddepositionμm)(%)References
CVD Si/SiO2 Cr/Au E-beam evaporation CO2 cluster 1690 … 90  
    cleaning on contact    
    areas before    
    metal deposition    
CVD  Au E-beam evaporation  270 without holes  186  
     62 with holey 77  
     contacts   
     550 without holes   
  Pd/Au   420 with holey 22  
    E-beam contacts   
  Ni/Au  lithography and 830 …  
 p++-type   etching for 960 without holes   
 Si/SiO2 Ag  creating holes in 850 with holey 11.5  
    graphene before contacts   
    metal deposition 1150 without   
  Au/Al   holes 980 with 14.8  
     holey contacts   
     1490 without   
  Ni/Al   holes 1140 with 23.5  
     holey contacts   
 p++-type   UV ozone    
CVD Si/SiO2 Ti/Au Evaporation treatment before 184 … 115  
    metal deposition    
   E-beam evaporation  830 E-beam   
Exfoliated Si/SiO2 Ti and sputtering … evaporated 4200 80 106  
     sputtered   
  Cr/Au Thermal Annealing in 300 °C 103–106 …  
Exfoliated p+-Si/SiO2 Ti/Au evaporation for 60 min before   78  
  Ni  metal deposition 500 …  
 p-doped  Thermal Ni-catalyzed 294 untreated 69.7  
Exfoliated Si/SiO2 Ni evaporation etching before 89 after treatment 96.3, BL 124  
    metal deposition 11 BL treated   
Exfoliated Si/SiO2 Cu  Annealing sample 1161 sample A  97  
    A at 260 °C before annealing   
   Thermal followed by another 620 sample A after 46.6 for  
   evaporation annealing at 306 °C annealing 1.75 * 106 sample A  
    annealing sample B sample B before   
    at 300 °C annealing 163 sample   
    for 12 h–15 h B after annealing   
EG  Cu  Annealing at 350 °C 263 before annealing 30 108  
     184 after annealing   
 Semi-   Contact area    
 insulating  E-beam evaporation patterning 650 before annealing 81  
 6H(0001)   (cuts in graphene) 125 after annealing   
 SiC   annealing at 350 °C    
  Pd (top gate  Contact area 584 non-patterned 22  
  contact)  patterning 457 patterned   
 
Fabrication orTreatment before
Graphenemetal depositionor after metalContact Rc * W−ΔRc * W
synthesisSubstrateMetalmethoddepositionμm)(%)References
CVD Si/SiO2 Cr/Au E-beam evaporation CO2 cluster 1690 … 90  
    cleaning on contact    
    areas before    
    metal deposition    
CVD  Au E-beam evaporation  270 without holes  186  
     62 with holey 77  
     contacts   
     550 without holes   
  Pd/Au   420 with holey 22  
    E-beam contacts   
  Ni/Au  lithography and 830 …  
 p++-type   etching for 960 without holes   
 Si/SiO2 Ag  creating holes in 850 with holey 11.5  
    graphene before contacts   
    metal deposition 1150 without   
  Au/Al   holes 980 with 14.8  
     holey contacts   
     1490 without   
  Ni/Al   holes 1140 with 23.5  
     holey contacts   
 p++-type   UV ozone    
CVD Si/SiO2 Ti/Au Evaporation treatment before 184 … 115  
    metal deposition    
   E-beam evaporation  830 E-beam   
Exfoliated Si/SiO2 Ti and sputtering … evaporated 4200 80 106  
     sputtered   
  Cr/Au Thermal Annealing in 300 °C 103–106 …  
Exfoliated p+-Si/SiO2 Ti/Au evaporation for 60 min before   78  
  Ni  metal deposition 500 …  
 p-doped  Thermal Ni-catalyzed 294 untreated 69.7  
Exfoliated Si/SiO2 Ni evaporation etching before 89 after treatment 96.3, BL 124  
    metal deposition 11 BL treated   
Exfoliated Si/SiO2 Cu  Annealing sample 1161 sample A  97  
    A at 260 °C before annealing   
   Thermal followed by another 620 sample A after 46.6 for  
   evaporation annealing at 306 °C annealing 1.75 * 106 sample A  
    annealing sample B sample B before   
    at 300 °C annealing 163 sample   
    for 12 h–15 h B after annealing   
EG  Cu  Annealing at 350 °C 263 before annealing 30 108  
     184 after annealing   
 Semi-   Contact area    
 insulating  E-beam evaporation patterning 650 before annealing 81  
 6H(0001)   (cuts in graphene) 125 after annealing   
 SiC   annealing at 350 °C    
  Pd (top gate  Contact area 584 non-patterned 22  
  contact)  patterning 457 patterned   
 
Fabrication orTreatment before
Graphenemetal depositionor after metalContact Rc * W−ΔRc * W
synthesisSubstrateMetalmethoddepositionμm)(%)References
 4H–SiC  Nb deposition with Annealing in    
EG (0001) NbC e-beam evaporation 1360 °C for the 182 … 136  
   on SiC formation of NbC    
CVD  Pd/Au Evaporation Array of antidots (21 Ω) … 101  
    patterned in    
 p++-type   contact region    
 Si/SiO2   by e-beam    
    lithography and O2    
    plasma etching.    
    Post-annealing in    
    300 °C 2 h    
EG Semi- Cr/Au E-beam evaporation   27 132  
 insulating   Annealing from 123 K at 300 K   
 4H–SiC   300 K to 673 K at 673 K   
 (0001)       
EG Semi- Ti/Au E-beam evaporation   33 132  
 insulating   Annealing from 655 at 300 K   
 4H–SiC   300 K to 673 K 440 at 673 K   
 (0001)       
Fabrication orTreatment before
Graphenemetal depositionor after metalContact Rc * W−ΔRc * W
synthesisSubstrateMetalmethoddepositionμm)(%)References
 4H–SiC  Nb deposition with Annealing in    
EG (0001) NbC e-beam evaporation 1360 °C for the 182 … 136  
   on SiC formation of NbC    
CVD  Pd/Au Evaporation Array of antidots (21 Ω) … 101  
    patterned in    
 p++-type   contact region    
 Si/SiO2   by e-beam    
    lithography and O2    
    plasma etching.    
    Post-annealing in    
    300 °C 2 h    
EG Semi- Cr/Au E-beam evaporation   27 132  
 insulating   Annealing from 123 K at 300 K   
 4H–SiC   300 K to 673 K at 673 K   
 (0001)       
EG Semi- Ti/Au E-beam evaporation   33 132  
 insulating   Annealing from 655 at 300 K   
 4H–SiC   300 K to 673 K 440 at 673 K   
 (0001)       

Similar studies have been done for the evaluation of different metal contacts on epitaxial graphene on SiC substrates. Moon et al. fabricated graphene FETs using Ti/Pt/Au contacts achieving a contact resistivity (ρc) of 10−6 Ω cm2 to 10−7 Ω cm2.129 In a study with 100 nm thick Au contacts on EG–SiC, the results showed that the current density was decreasing with the extension of the distance from the contact edges. In this case, the contact resistivity was of a value of 10−6 Ω cm2.130 

To further reduce the contact resistivity of EG/SiC devices, again various processing approaches have been demonstrated. Mild O2 plasma treatment of graphene contact areas before metal deposition for Ti/Au (10 nm/50 nm) contacts resulted in lowering the contact resistivity to 4·10−7 Ω cm2. Further reduction was achieved when the devices were annealed after the metallization, when ρc reached a very low value of 7.5 × 10−8 Ω cm2, while the charge carrier mobility of the device was preserved.131 In addition, high temperature annealing has been proven to affect contact resistance and resistivity. Nagareddy et al. used Cr/Au and Ti/Au contacts on few layer and monolayer epitaxial graphene, respectively. Their results for Cr/Au contacts were Rc from 123 Ω to 90 Ω, while for Ti/Au contacts, Rc were from 655 Ω to 440 Ω, when the annealing temperature was increased from 300 K to 673 K. The difference in the values of Rc was explained by the formation of the TiC layer at the interface of Ti with epitaxial graphene, as Ti is a highly reactive metal.132 A different approach was proposed by Moon et al., when they intercalated hydrogen after the growth of EG–SiC. Ti/Pt/Au contacts were applied, and the contact resistivity measured was 3 × 10−7 Ω cm2 to 1.2 × 10−8 Ω cm2.133 

Metal contact geometry has also been shown to play a significant role in the contact resistance of epitaxial graphene devices. By patterning metal contacts in order to increase the contact perimeter of metal–graphene and applying thermal annealing treatment, a slight reduction in contact resistance for 50 nm thick Cu contacts is obtained. For the non-patterned contacts, the contact resistance decreased from 263 Ω μm to 184 Ω μm after annealing, while for patterned contacts, the contact resistance plummeted from 650 Ω μm to 125 Ω μm. The same was investigated for the Pd patterned contacts in top-gated FETs with the Ti/Pd/Au (0.5 nm/20 nm/20 nm) gate electrode, which resulted in an Rc value of 457 Ω μm compared to the non-patterned Pd contacts that had a Rc of 584 Ω μm.134 In epitaxial EG–SiC, it was considered that bilayer graphene (BLG) could affect the performance of graphene devices in applications such as for quantum Hall resistance metrology. Yager et al. used Ti/Au contacts in their study. They first applied a 5 nm/70 nm layer of Ti/Au as metallic anchors on SiC by removing graphene with oxygen plasma etching in order to ensure strong adhesion. The actual electrical contacts of Ti/Au 5 nm/120 nm thick were deposited in a second lithography step. In their experimental results, the value of contact resistance ranged from 0.6 Ω to 1.1 kΩ, probably because of the cleanliness of the metal–graphene interface. They showed that proper fabrication of metal contacts could reduce the value of contact resistance. This could be done either by bypassing bilayer inhomogeneities or by pre-screening monolayer graphene and contacting with a parallel orientation to bilayer patches.135 

In a more recent study, 40 nm of Nb was deposited directly on the C-face of the 4H–SiC substrate, followed by thermal annealing in 1360 °C, which resulted in one-step the formation of a NbC layer upon which few-layer graphene was grown. After growth, graphene ribbon was etched with O2 plasma treatment. The contact resistance of NbC-EG was 182 Ω μm, which is the best reported contact resistance for few-layer graphene. This method is a one-step, residue free process, and it was validated for realizing NbC–EG–NbC Josephson junctions. The same method was successfully demonstrated for tantalum, indicating that it could be established for other carbide metals.136 Yang et al. also reported a very interesting approach for residue free graphene, obtaining high mobility and low carrier density in un-gated EG devices. In their approach, they applied a thin metal protective layer, either a bilayer consisting of 5 nm Pd and 10 nm Au or a single layer of 30 nm Au, directly on the epigraphene. This layer protected epigraphene during the intermediate processing steps from contaminations was removed only in the last step of the fabrication of EG devices. The carrier density was measured for all devices, which was typically below 3 × 1011 cm−2.137 

Summarizing this section, it is clear that the metal–graphene interface is still an open issue that prevents further progress toward a consolidated and standardized graphene technology. EG–SiC has received traditionally less attention and research efforts, in general, but it is clear that only scattered studies have been done and deeper, more systematic studies are still needed. Benefiting from its simplified processing, i.e., no transfer and the versatility of SiC substrates, e.g., SiC polarities, is also addressed next in relation to the carrier control/modulation by electrical gating of graphene, and could soon leverage certain relevant, specific electronic applications for EG–SiC.

The staple (active) device of modern electronics is the transistor. A transistor is typically a three-terminal device that is used to either increase or switch the electronic signal (current) or electrical power. Respectively, the amplification or logic behavior is achieved by charge carrier density control or modulation via a certain applied voltage (gate terminal), while device is operated through the so-called source and drain contact terminals. Briefly, two configurations are available for the gate making. Either a dielectric material is deposited on top of the transistor channel and a metal contact is patterned on top of it (top-gate), as already mentioned in Sec. II B, or the contact is below channel (bottom gate), which is typically done by ion implantation.

The making of metal–graphene contacts been already examined, the graphene transistor function is considered. Similar to improving or achieving low contact resistance, e.g., good drain and source contacts for optimal response or low losses, most abundant literature concerns exfoliated and CVD graphene transistors.138–149 The strategies for opening the graphene bandgap for logic application, which include using BLG, patterning graphene as nanoscale ribbons, or strain-induced effects, have been extensively reported and reviewed in the literature150–158 and are not included either. Solution or liquid gated graphene transistors are widely, and successfully, used particularly for chemical and bioapplications.159–161 Yet, electrochemical transistor devices, which are based on electrolyte gates, will not be discussed.131,162,163 As follows, only all solid-state, specifically, EG on SiC transistors are summarized, with basic considerations on materials for the two configurations addressing the electrical gating.

An interesting feature of SiC wafer technology is the possibility to use electronic grade SiC wafers for the fabrication of active devices on either intrinsic SiC (i.e., WBG or insulating substrate) or resistivity-tuned SiC films obtained by the dopants introduced during their epitaxial growth.164,165 In these epitaxially grown SiC layers, dopants are already activated during the growth process and therefore, do not require an extra thermal process. Differently, for intrinsically insulating SiC, it can be doped by ion implantation, and like in silicon wafers, it includes both n- and p-type dopants.166,167 Specifically, typical SiC dopant chemical elements are small atoms such as aluminum for obtaining p-type SiC, while nitrogen or phosphorus is used for n-type doping. Furthermore, recently, the growth of semi-insulating SiC layers by epitaxy has been developed. Consequently, it is now possible to stack or wisely combine epitaxial SiC layers with n-type, p-type, and semi-insulating (resistivity >1000 Ω) characteristics, which provides high flexibility for device design and is very interesting for different applications, even when the doping is not local, but extended to the whole surface of the wafer.

If local doping is targeted, the use of ion implantation in combination with patterning techniques is needed. In this case, a post-implantation thermal activation process is mandatory. Precisely, activation temperature in SiC is in the range of 1500 °C–1900 °C,168 which is much higher than in silicon (900 °C–1100 °C). Another challenge in SiC ion implantation is that dopant atoms in SiC have very low diffusion coefficients.166 It is, then, difficult to generate deep junctions as routinely done with Si up to 10 µm. In essence, the depth of the junction or dopant profile will be defined by the maximum ion implantation energy used. As an example, an aluminum implantation energy of 350 keV will allow a junction depth of 0.4 μm, while an energy of 1 MeV will be needed to reach 1 μm depth. Despite these limitations, numerous complex SiC solid state devices, such as power MOSFETs, have been successfully built using epitaxial growth combined with ion implantation. This kind of device incorporate five different ion implantation steps, and they are currently commercialized as a key element, especially, of the electric car market.169,170

Not surprisingly, the most common architecture of EG–SiC devices is the top-gated in which a dielectric is deposited on top of epitaxial graphene before the top-gate electrode patterning. The limited number of examples of studies and developments on EG field effect transistors (EGFET) are summarized. For instance, the importance of eliminating the buffer layer for a better performance of EGFETs was proven in Ref. 171. Here, top-gated EGFETs on SiC were fabricated by using Ti/Au contacts and a 10 nm thick HfO2 dielectric layer that was deposited via ALD. The elimination of the buffer layer with H2 intercalation increased carrier mobility up to 2000 cm2/V s and decreased the sheet resistance, and current saturation and transconductance were improved by more than 200%. Furthermore, by decreasing the gate length from 1 µm to 125 nm, the extrinsic current gain cut-off frequency fT increased from 7.3 GHz to 24 GHz.171 In another work, using atomic Au intercalation in the buffer layer leads to the creation of Quasi Free-Standing (QFS) monolayer graphene. Those top-gated devices were based on 20 nm thick h-BN, deposited via dry-transfer, followed by 38 nm Al2O3 via ALD as a dielectric and Ti/Au as a gate electrode. They showed gate tunable ambipolar transport across the Dirac point, and n- or p-type doping depends on the amount of Au. However, their mobilities were lower than the reported for H2 intercalation in the order of 600 cm2/V s.172 

Design approaches have also been implemented. The first work in the making of top gated EGFETs was the one by Guo et al. In this work, they deposited Al2O3 as a dielectric on top of selected monolayer graphene regions that were grown in the C-face of the 4H–SiC substrate. Ti/Au was used as the gate metal. The devices showed a high cut-off frequency at fT = 40 GHz, while it increased to fT = 70 GHz after a de-embedding process in order to remove the effects of probing pads.173 The excellent DC and RF performance of a EGFET with QFS bilayer graphene on 4H–SiC, via H2 intercalation, was obtained using top-gate T-shaped with length 200 nm and 100 nm. In this study, Al2O3 was used as a dielectric, prepared by Al evaporation on top of graphene and oxidation in air, while source and drain contacts were made of Au and 200 nm Al was used as a gate electrode. They achieved a high DC gm of 2881 mS/mm and an intrinsic fT of 407 GHz with a gate length of 100 nm and suggested that further decrease in gate length could improve even more the performance of EGFETs.174 The noise parameters of QFS BL-GFETs (Bilayer Graphene FETs) on SiC substrates for applications as low noise amplifiers were also studied in devices with top gate T-shaped architecture.175 In this particular study, an Al2O3 layer as thin as 5 nm, made by using e-beam evaporation and oxidation in air, was used as dielectric, while the gate electrode consisted in 300 nm thick Al, and the gate length was 60 nm. The devices showed both very low extrinsic and intrinsic noise levels of 1.5 dB and 0.8 dB, respectively, at 10 GHz, which are the promising results for high frequency and low noise operation.175 

Similarly, the RF and DC performance of EGFETs on SiC for high temperature operation was examined in two different studies.176,177 In both cases, they used 4H–SiC substrates and hydrogen intercalation for the generation of BL graphene. Al2O3 was deposited as dielectric via evaporation, oxidation, followed by ALD deposition. In addition, rapid thermal annealing was used as a treatment for the improvement of dielectric’s quality. In RF EGFETs, the Al/Au film of 150 nm/100 nm thickness was deposited as gate contact metal, while in DC GFETs, the Al film had a thickness of 250 nm. In both cases, the results showed that EGFETs on SiC substrates could preserve a good performance with operating temperatures up to 200 °C, which proved the high thermal stability of the devices.176,177

Other original approaches, such as molecular assisted top-gate on EG on 4H–SiC substrates, have allowed precise control of the carrier density in EG, resulting in long term stable performances for quantum resistance metrology devices. The Hall bar devices were fabricated by standard electron beam lithography techniques and had dimensions of 30 × 150 µm2. Ti/Au 5 nm/80 nm thick layers were used as contact materials, while molecular doping was achieved with a 100 nm PMMA-F4TCNQ encapsulated by the PMMA layer, followed by a thermal annealing.178 

In 2013, Hicks et al. used a bottom-up approach to create perfectly aligned ribbons with identical chirality on top of pre-patterned, with parallel steps, 4H–SiC substrates. These graphene nanoribbons had a bandgap energy >0.5 eV, while being very narrow (∼1.4 nm) and continuous over macroscopic lengths. This work proved how the topography of the substrate plays an important role in the electronic properties of epigraphene.179 In another example, Hwang et al. fabricated top-gate EGFETs based on nanoribbons (GNRs), which were about 10 nm in width on 6H–SiC wafers.180 Relevantly, they reported the opening of an energy gap of ∼0.14 eV, which is inversely proportional to the GNRFET (Graphene Nanoribbon FET) width. The gate dielectric consisted of 15 nm hydrogen silsesquioxane (HSQ) followed by an ALD layer of 30 nm thick Al2O3 and Cr/Au 5 nm/100 nm gate electrode. They also fabricated a 30 GNR-array EGFET, which displayed a significant increase in the drain current, where the highest maximum drain current density was 12 mA/μm for the total channel width, a density, which had never been reported for any semiconductor device before.180 In 2010, GNRs were for the first time successfully grown on the sidewalls of trenches etched on non-polar planar SiC substrates in which quantum confinement effects created a bandgap.43 Exceptional edge state ballistic transport at room temperature was observed for the first time in GNRs. These features show that the interconnected quasi-1D networks can be patterned using the conventional lithographic methods and could become an ideal platform for quantum coherent nanoelectronics.181 These results were confirmed in Refs. 182 and 183.

Fewer examples exist for bottom-gate EGFETs. Bottom-gated EG electronics are also very interesting as it exploits the very SiC substrate and, thus, skips the use of top gate dielectrics and leaves graphene’s surface open for various applications, relevantly, sensing devices. As an example, buried gated epitaxial graphene devices on the 6H–SiC substrate were fabricated by Jouault et al.184 (Fig. 3). Graphene was grown on the C-face of SiC, and nitrogen was used as a dopant for the ion implantation. The low nitrogen concentration at the SiC surface ensured the formation of an insulating barrier between the graphene and the conducting layer, which acted as the (buried) gate and was located 200 nm below the surface. Further implantation at higher dose and lower energy was applied in order to be able to electrically bias the implanted region. Graphene ribbons, with widths of 5 µm–10 µm, were subsequently patterned, and Cr/Au contact metals were deposited with the evaporation technique. They demonstrated that the buried gate could efficiently modulate the carrier concentration, and at low temperatures, a very large plateau in the quantum Hall regime was observed, which make this approach extremely promising for applications in quantum metrology.184 

FIG. 3.

(a) Sketch of the device. (b) Simulation of the doping profile for nitrogen atoms introduced by implantation. Simulation was performed by the I2SiC in-house software from CNM Barcelona. The implantation energy is 160 keV. The maximum concentration of about 3 × 1018 cm−3 occurs at ∼200 nm below the surface. (c) Schematic of the graphene and SiC conduction bands at T ∼ 50 K. (d) Temperature dependence of the resistivity for one device. Below the inflection point at T ∼ 100 K (arrow), the graphene becomes more conductive than the implanted substrate. The sudden increase in the resistivity at T < 20 K is due to weak localization. The inset shows an optical view of the device (graphene dimension 20 × 6 µm2). Reprinted with permission from B. Jouault et al., Appl. Phys. Lett. 100, 052102 (2012). Copyright 2012 AIP Publishing LLC.

FIG. 3.

(a) Sketch of the device. (b) Simulation of the doping profile for nitrogen atoms introduced by implantation. Simulation was performed by the I2SiC in-house software from CNM Barcelona. The implantation energy is 160 keV. The maximum concentration of about 3 × 1018 cm−3 occurs at ∼200 nm below the surface. (c) Schematic of the graphene and SiC conduction bands at T ∼ 50 K. (d) Temperature dependence of the resistivity for one device. Below the inflection point at T ∼ 100 K (arrow), the graphene becomes more conductive than the implanted substrate. The sudden increase in the resistivity at T < 20 K is due to weak localization. The inset shows an optical view of the device (graphene dimension 20 × 6 µm2). Reprinted with permission from B. Jouault et al., Appl. Phys. Lett. 100, 052102 (2012). Copyright 2012 AIP Publishing LLC.

Close modal

Another buried-gate EG device was fabricated by Waldmann et al.185 Similarly, nitrogen was used as a dopant for ion implantation of a semi-insulating, vanadium (V) compensated 6H–SiC (0001). The gate layer was generated at a depth of 700 nm, while graphene was grown after the implantation. H2 intercalation was used to achieve a QFSML. This step is crucial in the proper function of the buried gate. The Fermi level pinning that occurred because of the dangling bonds no longer exists, thus enabling an effective electrical gating. An important feature is that the device could operate in a broad temperature range from 6 K–300 K. Furthermore, two gating regimes were employed depending on the selection of doping concentrations. In the Implanted Plate Capacitor (IPC) regime, the gate structure acts as a plate capacitor with a plate distance adjustable through the depth of the implanted bottom gate, while in the Schottky capacitor (SC) regime, the capacitance is determined by the depletion layer of the graphene/SiC Schottky contact, and much higher gate efficiency can be achieved.185 This bottom-gate structure could be employed for micrometer size devices as well as on the large scale.

In this Research Update, we have reviewed the current state of the art on EG on SiC for electronics. A general view of the making of EG is provided first, including the distinguishing aspects of the decomposition and graphene deposition strongly related to SiC materials and wafers, such as being the substrate, template, and source of atomic carbon. A simple introduction to graphene characterization and inspection for device fabrication is also included. The main part of this paper is devoted to the electronic interface of graphene with metals and how to achieve low contact resistances, for an optimal device performance and minimal Joule losses. A huge amount of literature is compiled and discussed for the most used high quality graphene materials, i.e., exfoliated graphite from HOPG and CVD graphene transferred to dielectric substrates and epitaxial graphene directly grown and used on SiC. Finally, a short summary of works on the different approaches for electrically gating graphene, where the advantage and potential of EG on SiC for minimal processing and maximal integration of graphene electronic devices are given, concludes this paper. The topic is far from losing interest. Emerging research areas and technologies, such as the approaches around the so-called quantum materials, or quantum sensing, computing and communications, and demanding applications, such as for space or nuclear energy and science, may find in EG on SiC a powerful platform, suitable for fundamental investigations and convenient for device developments. Consolidation of electronic devices based on epigraphene on SiC wafers, such as for RF applications, light and particle detectors, or their use as the metrology standard for the quantum of resistance might occur in the coming years if technology development efforts continue.

Data sharing is not applicable to this article as no new data were created or analyzed in this study.

This study has received funding from the European Union’s Horizon 2020 research and innovation Programme H2020-MSCA-COFUND-2016 DOC-FAM (Grant Agreement No. 754397). This study was also supported partially by Project Nos. RYC-2016-21412 and 2019-LLAV 00052.

1.
M.
Yankowitz
,
S.
Chen
,
H.
Polshyn
,
Y.
Zhang
,
K.
Watanabe
,
T.
Taniguchi
,
D.
Graf
,
A. F.
Young
, and
C. R.
Dean
,
Science
363
,
1059
(
2019
).
2.
A. C.
Ferrari
,
F.
Bonaccorso
,
V.
Fal’ko
,
K. S.
Novoselov
,
S.
Roche
,
P.
Bøggild
,
S.
Borini
,
F. H. L.
Koppens
,
V.
Palermo
,
N.
Pugno
,
J. A.
Garrido
,
R.
Sordan
,
A.
Bianco
,
L.
Ballerini
,
M.
Prato
,
E.
Lidorikis
,
J.
Kivioja
,
C.
Marinelli
,
T.
Ryhänen
et al.,
Nanoscale
7
,
4598
(
2015
).
3.
K. S.
Novoselov
,
V. I.
Fal’ko
,
L.
Colombo
,
P. R.
Gellert
,
M. G.
Schwab
, and
K.
Kim
,
Nature
490
,
192
(
2012
).
4.
T.
Palacios
,
Nat. Nanotechnol.
6
,
464
(
2011
).
5.
X.
Li
,
C. W.
Magnuson
,
A.
Venugopal
,
R. M.
Tromp
,
J. B.
Hannon
,
E. M.
Vogel
,
L.
Colombo
, and
R. S.
Ruoff
,
J. Am. Chem. Soc.
133
,
2816
(
2011
).
6.
B.
BaligaJayant
,
Wide Bandgap Semiconductor Power Devices: Materials, Physics, Design and Applications
(
Woodhead Publishing
,
2019
).
7.
C.
Berger
,
Z.
Song
,
T.
Li
,
X.
Li
,
A. Y.
Ogbazghi
,
R.
Feng
,
Z.
Dai
,
A. N.
Marchenkov
,
E. H.
Conrad
,
P. N.
First
, and
W. A.
de Heer
,
J. Phys. Chem. B
108
,
19912
(
2004
).
8.
W. A.
de Heer
,
C.
Berger
,
X.
Wu
,
P. N.
First
,
E. H.
Conrad
,
X.
Li
,
T.
Li
,
M.
Sprinkle
,
J.
Hass
,
M. L.
Sadowski
,
M.
Potemski
, and
G.
Martinez
,
Solid State Commun.
143
,
92
(
2007
).
9.
G.
Rius
and
P.
Godignon
,
Epitaxial Graphene on Silicon Carbide, Modeling, Characterization, and Applications
(
Jenny Stanford Publishing
,
2018
).
10.
E.
Rollings
,
G.-H.
Gweon
,
S. Y.
Zhou
,
B. S.
Mun
,
J. L.
McChesney
,
B. S.
Hussain
,
A. V.
Fedorov
,
P. N.
First
,
W. A.
de Heer
, and
A.
Lanzara
,
J. Phys. Chem. Solids
67
,
2172
(
2006
).
11.
C.
Berger
,
Z.
Song
,
X.
Li
,
X.
Wu
,
N.
Brown
,
C.
Naud
,
D.
Mayou
,
T.
Li
,
J.
Hass
,
A. N.
Marchenkov
,
E. H.
Conrad
,
P. N.
First
, and
W. A.
de Heer
,
Science
312
,
1191
(
2006
).
12.
V. E.
Konstantin
,
A.
Bostwick
,
K.
Horn
,
J.
Jobst
,
G. L.
Kellogg
,
L.
Ley
,
L. McC.
Jessica
,
T.
Ohta
,
S. A.
Reshanov
,
J.
Röhrl
,
E.
Rotenberg
,
A. K.
Schmid
,
D.
Waldmann
,
H. B.
Weber
, and
T.
Seyller
,
Nat. Mater.
8
,
203
(
2009
).
13.
M. L.
Sadowski
,
G.
Martinez
,
M.
Potemski
,
C.
Berger
, and
W. A.
de Heer
, in
International Conference on the Physics of Semiconductors, Vienna’06
,
2006
.
14.
X.
Wu
,
Y.
Hu
,
M.
Ruan
,
N. K.
Madiomanana
,
J.
Hankinson
,
M.
Sprinkle
,
C.
Berger
, and
W. A.
de Heer
,
Appl. Phys. Lett.
95
,
223108
(
2009
).
15.
S.
Tanabe
,
Y.
Sekine
,
H.
Kageshima
,
M.
Nagase
, and
H.
Hibino
,
Appl. Phys. Express
3
,
075102
(
2010
).
16.
T.
Alexander
,
S.
Lara-Avila
,
A.
Kalaboukhov
,
S.
Paolillo
,
M.
Syväjärvi
,
R.
Yakimova
,
O.
Kazakova
,
T. J. B. M.
Janssen
,
V.
Fal’ko
, and
S.
Kubatkin
,
Nat. Nanotechnol.
5
,
186
(
2010
).
17.
C.
Berger
,
E. H.
Conrad
, and
W. A.
de Heer
, “
Towards electronic devices based on epigraphene
,” in
Physics of Solid Surfaces
, edited by
G.
Chiarotti
and
P.
Chiaradia
(
Springer
,
Berlin, Heidelberg
,
2018
), Vol. III 45 B, pp.
730
740
.
18.
C.
Berger
,
E.
Conrad
, and
W.
de Heer
, “
Epigraphene: Epitaxial graphene on silicon carbide
,” in
Physics of Solid Surfaces
, Landolt-Börnstein: Numerical Data and Functional Relationships in Science and Technology—New Series Subvolume III/45B, edited by
G.
Chiarotti
and
P.
Chiaradia
(
Springer
,
2017
).
19.
C.
Berger
and
W. A.
de Heer
, “
Flat and safe under the graphene sheet
,”
Nat. Mater.
19
,
583
(
2020
).
20.
C.
Backes
 et al, “
Production and processing of graphene and related materials
,”
2D Mater.
7
,
022001
(
2020
).
21.
Y.-M.
Lin
,
C.
Dimitrakopoulos
,
K. A.
Jenkins
,
D. B.
Farmer
,
H.-Y.
Chiu
,
A.
Grill
, and
P.
Avouris
,
Science
327
,
662
(
2010
).
22.
C.
Guo
,
Y.-H.
Lin
,
M. D.
Witman
,
K. A.
Smith
,
C.
Wang
,
A.
Hexemer
,
J.
Strzalka
,
E. D.
Gomez
, and
R.
Verduzco
,
Nano Lett.
13
,
2957
(
2013
).
23.
Y.-M.
Lin
,
A.
Valdes-Garcia
,
S.-J.
Han
,
D. B.
Farmer
,
I.
Meric
,
Y.
Sun
,
Y.
Wu
,
C.
Dimitrakopoulos
,
A.
Grill
,
P.
Avouris
, and
K. A.
Jenkins
,
Science
332
,
1294
(
2011
).
24.
Z.
Tehrani
,
G.
Burwell
,
M. A. M.
Azmi
,
A.
Castaing
,
R.
Rickman
,
J.
Almarashi
,
P.
Dunstan
,
A. M.
Beigi
,
S. H.
Doak
, and
O. J.
Guy
,
2D Mater.
1
,
025004
(
2014
).
25.
J.
Yang
,
L.
Guo
,
Y.
Guo
,
W.
Hu
, and
Z.
Zhang
,
Appl. Phys. Lett.
112
,
103501
(
2018
).
26.
I.
Iezhokin
,
P.
Offermans
,
S. H.
Brongersma
,
A. J. M.
Giesbers
, and
C. F. J.
Flipse
,
Appl. Phys. Lett.
103
,
053514
(
2013
).
27.
J.
Hu
,
Al. F.
Rigosi
,
M.
Kruskopf
,
Y.
Yang
,
B.-Y.
Wu
,
J.
Tian
,
A. R.
Panna
,
H.-Y.
Lee
,
S. U.
Payagala
,
G. R.
Jones
,
M. E.
Kraft
,
D. G.
Jarrett
,
K.
Watanabe
,
T.
Taniguchi
,
R. E.
Elmquist
, and
D. B.
Newel
,
Sci. Rep.
8
,
15018
(
2018
).
28.
N. S.
Luxmi
and
R. M.
Feenstra
,
J. Vac. Sci. Technol., B
28
,
C5C1
(
2010
).
29.
D.
Roy
,
E.
Blanquet
,
C.
Chatillon
,
T.
Journot
,
M.
Portail
,
L.
Nguyen
,
Y.
Cordier
, and
A.
Michon
,
CrystEngComm
20
,
3702
(
2018
).
30.
E.
Velez-Fort
,
C.
Mathieu
,
E.
Pallecchi
,
M.
Pigneur
,
M. G.
Silly
,
R.
Belkhou
,
M.
Marangolo
,
A.
Shukla
,
F.
Sirotti
, and
A.
Ouerghi
,
ACS Nano
6
,
10893
(
2012
).
31.
D. V.
Badami
,
Nature
193
,
569
(
1962
).
32.
33.
F.
Bechstedt
,
P.
Käckell
,
A.
Zywietz
,
K.
Karch
,
B.
Adolph
,
K.
Tenelsen
, and
J.
Furthmüller
,
Phys. Status Solidi B
202
,
35
(
1997
).
34.
G. R.
Yazdi
,
T.
Iakimova
, and
R.
Yakimova
, “
Fabrication of graphene by thermal decomposition of SiC
,” in
Epitaxial Graphene on Silicon Carbide: Modeling, Devices, and Applications
(
Pan Stanford Publishing
,
2018
).
35.
X.
Shi
,
G.
Pan
,
Y.
Zhou
,
C.
Zou
, and
H.
Gong
,
Appl. Surf. Sci.
284
,
195
(
2013
).
36.
G. W.
Gale
,
H.
Cui
, and
K. A.
Reinhardt
, “
Chapter 4—Aqueous cleaning and surface conditioning processes
,” in
Handbook of Silicon Wafer Cleaning Technology
, edited by
W. K. K. A.
Reinhardt
, 3rd ed. (
Elsevier
,
2018
), p.
202
.
37.
M.
Kubo
,
M.
Hidaka
,
M.
Kageyama
,
T.
Okano
, and
H.
Kobayashi
,
Mater. Sci. Forum
717-720
,
877
(
2012
).
38.
N.
Srivastava
,
G.
He
,
Luxmi
,
P. C.
Mende
,
R. M.
Feenstra
, and
Y.
Sun
,
J. Phys. D: Appl. Phys.
45
,
154001
(
2012
).
39.
Z. R.
Robinson
,
G. G.
Jernigan
,
K. M.
Bussmann
,
L. O.
Nyakiti
,
N. Y.
Garces
,
A.
Nath
,
V. D.
Wheeler
,
R. L.
Myers-Ward
,
D.
Kurt Gaskill
, and
C. R.
Eddy
, Jr.
,
Proc. SPIE
9552
,
95520Y
(
2015
).
40.
J.
Robinson
,
X.
Weng
,
K.
Trumbull
,
R.
Cavalero
,
M.
Wetherington
,
E.
Frantz
,
M.
LaBella
,
Z.
Hughes
,
M.
Fanton
, and
D.
Snyder
,
ACS Nano
4
,
153
(
2010
).
41.
A. J.
Van Bommel
,
J. E.
Crombeen
, and
A.
Van Tooren
,
Surf. Sci.
48
,
463
(
1975
).
42.
S.
Goler
,
C.
Coletti
,
V.
Piazza
,
P.
Pingue
,
F.
Colangelo
,
V.
Pellegrini
,
K. V.
Emtsev
,
S.
Forti
,
U.
Starke
,
F.
Beltram
, and
S.
Heun
,
Carbon
51
,
249
(
2013
).
43.
M.
Sprinkle
,
M.
Ruan
,
Y.
Hu
,
J.
Hankinson
,
M.
Rubio-Roy
,
B.
Zhang
,
X.
Wu
,
C.
Berger
, and
W. A.
de Heer
,
Nat. Nanotechnol.
5
,
727
(
2010
).
44.
E.
Pallecchi
,
F.
Lafont
,
V.
Cavaliere
,
F.
Schopfer
,
D.
Mailly
,
W.
Poirier
, and
A.
Ouerghi
,
Sci. Rep.
4
,
4558
(
2014
).
45.
C.
Riedl
,
C.
Coletti
,
T.
Iwasaki
,
A. A.
Zakharov
, and
U.
Starke
,
Phys. Rev. Lett.
103
,
246804
(
2009
).
46.
S.
Watcharinyanon
,
C.
Virojanadara
,
J. R.
Osiecki
,
A.
Zakharov
,
R.
Yakimova
,
R. I. G.
Uhrberg
, and
L. I.
Johansson
,
Surf. Sci.
605
,
1662
(
2011
).
47.
F.
Speck
,
J.
Jobst
,
F.
Fromm
,
M.
Ostler
,
D.
Waldmann
,
M.
Hundhausen
,
H. B.
Weber
, and
T.
Seyller
,
Appl. Phys. Lett.
99
,
122106
(
2011
).
48.
J.
Kunc
,
M.
Rejhon
, and
P.
Hlídek
,
AIP Adv.
8
,
045015
(
2018
).
49.
C.
Riedl
,
C.
Coletti
, and
U.
Starke
,
J. Phys. D: Appl. Phys.
43
,
374009
(
2010
).
50.
K.
Jan
,
R.
Martin
,
E.
Belas
,
D.
Václav
,
P.
Moravec
, and
F.
Jan
,
Phys. Rev. Appl.
8
,
044011
(
2017
).
51.
W.
Lu
,
J. J.
Boeckl
, and
W. C.
Mitchel
,
J. Phys. D: Appl. Phys.
43
,
374004
(
2010
).
52.
W.
Strupinski
,
K.
Grodecki
,
A.
Wysmolek
,
R.
Stepniewski
,
T.
Szkopek
,
P. E.
Gaskell
,
A.
Grüneis
,
D.
Haberer
,
R.
Bozek
,
J.
Krupka
, and
J. M.
Baranowski
,
Nano Lett.
11
,
1786
(
2011
).
53.
B.
Jabakhanji
,
A.
Michon
,
C.
Consejo
,
W.
Desrat
,
M.
Portail
,
A.
Tiberj
,
M.
Paillet
,
A.
Zahab
,
F.
Cheynis
,
F.
Lafont
,
F.
Schopfer
,
W.
Poirier
,
F.
Bertran
,
P.
Le Fèvre
,
A.
Taleb-Ibrahimi
,
D.
Kazazis
,
W.
Escoffier
,
B. C.
Camargo
,
Y.
Kopelevich
,
J.
Camassel
, and
B.
Jouault
,
Phys. Rev. B
89
,
085422
(
2014
).
54.
K.
Grodecki
,
J. A.
Blaszczyk
,
W.
Strupinski
,
A.
Wysmolek
,
R.
Stępniewski
,
A.
Drabinska
,
M.
Sochacki
,
A.
Dominiak
, and
J. M.
Baranowski
,
J. Appl. Phys.
111
,
114307
(
2012
).
55.
N.
Camara
,
G.
Rius
,
J.-R.
Huntzinger
,
A.
Tiberj
,
L.
Magaud
,
N.
Mestres
,
P.
Godignon
, and
J.
Camassel
,
Appl. Phys. Lett.
93
,
263102
(
2008
).
56.
M.
Kusunoki
and
W.
Norimatsu
,
J. Phys. D: Appl. Phys.
47
,
094017
(
2014
).
57.
L. I.
Johansson
and
C.
Virojanadara
,
J. Mater. Res.
29
,
426
(
2014
).
58.
N.
Camara
,
T.
Antoine
,
J.
Benoit
,
A.
Caboni
,
B.
Jabakhanji
,
N.
Mestres
,
P.
Godignon
, and
C.
Jean
,
J. Phys. D: Appl. Phys.
43
,
374011
(
2010
).
59.
W. A.
de Heer
,
C.
Berger
,
M.
Ruan
,
M.
Sprinkle
,
X.
Li
,
Y.
Hu
,
B.
Zhang
,
J.
Hankinson
, and
E.
Conrad
,
Proc. Natl. Acad. Sci. U. S. A.
108
,
16900
(
2011
).
60.
N.
Camara
,
J.-R.
Huntzinger
,
G.
Rius
,
T.
Antoine
,
N.
Mestres
,
F.
Pérez-Murano
,
P.
Godignon
, and
C.
Jean
,
Phys. Rev. B
80
,
125410
(
2009
).
61.
G.
Rius
,
N.
Camara
,
P.
Godignon
, and
F.
Pérez-Murano
,
J. Vac. Sci. Technol., B
27
,
3149
(
2009
).
62.
C.
Çelebi
,
C.
Yan
k
ı,
A. G.
Demirkol
, and
İ. İ.
Kaya
,
Carbon
50
,
3026
(
2012
).
63.
R.
Zhang
,
Y.
Dong
,
W.
Kong
,
W.
Han
,
P.
Tan
,
Z.
Liao
,
X.
Wu
, and
D.
Yu
,
J. Appl. Phys.
112
,
104307
(
2012
).
64.
S.
Unarunotai
,
Y.
Murata
,
C. E.
Chialvo
,
H.-s.
Kim
,
S.
MacLaren
,
N.
Mason
,
I.
Petrov
, and
J. A.
Rogers
,
Appl. Phys. Lett.
95
,
202101
(
2009
).
65.
J. D.
Caldwell
,
T. J.
Anderson
,
J. C.
Culbertson
,
G. G.
Jernigan
,
K. D.
Hobart
,
F. J.
Kub
,
M. J.
Tadjer
,
J. L.
Tedesco
,
J. K.
Hite
,
M. A.
Mastro
,
R. L.
Myers-Ward
,
C. R.
Eddy
,
P. M.
Campbell
, and
D. K.
Gaskill
,
ACS Nano
4
,
1108
(
2010
).
66.
J.
Kim
,
H.
Park
,
J. B.
Hannon
,
S. W.
Bedell
,
K.
Fogel
,
D. K.
Sadana
, and
C.
Dimitrakopoulos
,
Science
342
,
833
(
2013
).
67.
J.
Xie
and
J. P.
Spallas
, “
Different contrast mechanisms in SEM imaging of graphene
,” Application Note,
2012
.
68.
J.
Fraxedas
and
M.
Castellino
, “
Graphene on SiC: Chemico-physical characterization by XPS
,” in
Epitaxial Graphene on Silicon Carbide: Modeling, Devices, and Applications
, edited by
P.
Godignon
and
G.
Rius
(
Pan Stanford Publishing
,
2018
).
69.
F.
Giannazzo
,
I.
Deretzis
,
A.
La Magna
,
G.
Nicotra
,
C.
Spinella
,
F.
Roccaforte
, and
R.
Yakimova
, “
Nanoscale electrical and structural properties of epitaxial graphene interface with SiC(0001)
,” in
Epitaxial Graphene on Silicon Carbide: Modeling, Characterization, and Applications
, edited by
P.
Godignon
and
G.
Rius
(
Pan Stanford Publishing
,
2018
).
70.
A.
Siokou
,
F.
Ravani
,
S.
Karakalos
,
O.
Frank
,
M.
Kalbac
, and
C.
Galiotis
,
Appl. Surf. Sci.
257
,
9785
(
2011
).
71.
Y. A.
Eva
,
G.
Li
, and
D.
Xu
,
Rep. Prog. Phys.
75
,
056501
(
2012
).
72.
T. S.
Ganbarova
,
A. V.
Babichev
, and
S. A.
Rykov
,
J. Phys.: Conf. Ser.
816
,
012032
(
2017
).
73.
L.-X.
Dong
and
Q.
Chen
,
Front. Mater. Sci. China
4
,
45
(
2010
).
74.
A. C.
Ferrari
and
D. M.
Basko
,
Nat. Nanotechnol.
8
,
235
(
2013
).
75.
M. T.
Wall
,
The Raman Spectroscopy of Graphene and the Determination of Layer Thickness
(
Thermo Fisher Scientific, Madison, WI
,
USA
,
2011
).
76.
Y.
Seekaew
,
O.
Arayawut
,
K.
Timsorn
, and
C.
Wongchoosuk
, “
Synthesis, characterization, and applications of graphene and derivatives
,” in
Carbon-Based Nanofillers and Their Rubber Nanocomposites: Carbon Nano-Objects
, edited by
R. K.
Mishra
,
S.
Thomas
,
N.
Kalarikkal
,
H. J.
Maria
, and
S.
Yaragalla
(
Elsevier
,
2018
).
77.
C. J.
Shearer
,
A. D.
Slattery
,
A. J.
Stapleton
,
J. G.
Shapter
, and
C. T.
Gibson
,
Nanotechnology
27
,
125704
(
2016
).
78.
L. M.
Malard
et al.,
Phys. Rep.
473
,
51
(
2009
).
79.
B.
Tang
,
H.
Guoxin
, and
H.
Gao
,
Appl. Spectrosc. Rev.
45
,
369
(
2010
).
81.
A. W. R.
Warner
and
H.
Jamie
,
Nanoscale
5
,
4079
(
2013
).
82.
K.
Grodecki
,
I.
Jozwik
,
J. M.
Baranowski
,
D.
Teklinska
, and
W.
Strupinski
,
Micron
80
,
20
(
2016
).
83.
J.
Lee
,
X.
Zheng
,
R. C.
Roberts
, and
P. X.-L.
Feng
,
Diamond Relat. Mater.
54
,
64
(
2015
).
84.
W.
Benjamin
,
J. D. H.
Caplins
, and
R. R.
Keller
,
Carbon
149
,
400
(
2019
).
85.
C.
Musumeci
,
Crystals
7
,
216
(
2017
).
86.
See https://www.azonano.com/article.aspx?ArticleID=4180 for Bruker Nano Surfaces, Characterizing Graphene with Atomic Force Microscopy and PeakForce Tapping,
2020
.
87.
F.
Roccaforte
,
F.
La Via
, and
V.
Raineri
,
Int. J. High Speed Electron. Syst.
15
,
781
(
2005
).
88.
K.
Vasilevskiy
,
K.
Zekentes
, and
N.
Wright
, “
Processing and characterisation of ohmic contacts to silicon carbide
,” in
Advancing Silicon Carbide Electronics Technology I
, edited by
Materials Research Foundations
(
Materials Research Forum LLC
,
2018
), Vol. 37, pp.
27
.
89.
M.
Spera
,
G.
Greco
,
D.
Corso
,
S.
Di Franco
,
A.
Severino
,
A. A.
Messina
,
F.
Giannazzo
, and
F.
Roccaforte
,
Materials
12
,
3468
(
2019
).
90.
C.
Hallin
,
R.
Yakimova
,
B.
Pécz
,
A.
Georgieva
,
T.
Marinova
,
L.
Kasamakova
,
R.
Kakanakov
, and
E.
Janzén
,
J. Electron. Mater.
26
,
119
(
1997
).
91.
A. V.
Kuchuk
,
P.
Borowicz
,
M.
Wzorek
,
M.
Borysiewicz
,
R.
Ratajczak
,
K.
Golaszewska
,
E.
Kaminska
,
V.
Kladko
, and
A.
Piotrowska
,
Adv. Condens. Matter Phys.
2016
,
9273702
.
92.
J.
Crofton
,
S. E.
Mohney
,
J. R.
Williams
, and
T.
Isaacs-Smith
,
Solid-State Electron.
46
,
109
(
2002
).
93.
M.
Vivona
,
G.
Greco
,
R.
Lo Nigro
,
C.
Bongiorno
, and
F.
Roccaforte
,
J. Appl. Phys.
118
,
035705
(
2015
).
94.
T.
Cusati
,
G.
Fiori
,
G.
Amit
,
V.
Passi
,
M. C.
Lemme
,
A.
Fortunelli
, and
G.
Iannaccone
,
Sci. Rep.
7
,
5109
(
2017
).
95.
Q.
Ran
,
M.
Gao
,
X.
Guan
,
Y.
Wang
, and
Z.
Yu
,
Appl. Phys. Lett.
94
,
103511
(
2009
).
96.
G.
Giovannetti
,
P. A.
Khomyakov
,
G.
Brocks
,
V. M.
Karpan
,
J.
van den Brink
, and
P. J.
Kelly
,
Phys. Rev. Lett.
101
,
026803
(
2008
).
97.
T.
Moriyama
,
K.
Nagashio
,
T.
Nishimura
, and
A.
Toriumi
,
J. Appl. Phys.
114
,
024503
(
2013
).
98.
T.
Mueller
,
F.
Xia
,
M.
Freitag
,
J.
Tsang
, and
P.
Avouris
,
Phys. Rev. B
79
,
245430
(
2009
).
99.
H.
Xu
,
X.
Wu
,
X.
Li
,
C.
Luo
,
F.
Liang
,
E.
Orignac
,
J.
Zhang
, and
J.
Chu
,
Carbon
127
,
491
(
2018
).
100.
C.
Gong
,
S.
McDonnell
,
X.
Qin
,
A.
Azcatl
,
H.
Dong
,
Y. J.
Chabal
,
K.
Cho
, and
R. M.
Wallace
,
ACS Nano
8
,
642
(
2014
).
101.
M.
Politou
,
I.
Asselberghs
,
I.
Radu
,
T.
Conard
,
O.
Richard
,
C. S.
Lee
,
K.
Martens
,
S.
Sayan
,
C.
Huyghebaert
,
Z.
Tokei
,
S.
De Gendt
, and
M.
Heyns
,
Appl. Phys. Lett.
107
,
153104
(
2015
).
102.
K.
Nagashio
,
T.
Nishimura
,
K.
Kita
, and
A.
Toriumi
,
Appl. Phys. Lett.
97
,
143514
(
2010
).
103.
S.
Yang
,
P.
Zhou
,
L.
Chen
,
Q.
Sun
,
P.
Wang
,
S.
Ding
,
A.
Jiang
, and
D. W.
Zhang
,
J. Mater. Chem. C
2
,
8042
(
2014
).
104.
E.
Watanabe
,
A.
Conwill
,
D.
Tsuya
, and
Y.
Koide
,
Diamond Relat. Mater.
24
,
171
(
2012
).
105.
K. M.
Freedy
,
A.
Giri
,
B. M.
Foley
,
M. R.
Barone1
,
P. E.
Hopkins
, and
S.
McDonnell
,
Nanotechnology
29
,
145201
(
2018
).
106.
W.
Liu
,
J.
Wei
,
X.
Sun
, and
H.
Yu
,
Crystals
3
,
257
(
2013
).
107.
A.
Di Bartolomeo
,
F.
Giubileo
,
F.
Romeo
,
P.
Sabatino
,
G.
Carapella
,
L.
Iemmo
,
T.
Schroeder
, and
G.
Lupina
,
Nanotechnology
26
,
475202
(
2015
).
108.
F. W. T.
Nick
,
H. J. V.
René
,
J. M. M.
Adriaan
,
J. J. L.
Mulders
,
J.-W.
Weber
,
M. M. K.
Wilhelmus
, and
A. A.
Bol
,
2D Mater.
4
,
025046
(
2017
).
109.
G.
Amit
,
S.
Wagner
,
A.
Bablich
,
S.
Kataria
,
V.
Passi
, and
M. C.
Lemme
,
Solid-State Electron.
125
,
234
(
2016
).
110.
B.-C.
Huang
,
M.
Zhang
,
Y.
Wang
, and
J.
Woo
,
Appl. Phys. Lett.
99
,
032107
(
2011
).
111.
A.
Venugopal
,
L.
Colombo
, and
E. M.
Vogel
,
Appl. Phys. Lett.
96
,
013512
(
2010
).
112.
M.
Her
,
R.
Beams
, and
L.
Novotny
,
Phys. Lett. A
377
,
1455
(
2013
).
113.
X.
Liang
,
B. A.
Sperling
,
I.
Calizo
,
G.
Cheng
,
C. A.
Hacker
,
Q.
Zhang
,
Y.
Obeng
,
K.
Yan
,
H.
Peng
,
Q.
Li
,
X.
Zhu
,
H.
Yuan
,
A. R.
Hight Walker
,
Z.
Liu
,
L.-m.
Peng
, and
C. A.
Richter
, “
Toward clean and crackless transfer of graphene
,”
ACS Nano
5
,
9144
(
2011
).
114.
N.
Schaefer
,
R.
Garcia-Cortadella
,
A. B.
Calia
,
N.
Mavredakis
,
X.
Illa
,
E.
Masvidal-Codina
,
J.
de la Cruz
,
E.
Corro
,
L.
Rodríguez
,
E.
Prats-Alfonso
,
J.
Bousquet
,
J.
Martínez-Aguilar
,
A. P.
Pérez-Marín
,
C.
Hébert
,
R.
Villa
,
D.
Jiménez
,
A.
Guimerà-Brunet
, and
J. A.
Garrido
,
Carbon
161
,
647
(
2020
).
115.
W.
Li
,
Y.
Liang
,
D.
Yu
,
L.
Peng
,
K. P.
Pernstich
,
T.
Shen
,
A. R.
Hight Walker
,
G.
Cheng
,
C. A.
Hacker
,
C. A.
Richter
,
Q.
Li
,
D. J.
Gundlach
, and
X.
Liang
,
Appl. Phys. Lett.
102
,
183110
(
2013
).
116.
S.
Gahng
,
C.
Ho Ra
,
Y.
Jin Cho
,
J.
Ah Kim
,
T.
Kim
, and
W.
Jong Yoo
,
Appl. Phys. Lett.
104
,
223110
(
2014
).
117.
J.
Lee
,
Y.
Kim
,
H.-J.
Shin
,
C.
Lee
,
D.
Lee
,
C.-Y.
Moon
,
J.
Lim
, and
S.
Chan Jun
,
Appl. Phys. Lett.
103
,
103104
(
2013
).
118.
B.
Krishna Bharadwaj
,
D.
Nath
,
R.
Pratap
, and
S.
Raghavan
,
Nanotechnology
27
,
205705
(
2016
).
119.
M. S.
Choi
,
S. H.
Lee
, and
W. J.
Yoo
,
J. Appl. Phys.
110
,
073305
(
2011
).
120.
A.
Nourbakhsh
,
M.
Cantoro
,
A.
Hadipour
,
T.
Vosch
,
M. H.
van der Veen
,
M. M.
Heyns
,
B. F.
Sels
, and
S.
De Gendt
,
Appl. Phys. Lett.
97
,
163101
(
2010
).
121.
H.-Y.
Park
,
W.-S.
Jung
,
D.-H.
Kang
,
J.
Jeon
,
G.
Yoo
,
Y.
Park
,
J.
Lee
,
Y. H.
Jang
,
J.
Lee
,
S.
Park
,
H.-Y.
Yu
,
B.
Shin
,
S.
Lee
, and
J.-H.
Park
,
Adv. Mater.
28
,
864
(
2016
).
122.
C.
Kocabas
and
O.
Balci
,
Appl. Phys. Lett.
101
,
243105
(
2012
).
123.
C. E.
Malec
,
B.
Elkus
, and
D.
Davidović
,
Solid State Commun.
151
,
1791
(
2011
).
124.
W. S.
Leong
,
H.
Gong
, and
J. T. L.
Thong
,
ACS Nano
8
,
994
(
2014
).
125.
C.
Cho
,
S. K.
Lee
,
J. W.
Noh
,
W.
Park
,
S.
Lee
,
Y. G.
Lee
,
H. J.
Hwang
,
C. G.
Kang
,
M.-H.
Ham
, and
B. H.
Lee
,
Appl. Phys. Lett.
106
,
213107
(
2015
).
126.
F.
Urban
,
G.
Lupina
,
A.
Grillo
,
N.
Martucciello
, and
A.
Di Bartolomeo
,
Nano Express
1
,
010001
(
2020
).
127.
S. M.
Song
,
T.
Yong Kim
,
O.
Jae Sul
,
W.
Cheol Shin
, and
B.
Jin Cho
,
Appl. Phys. Lett.
104
,
183506
(
2014
).
128.
L.
Anzi
,
A.
Mansouri
,
P.
Pedrinazzi
,
E.
Guerriero
,
M.
Fiocco
,
A.
Pesquera
,
C.
Alba
,
A.
Zurutuza
,
A.
Behnam
, and
E. A.
Carrion
,
2D Mater.
5
,
025014
(
2018
).
129.
J. S.
Moon
,
D.
Curtis
,
S.
Bui
,
M.
Hu
,
D. K.
Gaskill
,
J. L.
Tedesco
,
P.
Asbeck
,
G. G.
Jernigan
,
B. L.
VanMil
,
R. L.
Myers-Ward
,
C. R.
Eddy
, Jr.
,
P. M.
Campbell
, and
X.
Weng
,
IEEE Electron Device Lett.
31
,
260
(
2010
).
130.
T.
Druga
,
M.
Wenderoth
,
F.
Lüpke
, and
R. G.
Ulbrich
,
Appl. Phys. Lett.
103
,
051601
(
2013
).
131.
J. A.
Robinson
,
M.
LaBella
,
M.
Zhu
,
M.
Hollander
,
R.
Kasarda
,
Z.
Hughes
,
K.
Trumbull
,
R.
Cavalero
, and
D.
Snyder
,
Appl. Phys. Lett.
98
,
053103
(
2011
).
132.
V. K.
Nagareddy
,
I. P.
Nikitina
,
D. K.
Gaskill
,
J. L.
Tedesco
,
R. L.
Myers-Ward
,
C. R.
Eddy
,
J. P.
Goss
,
N. G.
Wright
, and
A. B.
Horsfall
,
Appl. Phys. Lett.
99
,
073506
(
2011
).
133.
J. S.
Moon
,
M.
Antcliffe
,
H. C.
Seo
,
D.
Curtis
,
S.
Lin
,
A.
Schmitz
,
I.
Milosavljevic
,
A. A.
Kiselev
,
R. S.
Ross
,
D. K.
Gaskill
,
P. M.
Campbell
,
R. C.
Fitch
,
K.-M.
Lee
, and
P.
Asbeck
,
Appl. Phys. Lett.
100
,
203512
(
2012
).
134.
J. T.
Smith
,
A. D.
Franklin
,
D. B.
Farmer
, and
C. D.
Dimitrakopoulos
,
ACS Nano
7
,
3661
(
2013
).
135.
T.
Yager
,
A.
Lartsev
,
K.
Cedergren
,
R.
Yakimova
,
V.
Panchal
,
O.
Kazakova
,
A.
Tzalenchuk
,
K. H.
Kim
,
Y. W.
Park
,
S.
Lara-Avila
, and
S.
Kubatkin
,
AIP Adv.
5
,
087134
(
2015
).
136.
T.
Le Quang
,
L.
Huder
,
F.
Lipp Bregolin
,
A.
Artaud
,
H.
Okuno
,
N.
Mollard
,
S.
Pouget
,
G.
Lapertot
,
A. G. M.
Jansen
,
F.
Lefloch
,
E. F. C.
Driessen
,
C.
Chapelier
, and
V. T.
Renard
,
Carbon
121
,
48
(
2017
).
137.
Y.
Yang
,
L.-I.
Huang
,
Y.
Fukuyama
,
F.-H.
Liu
,
M. A.
Real
,
P.
Barbara
,
C.-T.
Liang
,
D. B.
Newell
, and
R. E.
Elmquist
,
Small
11
,
90
(
2015
).
138.
A.
Prakash
,
H.
Ilatikhameneh
,
P.
Wu
, and
J.
Appenzeller
,
Sci. Rep.
7
,
12596
(
2017
).
139.
F.
Kiani
,
Z.
Razzaghi
,
B.
Ghadiani
,
M.
Tamizifar
,
M. H.
Mohammadi
, and
S.
Arash
,
Ceram. Int.
43
,
15010
(
2017
).
140.
E.
Kim
,
T.
Yu
,
E.
Sang Song
, and
B.
Yu
,
Appl. Phys. Lett.
98
,
262103
(
2011
).
141.
B.
Liu
,
Y.
Chen
,
C.
You
,
Y.
Liu
,
X.
Kong
,
J.
Li
,
S.
Li
,
W.
Deng
,
Y.
Li
,
H.
Yan
, and
Y.
Zhang
,
J. Alloys Compd.
779
,
140
(
2019
).
142.
B.
Liu
,
I.-S.
Chiu
, and
C.-S.
Lai
,
Vacuum
137
,
8
(
2017
).
143.
S.
Kim
,
J.
Nah
,
I.
Jo
,
D.
Shahrjerdi
,
L.
Colombo
,
Z.
Yao
,
E.
Tutuc
, and
S. K.
Banerjee
,
Appl. Phys. Lett.
94
,
062107
(
2009
).
144.
Y.-L.
Sun
,
D.
Xie
,
J.-L.
Xu
,
X.-M.
Li
,
C.
Zhang
,
R.-X.
Dai
,
X.
Li
,
X.-J.
Meng
, and
H.-W.
Zhu
,
Carbon
96
,
695
(
2016
).
145.
Y.
Wu
,
X.
Zou
,
M.
Sun
,
Z.
Cao
,
X.
Wang
,
S.
Huo
,
J.
Zhou
,
Y.
Yang
,
X.
Yu
,
Y.
Kong
,
G.
Yu
,
L.
Liao
, and
T.
Chen
,
ACS Appl. Mater. Interfaces
8
,
25645
(
2016
).
146.
J.
Gun Oh
,
K.
Pak
,
C.
Sun Kim
,
J. H.
Bond
,
W. S.
Hwang
,
S. G.
Im
, and
B. J.
Cho
,
Small
14
,
1703035
(
2018
).
147.
M.
Tian
,
B.
Hu
,
H.
Yang
,
C.
Tang
,
M.
Wang
,
Q.
Gao
,
X.
Xiong
,
Z.
Zhang
,
T.
Li
,
X.
Li
,
C.
Gu
, and
Y.
Wu
,
Adv. Electron. Mater.
5
,
1800711
(
2019
).
148.
T.
Roy
,
L.
Liu
,
S.
de la Barrera
,
B.
Chakrabarti
,
Z. R.
Hesabi
,
C. A.
Joiner
,
R. M.
Feenstra
,
G.
Gu
, and
E. M.
Vogel
,
Appl. Phys. Lett.
104
,
123506
(
2014
).
149.
J. A.
Alexander-Webber
,
A. A.
Sagade
,
I. A.
Adrianus
,
Z. A.
Van Veldhoven
,
P.
Braeuninger-Weimer
,
R.
Wang
,
A.
Cabrero-Vilatela
,
M.-B.
Martin
,
J.
Sui
,
M. R.
Connolly
, and
S.
Hofmann
,
2D Mater.
4
,
011008
(
2016
).
150.
P. J.
Wessely
and
U.
Schwalke
,
Appl. Surf. Sci.
291
,
83
(
2014
).
151.
P.
Jangid
,
D.
Pathan
, and
A.
Kottantharayil
,
Carbon
132
,
65
(
2018
).
152.
Z.
Liu
,
A. A.
Bol
, and
W.
Haensch
,
Nano Lett.
11
,
523
(
2011
).
153.
C.
Nathan
,
S.
Wu
,
A. D.
Joshua
,
B. W.
Krueger
,
D. O.
Hutchins
,
X.
Xu
,
H.
Ma
, and
K.A.-Y.
Jen
,
Adv. Funct. Mater.
24
,
3464
(
2014
).
154.
X.
Yu
,
Y.
Shen
,
T.
Liu
,
T.
Wu
, and
J. W.
Qi
,
Sci. Rep.
5
,
12014
(
2015
).
155.
N.
Liu
,
H.
Tian
,
G.
Schwartz
,
J. B.-H.
Tok
,
T.-L.
Ren
, and
Z.
Bao
,
Nano Lett.
14
,
3702
(
2014
).
156.
D.
Wu
,
K.
Yan
,
Y.
Zhou
,
H.
Wang
,
L.
Lin
,
H.
Peng
, and
Z.
Liu
,
J. Am. Chem. Soc.
135
,
10926
(
2013
).
157.
D.
Kondo
,
S.
Sato
,
K.
Yagi
,
N.
Harada
,
M.
Sato
,
M.
Nihei
, and
N.
Yokoyama
,
Appl. Phys. Express
3
,
025102
(
2010
).
158.
M.
Tian
,
X.
Li
,
T.
Li
,
Q.
Gao
,
X.
Xiong
,
Q.
Hu
,
M.
Wang
,
X.
Wang
, and
Y.
Wu
,
ACS Appl. Mater. Interfaces
10
,
20219
(
2018
).
159.
N. S. G.
Norton
and
L.
Michael
,
Anal. Chim. Acta
853
,
127
(
2015
).
160.
W.
Schneider
,
F. L.
Jiang
,
E. P.
van Geest
,
M. C.
Lia
, and
F.
Lima Grégory
,
Adv. Mater.
29
,
1603610
(
2016
).
161.
Z.
Wang
,
K.
Yi
,
Q.
Lin
,
L.
Yang
,
X.
Chen
,
H.
Chen
,
Y.
Liu
, and
D.
Wei
,
Nat. Commun.
10
,
1544
(
2019
).
162.
D.
Kireev
,
M.
Brambach
,
S.
Seyock
,
V.
Maybeck
,
W.
Fu
,
B.
Wolfrum
, and
A.
Offenhäusser
,
Sci. Rep.
7
,
6658
(
2017
).
163.
K.
Xu
,
H.
Lu
,
E. W.
Kinder
,
A.
Seabaugh
, and
S. K.
Fullerton-Shirey
,
ACS Nano
11
,
5453
(
2017
).
164.
F.
La Via
,
M.
Camarda
, and
A.
La Magna
,
Appl. Phys. Rev.
1
,
031301
(
2014
).
165.
T.
Kimoto
,
Prog. Cryst. Growth Charact. Mater.
62
,
329
(
2016
).
166.
A.
Schoner
, “
Ion implantation and diffusion in SiC
,” in
Process Technology for Silicon Carbide Devices
, edited by
C.-M.
Zetterling
(
INSPEC, Institution of Electrical Engineers (IEE)
,
London, UK
,
2002
), p.
51
.
167.
P.
Godignon
,
T.
Frank
, and
K.
Zekentes
, “
Silicon carbide doping by ion implantation
,” in
Advancing Silicon Carbide Electronics Technology II
, edited by
K.
Vasilevskiy
,
K.
Zekentes
, and
Material Research Foundations
(
Materials Research Forum LLC
,
2020
), Vol. 69.
168.
R.
Nipoti
,
A.
Carnera
,
G.
Alfieri
, and
L.
Kranz
,
Mater. Sci. Forum
924
,
333
(
2018
).
169.
J.
Zhu
,
H.
Kim
,
H.
Chen
,
R.
Erickson
, and
D.
Maksimović
, in
IEEE Applied Power Electronics Conference and Exposition (APEC)
(
IEEE
,
Sanantonio, TX, USA
,
2018
), p.
1428
.
170.
N.
Zabihi
,
A.
Mumtaz
,
T.
Logan
,
T.
Daranagama
, and
R. A.
McMahon
,
Mater. Sci. Forum
963
,
869
(
2019
).
171.
J. A.
Robinson
,
M.
Hollander
,
M.
LaBella
 III
,
K. A.
Trumbull
,
R.
Cavalero
, and
D. W.
Snyder
,
Nano Lett.
11
,
3875
(
2011
).
172.
K. Ho
Kim
,
H.
He
,
C.
Struzzi
,
A.
Zakharov
,
C.
Giusca
,
A.
Tzalenchuk
,
R.
Yakimova
,
S.
Kubatkin
, and
S.
Lara-Avila
,
Phys. Rev. B
102
,
165403
(
2020
).
173.
Z.
Guo
,
R.
Dong
,
P. S.
Chakraborty
,
N.
Lourenco
,
J.
Palmer
,
Y.
Hu
,
M.
Ruan
,
J.
Hankinson
,
J.
Kunc
,
J. D.
Cressler
,
C.
Berger
, and
W. A.
de Heer
,
Nano Lett.
13
,
942
(
2013
).
174.
C.
Yu
,
Z. Z.
He
,
J.
Li
,
X. B.
Song
,
Q. B.
Liu
,
S. J.
Cai
, and
Z. H.
Feng
,
Appl. Phys. Lett.
108
,
013102
(
2016
).
175.
C.
Yu
,
Z. Z.
He
,
X. B.
Song
,
Q. B.
Liu
,
S. B.
Dun
,
T. T.
Han
,
J. J.
Wang
,
C. J.
Zhou
,
J. C.
Guo
,
Y. J.
Lv
,
S. J.
Cai
, and
Z. H.
Feng
,
Appl. Phys. Lett.
111
,
033502
(
2017
).
176.
Z.
He
et al.,
Carbon
164
,
435
(
2020
).
177.
Z.-Z.
He
,
K.-W.
Yang
,
C.
Yu
,
Q.-B.
Liu
,
J.-J.
Wang
,
J.
Li
,
W.-Li
Lu
,
Z.-H.
Feng
, and
S.-J.
Cai
,
Chin.Phys.B
25
,
067206
(
2016
).
178.
H.
He
,
S.
Lara-Avila
,
K. H.
Kim
,
N.
Fletcher
,
S.
Rozhko
,
B.
Tobias
,
G.
Eklund
,
K.
Cedergren
,
R.
Yakimova
,
Y. W.
Park
,
T.
Alexander
, and
S.
Kubatkin
,
Metrologia
56
,
045004
(
2019
).
179.
J.
Hicks
,
A.
Tejeda
,
A.
Taleb-Ibrahimi
,
M. S.
Nevius
,
F.
Wang
,
K.
Shepperd
,
J.
Palmer
,
F.
Bertran
,
P.
Le Fèvre
,
J.
Kunc
,
W. A.
de Heer
,
C.
Berger
, and
E. H.
Conrad
,
Nat. Phys.
9
,
49
(
2013
).
180.
W. S.
Hwang
,
P.
Zhao
,
K.
Tahy
,
O. N.
Luke
,
V. D.
Wheeler
,
R. L.
Myers-Ward
,
C. R.
Eddy
, Jr.
,
D.
Kurt Gaskill
,
J. A.
Robinson
,
W.
Haensch
,
H.
Xing
,
A.
Seabaugh
, and
D.
Jena
,
APL Mater.
3
,
011101
(
2015
).
181.
J.
Baringhaus
,
M.
Ruan
,
F.
Edler
,
A.
Tejeda
,
M.
Sicot
,
A.
Taleb-Ibrahimi
,
A.-P.
Li
,
Z.
Jiang
,
E. H.
Conrad
,
C.
Berger
,
C.
Tegenkamp
, and
W. A.
de Heer
,
Nature
506
,
349
(
2014
).
182.
J.
Baringhaus
,
J.
Aprojanz
,
J.
Wiegand
,
D.
Laube
,
M.
Halbauer
,
J.
Hübner
,
M.
Oestreich
, and
C.
Tegenkamp
,
Appl. Phys. Lett.
106
,
043109
(
2015
).
183.
V.
Prudkovskiy
,
Y.
Hu
,
K.
Zhang
,
Y.
Hu
,
P.
Ji
,
N.
Grant
,
J.
Zhao
,
C.
Shi
,
Antonio Tejeda
,
A.
De Cecco
,
C.
Winkelmann
,
Y.
Jiang
,
T.
Zhao
,
Z.
Jiang
,
L.
Ma
,
C.
Berger
, and
W. A.
de Heer
, https://hal.archives-ouvertes.fr/hal-02350189 (
2019
).
184.
B.
Jouault
,
N.
Camara
,
B.
Jabakhanji
,
A.
Caboni
,
C.
Consejo
,
P.
Godignon
,
D. K.
Maude
, and
J.
Camassel
,
Appl. Phys. Lett.
100
,
052102
(
2012
).
185.
D.
Waldmann
,
J.
Jobst
,
F.
Speck
,
T.
Seyller
,
M.
Krieger
, and
H. B.
Weber
,
Nat. Mater.
10
,
357
(
2011
).
186.
V.
Passi
,
A.
Gahoi
,
E. G.
Marin
,
T.
Cusati
,
A.
Fortunelli
,
G.
Iannaccone
,
G.
Fiori
, and
M. C.
Lemme
,
Adv. Mater. Interfaces
6
,
1801285
(
2019
).
187.
T.
Ohta
 et al,
Science
313
(
5789
),
951
954
(
2006
).