A nonvolatile memory device with very low power consumption based on the switching of a standard electrode potential

Low energy consumption and simple structures will be a key feature of the next generation of highly integrated memory devices used in high-performance computing. Resistance memory devices based on the displacement or diffusion of ions, including resistive random access memory (ReRAM),^1–3 atomic switches,^4,5 and memristors,^6,7 have attracted great interest^8,9 because they offer low energy consumption,¹⁰ simple structure, and fast switching;¹¹ moreover, they can be scaled down to ∼10 nm. Although such memory devices are promising candidates for the next-generation memory technologies, there is a strong demand for the development of memory devices with much lower energy consumption and even simpler structures.

While a voltage-switching-type memory is a promising candidate for a new generation memory, its development is still at its early stages. Metal/oxide/metal resistive switching devices are reported to show a voltage-switching behavior originating from electrochemical reactions in the device.^12–14 Such voltage switching is observed both in filament-^12,13 and interface-type^12,14 resistive switching devices. For the filament-type device, previous reports showed instability in performance.¹⁵ Accordingly, the interface-type device attracts attention for better stability. However, the voltage memory retention time of the interface-type device is limited only to a few thousands of seconds,¹⁶ and currently, only a few papers focus on the investigation of the interface structures, e.g., using impedance spectroscopy.

In this paper, by utilizing Li-ion as an active ion instead of oxygen ions, we have succeeded in developing an interface type voltage switching memory device with memory retention time of days scale. We demonstrate nonvolatile switching between the high-voltage state (HVS) and the low-voltage state (LVS) in a Li/Li₃PO₄/Au thin film heterostructure fabricated on a glass substrate. The unique feature of our device is the hysteretic behavior in an open-circuit voltage (V_oc). We have found that bistable states with a V_oc of ∼0.7 and ∼0.3 V were reversibly switched by applying an external voltage of 2.0 and 0.18 V, respectively. We show that interfacial effects at the interface between the solid electrolyte and the electrode play a crucial role in the switching behavior. The biggest advantage of this device is that the voltage state is switchable with very small power consumption.

Our device consists of a stack of Li, Li₃PO₄, and Au electrodes (Fig. 1). First, an Au electrode was deposited on a silica glass substrate using a direct current (DC) magnetron sputtering method. The substrate temperature, background pressure, Ar pressure, target size, and DC power were ∼300 K, <1.0 × 10⁻⁶ Pa, 1.0 Pa, diameter of 29 mm, and 20 W, respectively. On the Au electrode, an amorphous Li₃PO₄ electrolyte layer,¹⁷ a chemically stable solid electrolyte widely used to fabricate thin-film lithium batteries,^18–20 was deposited using pulsed laser deposition (PLD) with an ArF excimer laser (wavelength of 193 nm). The substrate temperature, background pressure, laser fluence, and laser repetition frequency were ∼300 K, <1.0 × 10⁻⁶ Pa, 1 J/cm², and 5 Hz, respectively.²¹ Finally, a metallic Li film was deposited on the Li₃PO₄ layer using thermal evaporation in a vacuum chamber with a background pressure below 7.0 × 10⁻⁷ Pa. The typical thicknesses of the Li, Li₃PO₄, and Au layers were 500, 250, and 200 nm, respectively. A schematic and top-view photograph of the prepared device is shown in Figs. 1(a) and 1(b), respectively. The electrochemical and memory properties of the devices were measured using VSP (Bio-Logic SAS, Seyssinet-Pariset, France) and Modulab xs (Solartron Analytical, Inc., Wokingham, United Kingdom). The impedance spectra were obtained by applying an alternating current (AC) voltage with an amplitude of 35.5 mV at frequencies ranging from 1 Hz to 1 MHz. Cyclic voltammetry (CV) measurements, which is a similar technique to the current–voltage characteristic measurement of semiconductor devices, were carried out in a voltage range between 0 and 4.5 V with a scan rate of 4 mV/s. A higher positive bias voltage was applied to the Au electrode, and a positive current was defined as the current flowing from the Au to the Li electrode through the Li₃PO₄ electrolyte. All of the measurements were performed at room temperature. Ni-coated probes were used to make an electrical contact with the Li or Au electrodes. One cycle of the CV measurement was performed as a forming process prior to the memory operations. All of the processes, including the film depositions, sample transfers, and electrochemical measurements, were carried out in ultrahigh vacuum (<1.0 × 10⁻⁶ Pa); that is, the samples were never exposed to air in any processes to avoid contamination of the interfaces.²² 

Figure 2(a) shows typical set and reset operations of the Li/Li₃PO₄/Au device. The set state refers to the transition from a LVS (V_oc = 0.3 V) to a HVS (V_oc = 0.7 V) by increasing the applied voltage from 0.3 to 2.0 V ((i) in Fig. 2(a)). After the applied voltage of 2.0 V was removed, the V_oc value decreased in about an hour and stabilized at ∼0.7 V ((ii) in Fig. 2(a)). The reverse reset operation, which is defined as the decrease of the applied voltage from 0.7 to 0.18 V ((iii) in Fig. 2(a)), switched V_oc from a HVS to a LVS ((iv) in Fig. 2(a)). The switching between these two states was reversible (Fig. 2(b)), which demonstrated nonvolatile unipolar memory operations. The voltage difference between the two states was larger than that of a typical dynamic random access memory (DRAM) device. We note that no set and reset operation was observed if the device was exposed to air after the deposition of the Au electrode, prior to the deposition of Li₃PO₄. This result suggests that the interface between the Au electrode and Li₃PO₄ plays a crucial role.

Although the voltage equilibration time after set/reset operations is in the order of an hour, this equilibration is not a disadvantage of this memory. When the memory cell voltage is set to the HVS, the voltage gradually decreases toward equilibrium voltage; we note that the voltage is always higher than the equilibrium voltage at non-equilibrium state (Fig. 2(a), (ii)). Therefore, the memory cell can be read out anytime even immediately after setting to the HVS (Fig. 2(b)). The situation is the same for the LVS; the voltage is always lower than the equilibrium voltage at LVS, enabling the read out of low-voltage state regardless of the long equilibration time.

To understand the origin of the switching behavior of V_oc, cyclic voltammetry (CV) measurements were performed. The CV results of the Li/Li₃PO₄/Au device show a hysteretic behavior with several peaks (Fig. 3), which is a specific feature of electrochemical devices. As the bias voltage is increased from 0 V, two peaks appeared at ∼0.6 and 1.7 V, indicating that the current flows from Au to Li through Li₃PO₄. As no significant peak was observed between 2.0 and 4.5 V, the Li₃PO₄ electrolyte was stable up to 4.5 V. In the reverse process, a very flat signal was observed as the bias voltage was decreased from 4.5 V to ∼0.3 V, and then the current flowing from Li to the Au electrode through Li₃PO₄ sharply increased at ∼0.2 V. In a Li/Li₃PO₄/Pt system,²¹ the peaks in the CV were interpreted as de-alloying and alloying processes of the Pt–Li alloy at the Li₃PO₄/Pt interface. Peaks observed at 0.6 and 1.7 V represented de-alloying of the Pt–Li alloy to Li and Pt metal,²³ whereas the peak at 0.2 V in the reverse process originated from Li plating on the Pt electrode. This chemical reaction at the surface of an electrode is known as an underpotential deposition.^24,25 Consequently, in the case of Li/Li₃PO₄/Au, when a set voltage of 2.0 V was applied ((i) in Fig. 2(a)), Li atoms on the Au side are transferred to the Li electrode, and a Li/Li₃PO₄/Au structure is formed ((ii) in Fig. 2(a)). Thus, we propose that an additional Au–Li alloy thin film layer is formed at the Li₃PO₄/Au interface, that is, a Li/Li₃PO₄/Au–Li/Au structure ((iv) in Fig. 2(a)).

The formation of an ultrathin Au–Li alloy layer at the Li₃PO₄/Au interface was confirmed by AC impedance measurements (Fig. 4(a)). The magnified Nyquist plot (Fig. 4(b)) obtained in the LVS shows one semicircle in the high-frequency region and an additional semicircle in the low-frequency region, whereas only one semicircle was observed in the high-frequency region in the HVS. It is well known that a semicircle in the high-frequency region originates from the impedance of the Li₃PO₄ electrolyte; the conductivity evaluated from this semicircle, 1.4 × 10⁻⁵ S/cm, is in good agreement with the ionic conductivity of Li₃PO₄.^26,27 The most plausible origin of the small semicircle observed in the low-frequency region in the LVS is the resistance and capacitance at the Li₃PO₄/Au interface, namely, a contribution from the ultrathin Au–Li layer. The frequency range, 10²–10³ Hz, matches well with that observed for interface resistance,²⁰ suggesting that a contribution from the interface is very likely. Furthermore, as the interface resistance at the Li/Li₃PO₄ interface is very small and appears in a different frequency region,²⁰ the contribution from the Li/Li₃PO₄ interface is negligible. Therefore, the small semicircle originates from the formation of an ultrathin Au–Li alloy layer at the Li₃PO₄ electrolyte/Au electrode interface in the LVS.

The above results suggest that the most important factor for the switching of V_oc is the change in standard electrode potential caused by the incorporation of a very small amount of Li atoms into the Au electrode. The Au electrode is capable of incorporating a small amount of Li at the interface without changing its crystal structure.^24,28–30 Because Au and Li have the largest and smallest standard electrode potential among all metals, respectively, a large standard voltage change should occur in the Au electrode upon the formation of an ultrathin Au–Li alloy. We confirmed that a device using an electrode made of Ni (which also has a large standard electrode potential) shows similar switching behavior with large voltage change (data not shown). This result is evidence that the difference of standard electrode potential between the Li and opposite electrodes is the determinant factor in the device voltage change. According to theoretical calculations, the electric potential of Au vs. Li changes from 0.7 to 0.3 V after the deposition of 0.4 monolayers of Li on Au.³⁰ 

Since the large change in voltage is induced by a small amount of charge transfer upon switching, our devices operate in a low energy consumption regime. This improvement, which achieved the property beyond that of DRAM devices, can be explained by the different voltage change mechanisms. DRAM devices rely on the capacitance of the cell, in which case, the voltage (V) across the capacitor is determined by V = Q/C, where Q is the charge required to switch from a low-voltage state to a high-voltage state. In our devices, V_oc changes drastically with a small change in Q, leading to more efficient switching.

Next, we investigated the power consumption properties of our device to determine its feasibility for applications requiring very low power consumption. The net charge value required for voltage switching was ∼3 × 10⁻⁵ C, which was estimated from a current–time plot during switching operations from a LVS to a HVS (Fig. S1 of the supplementary material). The amount of net charge required for voltage switching is proportional to the area of the Li₃PO₄/Au interface. Therefore, if we assume that the present device (about 4 mm²) could be reduced to 20 × 20 nm, the required charge for switching would be reduced to 1 × 10⁻¹⁴ C. As the maximum voltage used for a switching was ∼2 V, the energy required for switching was less than 2 × 10⁻¹⁴ J, which is much lower than that of DRAM, ReRAM, and other memory devices that have been reported; the typical energy required by a DRAM device is 10⁻¹³ J.³¹ Therefore, extremely low energy switching is possible using this device.

This small net charge for switching should also lead to fast read/write speed. The read/write speed strongly depends on the capacitance of the device and the ionic conductivity of the device. The ionic conductivity of the device is governed by that of a solid electrolyte, and the contribution of the interface resistance values across Li₃PO₄/Au and Li₃PO₄/Li interfaces is negligible from the following reason. We could estimate the interface resistance from the impedance spectrum (Fig. 4(b)); although the component originating from an interface resistance should appear at around 1 kHz (Ref. 20), we could only observe the semicircle corresponding to the bulk ionic conductance of the solid electrolyte. This result indicates that the interface resistance is smaller than 1 kΩ, which is much smaller than the resistance of solid electrolyte bulk, ∼60 kΩ. Consequently, the effect of interface resistance is negligible. If we assume an ionic conductivity of 1.2 × 10⁻² S/cm, a typical value for Li₁₀GeP₂S₁₂ (Ref. 32), and ignore the interface resistance across the solid electrolyte/electrode interfaces, the read/write switching speed was estimated to be 30 ns (see Fig. S2 in the supplementary material for the calculations). This value is comparable to that of DRAM.

For practical application of this device, it will be critical to enhance the endurance (the number of read and write cycles) and the memory retention time. We confirmed stable switching for at least 10 cycles. Considering the endurance of solid-state lithium batteries, which have a similar structure to our device, ∼10⁴ times, a comparable endurance with solid-state lithium batteries is expected for the memory device. We expect to obtain much larger endurance than that of the solid-state lithium batteries in miniaturized devices because the device works with much smaller charge and current than those of the batteries.

Although stable repetitive switching was observed, the memory retention time was only limited to a few weeks (Fig. S3 of the supplementary material). The HVS was stable with a slight increase of V_oc, demonstrating that the device is nonvolatile. In contrast, the voltage in the LVS gradually increased; V_oc value became identical with that in the HVS after two weeks. The short memory retention time can be explained by the self-discharge of Li–ion batteries. In the LVS of Li/Li₃PO₄/Au device, the self-discharge result in dealloying of Li–Au alloy and the open circuit voltage is increased, which means that the memory is lost. Self-discharge could be suppressed by using a solid-electrolyte with a higher transport number.

We prepared a miniaturized device using a 50 × 200 μm Au electrode (a schematic of the device is shown in Fig. S4 of the supplementary material) and investigated its properties. The V_oc switching was successfully observed upon repetitive application of an external voltage of 2 and 0.18 V (data not shown). Further miniaturization of the device is currently in progress. We note that both the Li and the Au electrodes may be replaced by other materials. The role of Li electrode is identical to that of negative electrode in Li-ion batteries. Accordingly, Si and other negative electrodes used in Li-ion batteries are candidates for the alternative materials. In addition, the Au electrode may be replaced with other materials which have large standard electrode potential, for example, Cu, Ni, and Cr.

In summary, we demonstrated stable nonvolatile switching of V_oc in a Li/Li₃PO₄/Au heterostructure device. A bias voltage scan from 0.3 to 2.0 V drove the junction from a low V_oc state to a high V_oc state. The formation of an Au–Li alloy at the Li₃PO₄/Au interface plays an important role in this switching behavior. The results suggest that such stable voltage switching with very low power consumption originates from a drastic change in the standard electrode potential induced by the transfer of a very small amount of Li ions. The simple device structure and the switching mechanism should lead to highly integrated, high-speed, low-energy-consumption memory devices.

See supplementary material for the detailed memory operation data of the Li/Li₃PO₄/Au device, calculation details of switching speed estimation in the miniaturized device, detailed data for the memory retention time and a schematic of the miniaturized device.

This research was supported by the JST-CREST and the World Premier International Research Center Initiative (WPI Initiative), the Japan Society for the Promotion of Science through its Funding Program for World-Leading Innovation R&D on Science. I.S. acknowledges a Grant-in-Aid for JSPS Fellows (No. 15J06927). T.H. acknowledges KAKENHI (Grant Nos. 26610092, 26246022, 26106502, and 26108702).

All of the authors acknowledge Dr. Patrick Han (AIMR, Tohoku University) for checking and correcting English of this manuscript.