Microscopic origin of low frequency noise in MoS₂ field-effect transistors

We report measurement of low frequency 1/f noise in molybdenum di-sulphide (MoS₂) field-effect transistors in multiple device configurations including MoS₂ on silicon dioxide as well as MoS₂-hexagonal boron nitride (hBN) heterostructures. All as-fabricated devices show similar magnitude of noise with number fluctuation as the dominant mechanism at high temperatures and density, although the calculated density of traps is two orders of magnitude higher than that at the SiO₂ interface. Measurements on the heterostructure devices with vacuum annealing and dual gated configuration reveals that along with the channel, metal-MoS₂ contacts also play a significant role in determining noise magnitude in these devices.

Atomically thin films of MoS₂ have emerged as a promising platform for transparent flexible electronics. In the field-effect geometry, MoS₂ offers several advantages that include large on-off ratio, immunity against short channel effects, and small subthreshold swing.^1,2 These promise MoS₂-based logic devices^3,4 and energy-efficient field-effect transistor,^5–7 although presence of localized band tail due to disorder,⁸ and metal-MoS₂ Schottky barriers^1,9 at the contacts were found to severely affect the performance, i.e., mobility of these devices. Low frequency noise, on the other hand, is also considered as one of the basic performance limiting factors in electronic devices, but the effect of the above-mentioned factors on noise is not clearly understood till date. Several groups have recently studied low frequency noise in MoS₂. Sangwan et al.¹⁰ showed that noise magnitude increases by two orders of magnitude on exposure to ambient condition, whereas Renteria et al.¹¹ has demonstrated that the noise level considerably increases with prolong exposure to atmospheric condition. Xie et al.¹² have performed noise measurement in MoS₂ devices before and after annealing in high vacuum, and showed that noise decreases by a factor of 20 after annealing. These studies mainly focus on the effect of external adsorbates on 1/f noise, and a proper understanding of the origin of noise in terms of both internal and external disorder along with contact induced effects is still lacking.

In this letter, we show that along with the channel, contacts also play a crucial role in determining the overall noise magnitude in MoS₂ transistor devices. To show this, we systematically study 1/f noise measurement in MoS₂ devices at high vacuum (∼ 2 × 10⁻⁶ mbar) where the effect of atmospheric water vapour is minimal. In order to find the effect of lithographic contaminations and residual water vapour, we fabricate MoS₂ devices protected with hexagonal boron nitride. Comparison of 1/f noise measurement in protected and unprotected devices before and after annealing indicate that the lithographic polymer, and residual water vapour play a minimal role whereas the transparency of contacts significantly affects the total magnitude of noise in these devices. We also comment on the channel contribution to total noise from our measurement in dual-gated MoS₂ devices.

Bulk MoS₂ crystals were obtained from SPI supplies, and were characterized thoroughly with X-ray photoemission spectroscopy (XPS) and Raman spectroscopy (see Sec. I of the supplementary material¹³). In this work, we study two different classes of devices: (1) MoS₂ devices on Si/SiO₂ substrate, and (2) MoS₂-hBN heterostructure devices. In case of the former, single and bilayer MoS₂ flakes were exfoliated on 285 nm Si/SiO₂ wafer using the scotch tape technique. Heterostructure devices were fabricated using well known Van der Waals assembly process^14,15 (see Sec. II of the supplementary material¹³). Two different types of heterostructure devices were prepared with MoS₂ being placed either on hBN, or below. We consider the latter as “protected device” since in these devices the channel is never exposed to lithographic polymer residues, and presence of water vapour at the MoS₂-hBN interface is minimal as the transfer process was performed at 120 °C. The degenerately doped Si was used as backgate. Contact pads were designed using standard ebeam lithography, and thermal evaporation of Au (without any adhesive layer, such as Ti or Cr) (see Sec. II of the supplementary material¹³). An optical micrograph of a typical device is shown in bottom-right inset of Fig. 1(a). In all devices (see Table I), the current-voltage (I_DS − V_DS) characteristics were linear at low source-drain bias V_DS ⩽ 100 mV, and high back gate voltage (V_BG) around room temperature (see Fig. S2 of the supplementary material¹³). We restricted the excitation bias to V_DS ⩽ 100 mV to ensure measurements in linear regime. Both conductivity, and noise measurement were performed in two-probe configuration due to high resistance of the samples using current mode of lock-in amplifier. For noise measurement the sample was biased with an ac voltage ≈10mV (rms) at 777 Hz. The sample current was passed through a low noise preamplifier and measured using lock-in technique.¹⁶ The current fluctuation data were recorded as a function of time as illustrated in the inset of Fig. 1(b), and was Fourier transformed to obtain current noise power spectral density S_I/I² as a function of frequency f. For all devices I² dependence was checked at every temperature before measurement to avoid any heating induced effect (see Fig. S3 of the supplementary material¹³). Due to linearity, the current power spectral density could be converted to conductivity fluctuation power spectral density S_σ/σ² using the relation S_σ/σ² = S_I/I².

The backgate transfer characteristics of a typical single layer device at various temperatures are shown in Fig. 1(a). We find that from 120 K to 240 K conductivity (σ) increases with increasing temperature indicating a localized transport in this regime.⁸ Above 240 K, temperature dependence of conductivity reverses which indicates localized to weak metallic transition (see inset Fig. 1(d)).^9,17 Low frequency noise in our devices showed 1/f-type power spectrum (Fig. 1(b)) in the entire gate voltage range down to 80 K. The gate voltage dependence of S_σ/σ² is shown in Fig. 1(c). We observed that S_σ/σ² decreases monotonically with increasing gate voltage at a fixed temperature. Temperature dependence of S_σ/σ² at three different V_BG is shown in Fig. 1(d). We observed that noise, like conductivity, is also non-monotonic in temperature. It increases sharply with decreasing temperature below 240 K which can be attributed to the localized state transport, where an exponential increase in noise is predicted due to the broad distribution of the waiting time of the carriers between successive hops.¹⁸ On the other hand, for T > 240 K, where σ displays a metal-like transport,^9,17 the noise magnitude slowly increases with increasing temperature similar to diffusive quasi-metallic systems.¹⁹ 

In the subsequent sections, we will only discuss the noise behaviour in the diffusive, i.e., high density and temperature regime which is of technological relevance. We first discuss the carrier density dependence of noise in MoS₂ devices on SiO₂ substrate. To obtain carrier density (n), we define V_ON (top-left inset of Fig. 1(a)) as the backgate voltage at which the current through the device became measurable (≈1 pA) at T = 300 K. The parameter ΔV_BG = V_BG − V_ON is then approximately proportional to carrier density (n) particularly at high ΔV_BG. In Fig. 2(a), we plot ΔV_BG dependence of noise for 1L-2 device at various temperature. We find that the dependence slowly becomes 1/(ΔV_BG)² as temperature approaches to room temperature. In Fig. 2(b), we plot carrier density dependence of room temperature noise for three different devices on Si/SiO₂ substrate. We observe that at low ΔV_BG, the variation differs from one sample to another and may be connected to the details of electron localization. However, at large ΔV_BG, all devices show

$Sσ/σ2∝1/ΔVBG2$⁠, which is a characteristic feature of number fluctuation in semiconductor channels.²⁰ The interfacial trap states in the SiO₂ substrate close to channel has been quantitatively shown to cause similar scenario in graphene-on-SiO₂^21,22 and Si-MOSFETs.²³ In order to check whether the oxide traps can account for the observed noise, we calculate interfacial trap density D_it from observed noise magnitude using²⁴ 

where g_m, L, and W are device transconductance, length, and width, respectively, q is electronic charge, C_ox is gate oxide capacitance per unit area. The application of the number fluctuation model here is justified by the observation of nearly constant

$SI/gm2$ in our devices,²⁵ which also suggests that at high ΔV_BG resistance at the MoS₂-Au interface could be mainly due to randomly distributed defects states, rather than a conventional Schottky barriers at the metal-semiconductor interface. Similar conclusion was reached in tunneling spectroscopic study as well.²⁶ The calculated D_it which ranges between 6×10¹⁰ and 1 × 10¹² cm⁻² eV⁻¹ has been plotted in the inset of Fig. 2(b) for three different devices on SiO₂ substrate. We observe that D_it is approximately one to two orders of magnitude higher than SiO₂ trap density²⁴ (see Sec. VI of the supplementary material for details¹³). Recent studies of noise,¹¹ as well as space charge limited conductivity,²⁷ yield very similar magnitude of trap density in MoS₂ thin film transistors.

For further understanding on the defects states, we fabricated MoS₂ transistor on crystalline hexagonal boron nitride (hBN) substrate known to be free from surface trap states and dangling bonds.²⁸ This device architecture eliminates the SiO₂ trap states as a mean to exchange carriers with the channel. Noise measurements on two “MoS₂ on hBN” devices are shown in Fig. 3(a) which also follow

$1/ΔVBG2$ dependence at high ΔV_BG. The area normalized noise magnitude for these two devices are compared with SiO₂-supported devices as a function of carrier density in Fig. 3(b). We find that the noise level in both kinds of devices is similar which indicates that only the interfacial trap charges cannot account for the observed noise magnitude.

The high noise level in as-fabricated devices, as discussed above, can be attributed to several factors. Lithographic polymer residues can act as additional trapping-detrapping source. Localized trap states inside the channel due to sulphur vacancies can slowly exchange carrier to contribute to noise.^20,29–31 Moreover, as mentioned earlier, all our devices were measured in high vacuum which ensures significant, but not entire, removal of the adsorbed water vapour from the surface of channel, and thus, remaining adsorbate can also affect the noise level. Conductivity fluctuations can also happen at the contact due to presence of spatially inhomogeneous Schottky barrier.³² In order to address the contribution from the above-mentioned factors, we fabricate devices by transferring a thin (∼20 nm) single crystalline layer of hBN on top of the MoS₂ flake prior to lithography processes. Such encapsulation protects the channel from acrylic residues, and the possibility of the presence of water vapor is also minimal as the transfer was done at 120 °C. Here we present the data from a typical device where two 2-probe channels were fabricated on the same MoS₂ flake. A schematic and an optical micrograph of the device is shown in Figs. 4(a) and 4(b), respectively. The channel between probe 1 and probe 2 was exposed to fabrication-induced atmospheric contaminations, whereas the part between 2 and 3 was protected by hBN. We could not perform noise measurement in ambient condition in the unprotected channel due to large relaxation of I_DS in the time scale of noise data acquisition (see Fig. S4 of the supplementary material¹³). Therefore, we evacuated the cryostat to ≈10⁻⁶ mbar vacuum, and performed conductivity and noise measurement (see Fig. S5 of the supplementary material¹³ for transfer characteristics). The carrier mobilities of the protected and unprotected channels were ∼ 4 and ∼ 3 cm²/Vs, respectively. The noise magnitude normalized by the device area in both channels are compared at similar carrier density in Fig. 4(c). We observe that the noise from unprotected channel is only slightly (≲ 50%) higher than that from the protected channel. This may be because of the contribution from acrylic residues, and residual water vapour remaining on the as-fabricated unprotected channel. In the next step, we anneal the device at 150 °C for 2 h in high vacuum condition. The conductivity and noise measurements were performed after cooling the device to room temperature. The transfer characteristics for both channels after annealing are shown in the supplementary material¹³ (see Fig. S5). We found that in all cases, the V_ON shifted towards large (< −60 V) negative gate voltages after annealing. This has been observed previously, but the reason behind this remain controversial.¹⁷ The noise behavior of unprotected, and protected channels before and after annealing are plotted in Figs. 4(d) and 4(e), respectively. For comparison, we plot S_σ/σ² normalized to its magnitude at ΔV_BG ≈10 V as a function of ΔV_BG. We observe that both the channels, in spite of having very different surface conditions, show 10 − 30 times decrease in noise magnitude after annealing. Assuming that annealing at 150 °C can only remove residual water vapour, adsorbed molecules, and not polymer residues, such large change cannot be accounted for by the desorption of atmospheric contaminants.

We now discuss two possibilities that may account for the large decrease in noise on annealing: (1) reduction in the localized trap states inside the channel and (2) modifications in the metal-MoS₂ contacts. It is well-known that the defects in MoS₂ arises due to sulphur vacancies and interstitial,²⁶ and are stable till ∼1000°C.¹⁷ Therefore, we exclude the former as the mechanism of noise reduction by annealing. On the other hand, it is well-established that, in the space-charge region of metal-semiconductor interface, random occupancy of the trap states can lead to low-frequency noise, for example, via fluctuations in the Schottky barrier height.³³ In case of MoS₂, however, the defect states created at the metal-MoS₂ interface has been suggested to be intrinsic in nature that could also cause a strong lowering of the local Schottky barrier.^26,29 The sensitivity of transport to annealing indicated these to be significantly lower in energy, the reduction of traps on annealing increases both the transparency of the contacts,^1,9 as well as the overall noise level in these devices.

To obtain a more direct evidence of the role of contacts, we measure the noise in MoS₂ devices with both backgate and top gate (denoted as TG in Fig. 4(b)). The thin (20 nm) hBN layer played the role of top gate dielectric apart from surface protection. The noise measurements were performed as a function of top gate voltage (V_TG) keeping the backgate at a constant voltage. The backgate induces carriers in MoS₂ both below the contact pads and the channel region between the contacts, and we used V_BG to change the transparency of the contacts. The top gate, on the other hand, influences only the channel region between the contacts, and can drive the transistor on/off due to its stronger capacitative coupling. The transfer characteristics of the device as a function of top gate voltage keeping V_BG = 40 V is shown in the inset of Fig. 4(f). We observe that the transfer characteristics saturates at high V_TG due to contact resistance. The variation of noise as a function of V_TG at three different V_BG are shown in Fig. 4(f). We observe that at high carrier density, where the transfer characteristics is dominated by the contacts, noise becomes a weak function of V_TG.¹¹ The data at V_BG = 0, 20, and 40 V (Fig. 4(f)) clearly indicate that the transparency of the contacts significantly affects the measured noise, and can lift the noise level even by orders of magnitude in these devices. Alternatively, in the low V_TG regime (for example, V_TG < −2 V at V_BG = 40 V), where the channel resistance dominate over contact resistance, we find that even though the contact barriers are highly transparent due to high V_BG, noise magnitude increases rapidly with decreasing V_TG. This indicates that the channel contribution to noise is dominant in this regime which may originate due to strong localization of carriers in the channel.^8,29

In conclusion, we investigate the origin of the low frequency 1/f noise in MoS₂ devices. Our measurement suggest that, along with the external trapping-detrapping centers, metal-MoS₂ contacts play a significant role in determining the noise magnitude in these devices. The dramatic decrease in noise after vacuum annealing is probably due to large increase in the transparency of the contacts rather than the removal of surface contaminations. We conclude that highly transparent contact along with channel encapsulation is essential to implement MoS₂ in low noise applications.

We thank Dr. Paromita Kundu and Prof. N. Ravishankar for their useful discussions. We thank DST, Govt. of India for a sponsored project under Nano Mission. S.G. thanks CSIR for financial support.