This work reports experimental confirmation of the working principles of a double magnetic tunnel junction (DMTJ) to achieve highly efficient spin-transfer-torque (STT) switching. This concept uses a magnetically switchable assistance layer (ASL) acting as a top perpendicular spin polarizer. The STT-induced switching dynamics were described by macrospin simulations, while the magnetic and electrical properties of the devices were investigated in switching experiments. The reversal dynamics of the storage layer/ASL coupled system were validated by time-resolved measurements of the device resistance during write operation, confirming that the storage layer is subjected to additive STT contributions both from the reference layer and the ASL throughout its parallel-to-antiparallel and antiparallel-to-parallel transitions. The STT efficiency of the ASL-DMTJ was compared to that of single MTJ stacks comprising the same storage layer and no assistance layer. The figure of merit ∆/Ic (stability/critical current) was found to nearly double in devices of 80 and 100 nm diameter, with a smaller 30% increase obtained for 50 nm diameter cells.

Perpendicular Spin Transfer Torque Magnetic Random Access Memory (p-STT-MRAM) still requires improvements to be usable for fast cache applications.1 To be able to replace Static Random Access Memory (SRAM), p-STT-MRAM needs to combine high speed and endurance, which implies switching voltages well below the dielectric breakdown voltage and, therefore, low critical switching current. The highest STT write efficiency is the main requirement.2 In STT-MRAM, this write efficiency is commonly evaluated by a figure of merit (FOM) defined as the ratio between the barrier height separating the two stable states of storage layer (SL) magnetization, proportional to the logarithm of the memory cell data retention, and its critical STT-induced switching current.3 Double magnetic tunnel junctions (DMTJ) are one of the most promising STT-MRAM embodiments to achieve this goal.4–7 A conventional perpendicular DMTJ stack is shown in Fig. 1(a). It consists of a storage layer (SL) sandwiched between two tunnel barriers of different resistance × area products (RA). This sandwich is itself inserted between a hard bottom reference layer (RL) and a hard top polarizer whose magnetization is set antiparallel (AP) to that of the reference layer. This STT-MRAM embodiment has several advantages: (i) The SL data retention is improved thanks to the presence of two FeCoB/MgO interfaces, which both contribute to the effective perpendicular magnetic anisotropy (PMA) of the SL magnetization.8–10 (ii) The critical switching current (Ic) is reduced compared to STT-MRAM with no top polarizer, thanks to the combined spin transfer torques (STT) exerted by the reference layer and the top polarizer on the SL magnetization. Despite the efficiency advantage, p-DMTJ has flaws.11 A first difficulty lies in the realization of a top polarizer with high perpendicular anisotropy. Commonly, to achieve high perpendicular anisotropy in a hard reference electrode or a hard polarizer, the FeCoB in contact with the MgO barrier is exchange coupled to a Co/Pt multilayer synthetic antiferromagnetic structure (SAF) through a thin metallic insertion. It turns out that the perpendicular anisotropy of such SAF highly depends on the Co/Pt multilayer crystallographic texture.12,13 While high anisotropy can be easily obtained in bottom polarizers using a seed layer promoting the required fcc (111) texture, a top polarizer must be grown on top of the tunnel barrier, seedless, and, therefore, without the required strong texture, which often yields insufficient coercivity and, therefore, magnetic instability unsuitable for a hard top polarizer.14 Another complexity lies in the requirement to compensate the stray fields generated by the top polarizer and bottom reference. Besides, the DMTJ stack etching is more difficult than conventional STT-MRAM stacks due to the additional thickness of the top polarizer.

FIG. 1.

Stack comparison between (a) a conventional p-DMTJ with static top polarizer and bottom reference layer and (b) an ASL-DMTJ.

FIG. 1.

Stack comparison between (a) a conventional p-DMTJ with static top polarizer and bottom reference layer and (b) an ASL-DMTJ.

Close modal

In this work, we report the first experimental validation of a novel concept using a double magnetic tunnel junction structure illustrated in Fig. 1(b). This assistance layer (ASL)-DMTJ is simpler and thinner than conventional DMTJ. It is based on the use of a switchable top polarizer acting as an assistance layer (ASL). Both the ASL and the SL are made of composite layers of the form FeCoB/W/FeCoB sandwiched between MgO barriers.8–10 The SL PMA is increased as in conventional p-DMTJ structures, thanks to the presence of the two MgO interfaces. For the ASL magnetization, the perpendicular magnetic stability can be modulated by adjusting the FeCoB layer thickness and the MgO capping oxidation conditions. The ASL is designed to switch its magnetic orientation during the write operation in such a way to maximize STT efficiency during both reversals, from parallel (P) to antiparallel (AP) and AP to P transitions. The final standby state after reversal is always parallel to the SL magnetization. When the ASL/SL magnetization is in parallel configuration, the SL magnetization stability is further increased due to the parallel magnetostatic and exchange-like coupling between the ASL and SL layers.15 To realize the right switching dynamics of the SL and ASL magnetization, the SL/ASL interlayer coupling and ASL thermal stability must be finely adjusted. Real-time observations of the dynamic device resistance confirm the expected operation mechanism in the fabricated cells. The performances were evaluated by using the FOM defined above. They are compared to those of conventional single magnetic tunnel junction structures without ASL. The comparison highlights the benefits of the proposed stack design for high performance STT-MRAM applications.

As already introduced, the ASL-DMTJ stack design essentially comprises three magnetic layers: first, the reference layer (RL), being the primary pinned polarizer with the highest stability of the stack; second, the storage layer (SL), whose magnetic orientation relative to the RL encodes the binary state of the memory; third, the assistance layer (ASL), acting as a switchable secondary polarizer. Depending on the ASL magnetic orientation with respect to the RL, it modulates the STT efficiency on the SL magnetization. In order to obtain a sufficiently large read-out signal, the resistance × area product (RA) and tunnel magnetoresistance (TMR) of the various tunnel barriers in the ASL-DMTJ structure are chosen to be different. The maximum RA and TMR are provided by the main RL/MgO/SL junction, while lower RA and TMR values are used for the SL/MgO/ASL junction and ASL/MgO/capping to reduce the series resistance.16 This difference in barrier electrical properties allows the characterization of the SL and ASL switching dynamics in real-time by recording the current through the device. Depending on the SL and ASL magnetic orientations, four resistance states can be stabilized in these ASL-DMTJs, as illustrated in Fig. 2(a).17 Various factors determine the order in which the layers switch, namely, the relative thermal stabilities of the ASL and SL, the STT exerted on the SL by the reference layer, the mutual STT exerted between the SL and ASL, and the SL-ASL interlayer coupling.18 Deliberately engineering the ASL to have higher stability than the SL gives a clear picture of the influence of the ASL magnetic configuration on the voltage to switch the SL magnetization.

FIG. 2.

(a) Schematics of the ASL-DMTJ vs ASL-SL-RL magnetic configuration and associated resistance states. (b) Averaged resistance-field loop for same device as in (c) and (d). (c) High voltage range (±1 V) resistance vs pulse voltage loop for an 80 nm diameter device with ΔEASL > ΔESL. Measurements conditions: 100 ns pulse width, 50 loops, and an external field compensating the RL stray field of 225 Oe. Color arrows indicate the resistance state of the junction. (d) Same resistance measurement vs pulse voltage loops performed in low voltage range (±0.5 V) with the ASL initialized antiparallel to the RL, with schematic of additive STT effects vs magnetic configuration of the MTJs.

FIG. 2.

(a) Schematics of the ASL-DMTJ vs ASL-SL-RL magnetic configuration and associated resistance states. (b) Averaged resistance-field loop for same device as in (c) and (d). (c) High voltage range (±1 V) resistance vs pulse voltage loop for an 80 nm diameter device with ΔEASL > ΔESL. Measurements conditions: 100 ns pulse width, 50 loops, and an external field compensating the RL stray field of 225 Oe. Color arrows indicate the resistance state of the junction. (d) Same resistance measurement vs pulse voltage loops performed in low voltage range (±0.5 V) with the ASL initialized antiparallel to the RL, with schematic of additive STT effects vs magnetic configuration of the MTJs.

Close modal

Figure 2(b) shows the resistance-field loop when switching the ASL-DMTJ with a perpendicular field. Both the SL and ASL magnetization switch together with field, the resistance changing from R1 (P state) to R3 (AP state), ending in parallel configuration without accessing the intermediate resistance state R2 or the highest resistance state R4. The resistance response is quite different when submitted to a field sweep or voltage sweep. Figures 2(c) and 2(d) show the static resistance measurements vs voltage pulse amplitude performed on the same device as in Fig. 2(b). The four different resistance states are observed and stabilized after the application of the voltage pulses. Similar resistance responses were already reported by current-in-plane tunnel magnetoresistance (CIPT) measurements with external magnetic field on stack designs with a soft pinned top polarizer.19 However, in our ASL-DMTJ with ΔEASL > ΔESL, the four resistance states are stabilized by voltage.

The device critical switching voltages (Vc) are influenced by the initial resistance state (i.e., state at V = 0) and the maximum voltage pulse amplitude applied on the device [Fig. 2(c)]. For negative voltage polarities and starting in R1 state where RL and ASL have parallel magnetization, the SL switching occurs at Vc1−4 = −0.43 V, switching to state R4. The device is then set in R3 state at Vc1−4 = −0.64 V, corresponding to the ASL switching by the spin polarized current from the SL. When the voltage polarity is reversed and starting from state R3, the SL switches back to R2 at Vc3−2 = +0.32 V, followed by switching of the ASL at Vc2−1 = +0.62 V. The asymmetry between Vc1−4 and Vc3−2 SL switching voltages is, in fact, a direct consequence of the subtraction or addition of STT exerted by the RL and ASL in parallel or antiparallel configuration. In contrast, when initializing the junctions in R3 state and preventing the ASL switching at pulse amplitudes above ±0.62 V, the double STT can be achieved for both switching directions. R2 and R3 states correspond to the magnetic configurations in which the two polarizing layers magnetization (RL and ASL) are antiparallel, maximizing the net STT acting on the storage layer. This is depicted in Fig. 2(d), also showing the STT contributions exerted on the SL layer magnetization in the two initial states. The use of these magnetic configurations leads to a symmetric SL switch at critical voltages of Vc3−2 = +0.32 V and Vc2−3 = −0.32 V. The net STT acting on the SL determines the different SL switching voltages.

To achieve efficient STT switching, the RL and ASL magnetization must be always antiparallel prior to the switching of the SL magnetization. Besides, to enhance the SL retention, the two free layers must end up in parallel magnetic configurations, in states R1 (P) and R3 (AP). This is only possible by reducing the ASL stability so that it follows the SL direction. Figure 3(a) depicts the different SL/ASL switching sequences required to get additive STT contributions on the SL magnetization.14 Since the SL and ASL magnetizations are always initially parallel (R1 and R3), this implies that in the P (R1) to AP (R3), the switching proceeds through the intermediate resistance state R2, as the ASL is first reversed by the STT from the SL polarized current. Once the device is in R2 state, the SL magnetization switches by the additive STT from ASL (R3 state) and RL. For the AP to P transition, the SL switches first to state R2 under STT influences from both RL and ASL, followed by ASL switching to state R1, ending up parallel to the SL magnetization.

FIG. 3.

(a) AP to P (R3 → R1) and P to AP (R1 → R3) reversal sequence passing through R2. For AP to P (R3 → R1), the additive STT from ASL and RL acts on the SL magnetization as soon as the voltage pulse is applied, passing through R2 when the SL switches and ending on R1 when the STT from the SL switches the ASL magnetization. For P to AP (R1 → R3), the STT from the SL switches first the ASL magnetization to R2. Once R2 configuration is reached, the additive STT from ASL and RL switches the SL magnetization ending on R3. (b) Real time macrospin simulation of the P to AP transition during the write operation. (c) Real time macrospin simulation of the AP to P transition during the write operation.

FIG. 3.

(a) AP to P (R3 → R1) and P to AP (R1 → R3) reversal sequence passing through R2. For AP to P (R3 → R1), the additive STT from ASL and RL acts on the SL magnetization as soon as the voltage pulse is applied, passing through R2 when the SL switches and ending on R1 when the STT from the SL switches the ASL magnetization. For P to AP (R1 → R3), the STT from the SL switches first the ASL magnetization to R2. Once R2 configuration is reached, the additive STT from ASL and RL switches the SL magnetization ending on R3. (b) Real time macrospin simulation of the P to AP transition during the write operation. (c) Real time macrospin simulation of the AP to P transition during the write operation.

Close modal

Real-time macrospin simulations at 0 K confirm the switching dynamics as illustrated in Figs. 3(b) and 3(c), respectively, for P to AP and AP to P transitions. From these numerical simulations, an asymmetry in terms of switching time is expected between the two writing directions. This is ascribed to the fact that the P to AP transition requires a first switch of the ASL magnetization so that its STT influence on the SL adds to that from the RL. On the contrary, for the AP to P transition, the double STT acts on the SL magnetization as soon as the voltage pulse is applied, thus yielding a reduced SL magnetization reversal time. Similar switching dynamics were already theoretically reported by Ref. 20 in double magnetic tunnel junction, comprising a dynamic reference layer acting as a switchable top polarizer. Their work concludes that the structure presents the same performance as a standard DMTJ with bottom and pinned polarizers but with a thinner and simplified stack design. Different to our proposed ASL-DMTJ, this dynamic reference layer could be set in stand-by conditions (at V = 0) in any magnetic configuration with respect to the SL magnetization. In our ASL-DMTJ, we optimized the structure to always follow the switching sequences presented in this section. The working principle relies on benefiting from the magnetic configurations R3 and R2 to exert a double STT on the SL magnetization during the application of the voltage pulse, while ending in stand-by in magnetic configurations R1 (P) and R3 (AP) in which the two free layers are parallel to maximize the thermal stability factor.

Samples were deposited by magnetron sputtering at an argon pressure of 2 × 10−3 mbar, on thermally oxidized silicon wafers. The magnetic stacks were annealed with no external applied magnetic field at 300 °C for 10 min and a pressure of 10−6 mbar. Pillar patterning was done using e-beam lithography, hard mask reactive ion etching, and ion milling of the magnetic tunnel junctions and magnetic stacks. The stack compositions of the devices discussed and presented in this work are as follows (thickness in nm):

Control sample with non-magnetic ASL: substrate/Ta3/Pt25/[Co0.5/Pt0.25]x6/Co0.5/Ru0.9/[Co0.5/Pt0.25]x3/Co0.5/W0.2/FeCoB1/MgO1.2 (30 s oxidation time)/FeCoB0.8/W0.2/FeCoB0.75/MgO1.2 (5 s oxidation time)/FeCoB0.4/Ta 3 nm.

ASL-DMTJ stack with high stability ASL with respect to the SL (ΔEASL > ΔESL): substrate/Ta3/Pt25/[Co0.5/Pt0.25]x6/Co0.5/Ru0.9/[Co0.5/Pt0.25]x3/Co0.5/W0.2/FeCoB1/MgO1.2 (30 s oxidation time)/FeCoB0.8/W0.2/FeCoB0.75/MgO1.2 (5 s oxidation time)/FeCoB1/W0.2/FeCoB0.75/MgO1.2 (1 s oxidation time)/Ta 3 nm.

ASL-DMTJ stack with low stability ASL with respect to the SL (ΔESL > ΔEASL): substrate/Ta3/Pt25/[Co0.5/Pt0.25]x6/Co0.5/Ru0.9/[Co0.5/Pt0.25]x3/Co0.5/W0.2/FeCoB1/MgO1.2 (30 s oxidation time)/FeCoB0.8/W0.2/FeCoB0.75/MgO1.2 (5 s oxidation time)/FeCoB1/W0.2/FeCoB0.75/MgO2.5 (1 s oxidation time)/Ta 3 nm.

The ASL-DMTJ stacks contain one more oxide barrier than conventional STT-MRAM in which the storage layer is already sandwiched between two tunnel barriers. This third barrier does not add much complexity in the growth of the stack since its purpose is only to tune the anisotropy of the ASL layer and not to provide any magnetoresistive signal. It, therefore, does not need to be of high crystalline quality but must have a resistance × area product as low as possible, not to excessively dilute the TMR signal from the main tunnel barrier between the reference and storage layers.

Achieving these different switching dynamics is realized by adjusting the stability of the ASL layer and the SL/ASL interlayer coupling through an ultrathin MgO layer.18,21 In our study, both barriers comprising the double MTJ structures have the same thickness but different natural oxidation conditions. The MTJs RA difference is achieved with different oxygen flow and oxidation time settings for each barrier.22,23 The main SL-RL tunnel barrier is oxidized at 3 × 10−2 mbar for 30 s, while ASL-SL tunnel barrier is oxidized at 3 × 10−2 mbar for 5 s, resulting in RA products of 10 and 4.8 Ωμm2, respectively. The RA of the barrier between the ASL and SL was purposely kept at about half of that of the main barrier to provide enough sensitivity to the ASL switching,19 thus ensuring the clear observation of the intermediate resistance state. For real applications, a lower RA would be preferable in the second barrier in order to decrease its serial resistance and the associated TMR reduction. The ASL stability was adjusted by the effective PMA via the ASL thickness21 and the degree of oxidation of the MgO capping layer. This stability was tuned to be much lower than that of the RL and slightly lower than that of the SL by using an oxidation pressure of 3 × 10−3 mbar during 1 s to oxidize the capping layer. Indeed, for correct device operation, the ASL perpendicular stability must be slightly lower than that of the SL.15 

As introduced in the device working principles, an optimized ASL-DMTJ with ΔESL > ΔEASL is needed in order to benefit from the magnetic configurations R2 and R3 that produce additive STT contributions from the two polarizers (ASL and RL) and stabilize the memory cell in resistance states R1 and R3 with the maximum stability. Independently of the initial state (R3 or R1), both switching sequences first transit through the intermediate resistance state R2. Getting additive STT contributions from ASL and RL in the AP to P transition is straightforward since in the AP (R3) state, these two layers are already antiparallel. More difficult is to get the transient antiparallel configuration corresponding to R2 in the P to AP transition since here the ASL has to switch first to avoiding the R4 state where the net STT on the SL is reduced. In the AP to P transition, the lifetime of the intermediate state can be extremely short, in the tens of nanosecond range. Validation of the desired switching sequences was possible by performing time-resolved resistance measurements. An example of the experimental procedure to observe the resistance states and switching dynamics is presented in Fig. 4(a). A voltage pattern composed of negative and positive square pulses is applied to the cell. The pulse width and time between pulses was 100 ns. The first pulse initializes the resistance state such that the reversal can be observed during the second pulse. Figure 4(b) presents the dynamic resistance–voltage loop for the device under investigation. Note that no stable intermediate state R2 is present independently of the reversal direction. From this preliminary characterization, the initialization voltages are determined as well as the writing voltage for the real time observation of the switching dynamics. VAP to P and VP to AP were chosen with amplitude yielding ∼50% switching probability, as indicated in the RV-loop. Difference in voltages to switch as well as in switching voltage distributions for AP to P and P to AP are observed, which are understood from the different switching dynamics for the two transitions. Stable configurations R1 and R3 are identified by applying negative and positive magnetic fields that set the two free layers in the two parallel configurations. Figures 4(c) and 4(d) summarize the main results for devices of 100 nm in diameter, depicting the AP to P (R3 → R1) and P to AP (R1 → R3) reversals at zero field. It becomes clear that although only states R1 and R3 are stable, the reversal process goes through an intermediate state R2. This state can last for a very short time, as in Fig. 4(c) (I), or exist through the whole pulse duration, as in Fig. 4(d) (I). The applied field and voltage level determine the relative probability of the reversal trajectory. However, independently of the reversal direction, the reversal sequence always go through state R2 as illustrated in Fig. 3(a) as predicted by the numerical simulation. This leads to high STT efficiency due to the additive STT contributions from RL and ASL acting on the storage layer independently of the switching direction.

FIG. 4.

(a) Example of negative and positive voltage pulse pattern, applied for real time observation of the switching sequence. The red window region shows the real time reversal region detailed in (c) and (d). (b) Static resistance measurement vs pulse voltage loop amplitude of an ASL-DMTJ with ΔESL > ΔEASL, indicating the VAPtoP (red) and VP to AP (blue) voltage amplitudes used in (c) and (d) for time-resolved observation of the switching dynamics. (c) Real time traces of the switching sequence from AP→P (R3 → R1) transiting through the R2 state, (I) with zero effective field acting on the free layers (ASL-SL) and (II) under an applied external field of −700 Oe. (d) Real time observations of the switching sequence from P→AP (R1 → R3) transiting through the R2 state, (I) at zero effective field acting on the free layers (ASL-SL) and (II) under an applied external field of −50 Oe.

FIG. 4.

(a) Example of negative and positive voltage pulse pattern, applied for real time observation of the switching sequence. The red window region shows the real time reversal region detailed in (c) and (d). (b) Static resistance measurement vs pulse voltage loop amplitude of an ASL-DMTJ with ΔESL > ΔEASL, indicating the VAPtoP (red) and VP to AP (blue) voltage amplitudes used in (c) and (d) for time-resolved observation of the switching dynamics. (c) Real time traces of the switching sequence from AP→P (R3 → R1) transiting through the R2 state, (I) with zero effective field acting on the free layers (ASL-SL) and (II) under an applied external field of −700 Oe. (d) Real time observations of the switching sequence from P→AP (R1 → R3) transiting through the R2 state, (I) at zero effective field acting on the free layers (ASL-SL) and (II) under an applied external field of −50 Oe.

Close modal

The optimized ASL-DMTJ spin torque efficiency was evaluated and compared to that of a single MTJ stack with the same storage layer but no ASL. Details on the sample composition are indicated in the materials and fabrication section. Figure 5(a) shows lower TMR values for the ASL-DMTJ devices, explained by the second tunnel barrier diluting the main barrier TMR signal.24 This difference can be minimized by reducing the serial resistance of the MgO barrier separating the SL and ASL.25Figure 5(b) shows the improvements obtained in terms of thermal stability ∆. The ASL-DMTJ presents an average increase in ∆ of 10 kBT with respect to the single MTJ for all pillar sizes. This increase is due to the magnetic coupling between the ASL and SL in R1 and R3 magnetic configuration. Values of ∆ were extracted by fitting the switching field distributions of both samples.26,27 The critical current density (Jc) comparison was carried out separately for P → AP reversal in Fig. 6(a), and for AP → P in (b). The additive STT yields a decrease of Jc in the ASL-DMTJ for P → AP reversal, which is significant for devices of diameter larger than 80 nm. This happens despite a higher stability and lower TMR amplitude.25 The current density Jc of the transition AP → P is essentially similar in the two systems, within the interquartile range for all investigated diameters. The figure of merit (∆/Ic) was used to evaluate the efficiency of the STT reversal.28 The FOM is increased in all cases in ASL-DMTJ compared to conventional MTJ with relative increase by factor 2 in devices of 80 and 100 nm in diameter Fig. 7. Following the FOM trend as a function of pillar size, downscaling the devices is expected to lead to further improvements in efficiency.

FIG. 5.

(a) TMR as function of device size for ASL-DMTJ (red) and single MTJ (blue). (b) Thermal stability (∆) as function of device size for ASL-DMTJ (red) and single MTJ (blue).

FIG. 5.

(a) TMR as function of device size for ASL-DMTJ (red) and single MTJ (blue). (b) Thermal stability (∆) as function of device size for ASL-DMTJ (red) and single MTJ (blue).

Close modal
FIG. 6.

(a) P → AP critical current density as a function of device size for the ASL-DMTJ (red) and single MTJ (blue). (b) AP → P critical current density as a function of device size for the ASL-DMTJ (red) and single MTJ (blue).

FIG. 6.

(a) P → AP critical current density as a function of device size for the ASL-DMTJ (red) and single MTJ (blue). (b) AP → P critical current density as a function of device size for the ASL-DMTJ (red) and single MTJ (blue).

Close modal
FIG. 7.

(a) P → AP figure of merit (∆/Ic) as function of device size for the ASL-DMTJ (red) and single MTJ (blue). (b) AP → P figure of merit (∆/Ic) as function of device size for the ASL-DMTJ (red) and single MTJ (blue).

FIG. 7.

(a) P → AP figure of merit (∆/Ic) as function of device size for the ASL-DMTJ (red) and single MTJ (blue). (b) AP → P figure of merit (∆/Ic) as function of device size for the ASL-DMTJ (red) and single MTJ (blue).

Close modal

In conclusion, a highly efficient STT-MRAM cell stack was investigated using an assistance layer that self-aligns during the STT induced reversal process, increasing the STT acting on the storage layer magnetization. Real-time observations of the switching sequences on optimized devices confirm the expected dynamic behavior and correct operation of the memory cell. In standby, the assistance layer helps to stabilize the SL magnetization, thereby increasing the cell retention and the device FOM. Further optimization in barriers quality and second barrier RA reduction will lead to higher enhancements in terms of figure of merit, maximizing the double STT influence of both polarizers on the SL.

This work was supported by the European Research Council via grant MAGICAL ERC Adv (Grant No. 669204).

The authors declare no conflict of interest.

The data that support the findings of this study are available from the corresponding author upon reasonable request.

1.
P.
Barla
,
V. K.
Joshi
, and
S.
Bhat
,
J. Comput. Electron.
20
,
805
837
(
2021
).
2.
A.
Jog
 et al, in
DAC Design Automation Conference 2012
(
IEEE
,
2012
), pp.
243
252
.
3.
D.
Apalkov
,
B.
Dieny
, and
J. M.
Slaughter
,
Proc. IEEE
104
,
1796
1830
(
2016
).
4.
D. C.
Worledge
,
IEEE Magn. Lett.
8
,
4306505
(
2018
).
5.
G.
Hu
 et al,
2015 IEEE International Electron Devices Meeting (IEDM)
,
2015
, pp.
26.3.1
26.3.4
.
6.
B.
Rodmacq
 et al, U.S. patent US8513944B2 (
9 Jun 2008
).
7.
P.-Y.
Clément
,
C.
Baraduc
,
M.
Chshiev
,
B.
Diény
,
L.
Vila
, and
C.
Ducruet
, “
Double barrier magnetic tunnel junctions with write/read mode select layer
,” in
2014 IEEE 6th International Memory Workshop (IMW)
,
2014
, pp.
1
4
.
8.
H.
Sato
,
E. C. I.
Enobio
,
M.
Yamanouchi
,
S.
Ikeda
,
S.
Fukami
,
S.
Kanai
,
F.
Matsukura
, and
H.
Ohno
,
Appl. Phys. Lett.
105
,
062403
(
2014
).
9.
S.
Ikeda
,
K.
Miura
,
H.
Yamamoto
 et al,
Nat. Mater.
9
,
721
724
(
2010
).
10.
T.
Devolder
,
S.
Couet
,
J.
Swerts
,
S.
Mertens
,
S.
Rao
, and
G. S.
Kar
,
IEEE Magn. Lett.
10
,
5505804
(
2019
).
11.
J.
Swerts
 et al,
2017 IEEE International Electron Devices Meeting (IEDM)
,
2017
, pp.
38.6.1
38.6.4
.
12.
J.
Chatterjee
 et al,
Appl. Phys. Express
8
,
063002
(
2015
).
13.
H.
Sato
 et al,
Jpn. J. Appl. Phys., Part 1
53
,
04EM02
(
2014
).
14.
P. V.
Coelho
,
Double Barrier Magnetic Tunnel Junctions for Innovative Spintronic Devices
(
Université Grenoble Alpes
,
2018
).
15.
D. S.
Hazen
 et al,
Nanoscale
13
,
14096
14109
(
2021
).
16.
X.
Chen
and
P. P.
Freitas
,
Nano-Micro Lett.
4
(
1
),
25
29
(
2012
).
17.
T.
Katayama
,
S.
Yuasa
,
J.
Velev
,
M. Y.
Zhuravlev
,
S. S.
Jaswal
, and
E. Y.
Tsymbal
,
Appl. Phys. Lett.
89
,
112503
(
2006
).
18.
J.-Y.
Choi
,
H.
Jun
,
K.
Ashiba
 et al,
Sci. Rep.
9
,
11932
(
2019
).
19.
H.-S.
Jun
 et al,
AIP Adv.
10
,
065126
(
2020
).
20.
A. V.
Khvalkovskiy
 et al,
J. Appl. Phys.
124
(
13
),
133902
(
2018
).
21.
B.
Dieny
and
M.
Chshiev
,
Rev. Mod. Phys.
89
(
2
),
025008
(
2017
).
22.
Z. G.
Zhang
,
P. P.
Freitas
,
A. R.
Ramos
,
N. P.
Barradas
, and
J. C.
Soares
,
Appl. Phys. Lett.
79
,
2219
(
2001
).
23.
Z. G.
Zhang
,
P. P.
Freitas
,
A. R.
Ramos
,
N. P.
Barradas
, and
J. C.
Soares
,
J. Appl. Phys.
91
,
8786
(
2002
).
24.
D.-Y.
Lee
,
S.-E.
Lee
,
T.-H.
Shim
, and
J.-G.
Park
,
Nanoscale Res. Lett.
11
,
433
(
2016
).
25.
L.
Cuchet
,
B.
Rodmacq
,
S.
Auffret
,
R. C.
Sousa
, and
B.
Dieny
,
Appl. Phys. Lett.
105
,
052408
(
2014
).
26.
L.
Tillie
,
E.
Nowak
,
R. C.
Sousa
,
M.-C.
Cyrille
,
B.
Delaet
,
T.
Magis
, and
L.
Perniola
,
2017 IEEE International Electron Devices Meeting (IEDM)
,
2016
, pp.
27.3.1
27.3.4
.
27.
L.
Breth
,
D.
Suess
,
C.
Vogler
,
B.
Bergmair
,
M.
Fuger
,
R.
Heer
, and
H.
Brueckl
,
J. Appl. Phys.
112
,
023903
(
2012
).
28.
J. Z.
Sun
 et al,
Phys. Rev. B
88
,
104426
(
2013
).