Superconducting flip-chip interconnects are crucial for the three-dimensional integration of superconducting circuits in sensing and quantum technology applications. We demonstrate a simplified approach for a superconducting flip-chip device using commercially available indium microspheres and an in-house-built transfer stage for bonding two chips patterned with superconducting thin films. We use a gold-passivated niobium or niobium nitride layer as an under-bump metallization (UBM) layer between an aluminum-based superconducting wiring layer and the indium interconnect. At millikelvin temperatures, our flip-chip assembly can transport a supercurrent with tens of milliamperes, limited by the smallest geometric feature size and critical current density of the UBM layer and not by the indium interconnect. We show that the pressed indium interconnect itself can carry a supercurrent exceeding 1 A due to its large size of about 500 μm diameter. Our flip-chip assembly does require neither electroplating nor patterning of indium. The assembly process does not need a flip-chip bonder and can be realized with a transfer stage using a top chip with transparency or through-vias for alignment. These flip-chip devices can be utilized in applications that require few superconducting interconnects carrying large currents at millikelvin temperatures.
Superconducting flip-chip interconnects are pivotal in the integration of superconducting circuits for quantum computing1–5 and sensing applications.6,7 A commonly used method employs indium (In) bump bonding as In is superconducting below 3.4 K, ductile,8 mechanically stable at cryogenic temperatures,1,2,7 and resilient to thermal cycling1 and reduces thermal stress between the top and bottom chips.8,9 However, indium as a bonding material may diffuse into certain superconducting thin films, potentially degrading their superconducting properties. This issue arises when indium is bonded to aluminum (Al), which results in an intermetallic compound that exhibits non-superconducting behavior.10 Therefore, a commonly used method is to add an under-bump metallization (UBM) layer between the In and Al layers to prevent this diffusion. The UBM layer is usually made with superconductors such as niobium nitride4,11 or titanium nitride.1,12 The UBM layer can potentially have a native oxide that must be removed before indium microbumps are deposited to make galvanic contact.
Indium microbumps are typically grown via electroplating9,13 or evaporation1,4,5,13 and face-to-face compression bonded using a flip-chip bonder.1,4,5,14,15 This technique is used in high-density three-dimensional packaging of integrated superconducting qubit processors with small In bumps to accommodate a large number of connections and a small (spacing 10 μm) and uniform (tilt 100 μrad) chip separation for scalability.4,5 However, this approach requires an elaborate fabrication process and a high-precision flip-chip bonder. Alternative flip-chip bonding techniques have been developed to mitigate this problem,3,16 but they do not provide a galvanic contact necessary for DC transport.
In our work, we present a simplified fabrication and assembly process for making a superconducting flip-chip connection between a superconducting Al wiring layer, which is a commonly used material for superconducting quantum circuits,1,2,4,5 and a superconducting niobium nitride (NbN) or niobium (Nb) layer as the UBM layer. At temperatures in the range of a few tens of millikelvin to 1.2 K, i.e., the superconducting transition of Al, our flip-chip assembly using passivated UBM layers can carry a supercurrent of tens of mA, which is limited by the geometry of the patterned thin films and the current density of the utilized materials. Our approach targets applications that require only a few superconducting connections, allowing for a larger indium bump size. We demonstrate that superconducting flip-chip devices can be assembled using commercially available 300 μm diameter indium microspheres17 as the bond connection, which, when pressed to a flat cylinder of about 500 μm diameter, can carry a supercurrent of more than 1 A. The microspheres are placed manually on a bottom chip before pressing the bottom and a top chip together using a simple transfer stage,18 provided that the top chip is made of a transparent substrate (e.g., sapphire used in this work) or contains through-vias for alignment.
Our flip-chip assembly approach uses indium microspheres, eliminating the need to grow and pattern indium microbumps. To connect to a superconducting Al thin film, we demonstrate flip-chip assemblies with the commonly used NbN.4,11 Importantly, we also show that Nb can be used as a UBM layer, provided that it is capped with a thin Au layer to prevent oxidization. We choose Nb specifically because it exhibits a higher critical current density, which enables high-current devices such as on-chip magnetic traps19,20 or on-chip solenoids,21 and its lower intrinsic microwave losses are promising for high-Q superconducting resonators.22,23 Au is chosen as the passivation layer because it mechanically strengthens the flip-chip bond,24 and if an Au–In intermetallic compound is formed, it would also be superconducting at millikelvin temperatures.25
An overview of the flip-chip device is shown in Fig. 1. It consists of a bottom chip made from silicon and a top chip made from sapphire that allows for in situ alignment during assembly due to its transparency. The two chips are galvanically connected through indium microspheres of 300 μm diameter, which, after bonding, give a separation of below 50 μm, see Fig. 1(a). The bottom chip contains an Al wiring layer [Fig. 1(b)], which can be used, for example, to pattern a superconducting circuit. This chip contains large areas (1.5 × 2 mm2) for wire bonding to make external electrical connections to the chip. To make flip-chip interconnects, we pattern and deposit UBM pads on top of the Al layer, upon which we place indium microspheres that connect galvanically to the top chip. The top chip [Fig. 1(b)] consists of a superconducting layer, which can, for example, be shaped as a loop [see Fig. 1(d)] or other geometry. A completed flip-chip device is shown in Fig. 1(c). The fabrication process for thin films of Al (150 nm), Nb (50 nm), NbN (50 nm), and Au (5 nm) is described in detail in the supplementary material S1.
Schematic representation of a flip-chip device, showing (a) the side view after assembly and (b) the top view before assembly. (c) Photograph of an assembled flip-chip device wire bonded to a copper sample holder. (d) Optical image of a fabricated test structure on a sapphire substrate.
Schematic representation of a flip-chip device, showing (a) the side view after assembly and (b) the top view before assembly. (c) Photograph of an assembled flip-chip device wire bonded to a copper sample holder. (d) Optical image of a fabricated test structure on a sapphire substrate.
We assembled our flip-chip devices using two different methods: an in-house-built transfer stage [Fig. 2(a)] and a commercial flip-chip bonder [Fig. 2(b)]. The former method is commonly used for the transfer of two-dimensional materials.18 Both tools create a mechanically sturdy bond with a lateral alignment accuracy of a few micrometers. Details of the assembly procedure are described in the supplementary material S2.
Schematic of the flip-chip assembly method and picture of the alignment crosses after bonding for (a) the transfer stage and (b) the flip-chip bonder. (c) The flip-chip device before and after bonding. Note that the colors on the bottom panel are light reflections of the surroundings. The close-up is an SEM image of an indium microsphere used for flip-chip bonding.
Schematic of the flip-chip assembly method and picture of the alignment crosses after bonding for (a) the transfer stage and (b) the flip-chip bonder. (c) The flip-chip device before and after bonding. Note that the colors on the bottom panel are light reflections of the surroundings. The close-up is an SEM image of an indium microsphere used for flip-chip bonding.
To make a galvanic and robust connection between the chips, we use commercially available 99.99% pure indium microspheres17 [Fig. 2(c), right panel]. The microspheres have a diameter of 300 5 μm and a spheroid tolerance of 1.5%. Although In possesses a native oxide, it normally passivates at a few nanometers.26 This oxide layer is easily broken during bonding, as In is malleable and deforms significantly when pressed. We typically use two microspheres per pad, but, in principle, a single microsphere per pad would suffice, which would then also allow the UBM pad size to be reduced, enabling us to realize more connections per chip. The applied pressure during the flip-chip bonding process flattens each 300 μm-diameter microspheres into a flat cylinder with a diameter of around 500 μm.
In general, the transfer stage achieved alignment accuracy (5 μm) similar to that of the flip-chip bonder (3 μm). However, the flip-chip bonder achieved a closer chip separation (20 μm) compared to the transfer stage (50 μm). The chip separation can be reduced in future devices using smaller indium microspheres. In addition, an average tilt of 2–3 mrad was obtained with both methods. The results presented in the remainder of this work were obtained using the commercial flip-chip bonder unless otherwise stated.
It is crucial to characterize the material composition and superconducting properties of the utilized UBM thin films in order to realize functioning superconducting flip-chip devices. To this end, we show measurements of the material composition of the UBM thin films using time-of-flight secondary ion mass spectrometry (TOF-SIMS) in order to analyze the potential oxidization of the non-passivated UBM thin films. Figure 3 presents TOF-SIMS depth-profiles of the UBM films, in the case of Nb/Au, NbN, and NbN/Au sputtered on the Al layer of the bottom chip and in the case of Nb sputtered directly on the sapphire substrate of the top chip. The films were analyzed a few weeks after exposure to air. The obtained SIMS data allow us to make qualitative statements about the material composition of the films (for more details, see the supplementary material S4).
TOF-SIMS profiles of Nb, Nb/Au, NbN, and NbN/Au thin films acquired with 1 s intervals using Cs+ primary ions. The plots show the secondary ion rate as a function of sputtering time for key elements and compounds present in the samples. Top panels: UBM metallic ions; middle panels: native Nb oxide ions; bottom panels: Al ions from Al ground plane (for Nb/Au, NbN, and NbN/Au) or sapphire substrate (for Nb).
TOF-SIMS profiles of Nb, Nb/Au, NbN, and NbN/Au thin films acquired with 1 s intervals using Cs+ primary ions. The plots show the secondary ion rate as a function of sputtering time for key elements and compounds present in the samples. Top panels: UBM metallic ions; middle panels: native Nb oxide ions; bottom panels: Al ions from Al ground plane (for Nb/Au, NbN, and NbN/Au) or sapphire substrate (for Nb).
We observe that non-passivated Nb and NbN films [Figs. 3(b) and 3(h)] exhibit native Nb oxides of different stoichiometry (NbO, NbO2, and Nb2O5) in the surface region and rapidly decreasing in the bulk region. In contrast, Au-passivated films [Figs. 3(d) and 3(j)] show strong Au signals at the surface with minimal oxide presence [Figs. 3(e) and 3(k)], demonstrating effective passivation. The Nb and NbN layers in all samples demonstrate stable signals throughout the respective UBM film thickness [Figs. 3(a), 3(d), 3(g), and 3(j)]. A sharp increase in the Al signals marks the UBM-Al interface for the Nb/Au, NbN, and NbN/Au thin films and the UBM/sapphire interface for the Nb thin film.
To then characterize the superconducting properties of the UBM thin films, we patterned a test structure to determine the transition temperature and the critical current of the patterned passivated and non-passivated UBM thin films. The test structure is a long wire of 10 μm width and 4740 μm length with a loop of 200 μm diameter in its middle [see Fig. 1(d)]. We performed electrical measurements inside a dilution refrigerator, allowing us to characterize samples down to millikelvin temperature. The details of the measurement setup and procedure are explained in the supplementary material S3.
Figure 4(a) shows the measured voltage and calculated resistance of the test structure as a function of temperature, measured with a bias current of 10 μA. The thin films exhibit a normal-state resistance that is similar to values reported in the literature (see the supplementary material S5). A sharp transition in resistance is observed at the respective (taken as the temperature at which the resistance is at least tenfold the residual resistance), indicating the onset of superconductivity. The respective for the Nb and NbN thin films is 8.0 and 10.4 K, respectively, similar to the values reported in Refs. 27–29. However, of our Nb film is lower than the bulk value of 9.3 K that was also observed in unpatterned thin Nb films.30 We believe that this could be due to disorder in our film,31 the presence of native oxides32 [see Fig. 3(b)], or the geometric constrictions28 in our test structure. The Au-passivated thin films show a for Nb/Au and NbN/Au of 7.7 and 9.9 K, respectively, slightly lower than their non-passivated counterparts. We attribute this small reduction in to the proximity effect33 induced by the Au capping layer on Nb34 or NbN.27
Measurements of superconducting thin films. (a) Voltage and resistance as a function of temperature at 10 μA bias current. Below the of the respective material, the measured voltage drops to the noise floor, which has been subtracted from the shown data. (b) Critical current and critical current density as a function of temperature. The solid line is a fit using Eq. (1).
Measurements of superconducting thin films. (a) Voltage and resistance as a function of temperature at 10 μA bias current. Below the of the respective material, the measured voltage drops to the noise floor, which has been subtracted from the shown data. (b) Critical current and critical current density as a function of temperature. The solid line is a fit using Eq. (1).
This fit agrees well with the data, as seen in Fig. 4(b). At a temperature of 100 mK, we determine of the thin films to be 9.26 and 2.5 MA cm−2 for Nb and NbN, respectively, similar to other works28,36 (see the supplementary material S5). The determined of Nb/Au (6.3 MA cm−2) and NbN/Au (3.2 MA cm−2) is close to their non-passivated counterparts. Note that we calculate the critical current density of the thin films considering the relevant geometric feature size of the superconductor, and we assume bulk transport for Nb and NbN and screening transport for Al and In. For simplicity, we neglect the influence of the proximitization from the metal layer on the current distribution in the UBM layer. Furthermore, we overlook the possibility of sheath transport that could occur in Nb thin films.
Having characterized the UBM thin films, we then assembled flip-chip devices as described earlier. Figure 5(a) shows the measured voltage and calculated resistance of the flip-chip devices as a function of temperature. The flip-chip devices that we patterned with NbN, NbN/Au, or Nb/Au as the UBM layer were fully superconducting at millikelvin temperatures and are, thus, useful devices for making superconducting flip-chip-based interconnects. In contrast, the non-passivated Nb-based flip-chip device showed a finite resistance of some Ohm at millikelvin temperatures. Thus, in the following, we will focus on discussing the functioning NbN, NbN/Au, and Nb/Au-based flip-chip devices.
Measurements of flip-chip devices. (a) Voltage and resistance as a function of temperature at 100 μA bias current. Note that the voltage noise floor has been subtracted from the shown data. (b) Critical current and critical current density as a function of temperature.
Measurements of flip-chip devices. (a) Voltage and resistance as a function of temperature at 100 μA bias current. Note that the voltage noise floor has been subtracted from the shown data. (b) Critical current and critical current density as a function of temperature.
In Fig. 5(a), we observe transitions at the of the respective superconducting materials. At 1.25 K, all three flip-chip devices show a sharp increase in resistance, which marks the of Al. We estimate a normal-state resistivity of Al to be between 0.68 and 1.6 μ , which is comparable to that reported in Ref. 37. The resistance of flip-chip devices that use Au-passivated UBM layers remains constant between the of Al and another sharp transition in resistance at 7.4 K for the Nb/Au and 10.0 K for the NbN/Au flip-chip device. These temperatures mark the respective of the utilized UBM thin films and are similar to those determined for the thin films only. Above their respective , all flip-chip devices exhibit resistance values corresponding to their normal-state resistances, as observed for their respective thin films (see the supplementary material S5).
The non-passivated NbN flip-chip device shows an additional sharp increase in resistance at 3.5 K, which corresponds to the of In. Given the geometry of our In microspheres, we expect their normal-state resistance to be some , which is well below the observed resistance change. Instead, we attribute the finite resistance to the thin native oxide layer that forms on the surface of the non-passivated NbN film due to exposure to air. Figure 3(h) shows the presence of the NbOx oxides NbO, NbO2, and Nb2O5 in the non-passivated NbN film. In contrast, oxide growth is effectively prevented in the Au-passivated NbN thin film [see Fig. 3(k)]. We assume that the NbOx oxide layer acts as an insulator and estimate its resistivity to be of the order of (see the supplementary material S6), which is reasonable for NbO2 oxide.38 NbO2 was also identified in Ref. 39 as a relevant oxide of superconducting NbN thin films. We assume that below the of In, the NbN/NbOx/In interface forms a superconductor-insulator-superconductor (SIS) connection and, thus, can transport a superconducting current below the critical current of the SIS connection. Using the Ambegaonkar–Baratoff equation, we estimate this critical current to be around 2 mA (see the supplementary material S6). Close to this value, we also observe a finite resistance step in a current-dependent measurement of the NbN flip-chip device (see the supplementary material S6). Above the of In, the interface should behave as a metal-insulator-superconductor (NIS) connection. We then observe that the voltage decreases with an increase in temperature, which is similar to other NIS connections.40–42 However, to support our interpretation, additional measurements would be required to clearly identify the non-linear behavior of the SIS or NIS junction via determining the current- and voltage-bias characteristics at different temperatures. This we leave to future work.
Figure 5(b) shows the temperature dependence of the critical current of the functioning flip-chip devices. The critical current behavior of the flip-chip devices is governed by the smallest superconducting structure on the flip-chip device, which, in our case, was the test structure on the top chip's UBM layer [see Fig. 1(d)]. The data are well described by Eq. (1), and the observed values agree well with those determined from the data of Fig. 5(a). The flip-chip devices exhibit slightly lower than their thin-film counterparts, which we attribute to the proximity effect due to the Al layer43 below the respective UBM layer on each bottom chip. We infer a maximum ( ) at 100 mK of 28 mA (5.6 MA cm−2) and 15 mA (3.0 MA cm−2) for the Nb/Au and NbN/Au flip-chip devices, respectively, similar to their thin-film counterparts (see the supplementary material S5).
We also determined the critical current of the indium microsphere-based interconnects (for details, see the supplementary material S7). To this end, we assembled a simplified flip-chip device using the transfer stage, with unpatterned chips of Nb/Au film chosen for its high critical current and absence of oxidation. Two In microspheres were placed on each bottom chip, while a third chip was pressed on top to establish a galvanic connection between the two bottom chips. We used 24 aluminum wire bonds per bond pad to allow the transport of large supercurrents. With this flip-chip device, we could run a supercurrent of up to 2 A (see the supplementary material S7) limited by the maximum output of the current source.
To conclude, we have presented a simple approach for superconducting flip-chip devices using 300 μm diameter indium microspheres for bonding on Au-passivated Nb- or NbN-based UBM layers. Our assembly method achieves chip separations of 20–50 μm with a transversal alignment accuracy of better than 5 μm and a tilt of 2–3 mrad using either a transfer stage or a conventional flip-chip bonder. Smaller chip separations may be achieved using smaller indium microspheres, which would require a smaller pad size. This would also allow for patterning a larger number of pads, thus resulting in more superconducting interconnects per chip.
Our flip-chip assembly is suitable for high-current applications. The indium interconnects, with a pressed diameter of about 500 μm, can carry currents exceeding 1 A at millikelvin temperatures. With patterned superconducting thin films, we have demonstrated that our flip-chip devices could run tens of mA at temperatures below the superconducting transition of Al, which was used as a wiring layer in the bottom chip. We found that although native oxides were present in both non-passivated Nb and NbN flip-chip devices, only the latter were superconducting at millikelvin temperatures. An Au passivation layer enabled functioning Nb flip-chip devices, opening up the possibility for high-current applications since the critical current density of Nb is larger than that of NbN or Al.
The presented flip-chip devices are suitable for various superconducting devices, such as chip-based high-current magnetic traps19,20 or solenoids,21 efficient flux readout in SQUID-based sensors,20,44,45 or transport of supercurrent to flux-tunable superconducting couplers.46,47 Thus, our flip-chip devices can find applications in superconducting-based sensors6,7 or superconducting quantum technologies.1–5,45
SUPPLEMENTARY MATERIAL
See the supplementary material for details on the microfabrication of flip-chip devices, their assembly, the measurement setup and procedure, additional TOF-SIMS data, collected data, and additional measurements and calculations.
The authors thank Marcus Rommel and Henrik Frederiksen for their support in microfabrication, Hanlin Fang and Thilo Bauch for technical support, and Per Malmberg for performing TOF-SIMS measurements. This work was supported in part by the Horizon Europe 2021-2027 framework program of the European Union under Grant Agreement No. 101080143 (SuperMeQ), the European Research Council under Grant No. 101087847 (ERC Consolidator SuperQLev), the Knut and Alice Wallenberg (KAW) Foundation through a Wallenberg Academy Fellowship (WW), and the Wallenberg Center for Quantum Technology (WACQT, AP). The devices were fabricated at Chalmers Myfab Nanofabrication Laboratory and analyzed in part at Chalmers Materials Analysis Laboratory (CMAL).
AUTHOR DECLARATIONS
Conflict of Interest
The authors have no conflicts to disclose.
Author Contributions
Achintya Paradkar: Conceptualization (equal); Formal analysis (lead); Methodology (equal); Writing – original draft (equal); Writing – review & editing (equal). Paul Nicaise: Methodology (equal); Writing – original draft (equal); Writing – review & editing (supporting). Karim Dakroury: Methodology (equal); Writing – original draft (equal); Writing – review & editing (supporting). Fabian Resare: Methodology (supporting); Writing – original draft (supporting); Writing – review & editing (supporting). Witlef Wieczorek: Conceptualization (equal); Supervision (lead); Writing – original draft (equal); Writing – review & editing (equal).
DATA AVAILABILITY
The data that support the findings of this study are openly available in Zenodo at https://doi.org/10.5281/zenodo.13377108 (Ref. 48).