As fundamental scaling limits start to stifle the evolution of complementary metal–oxide–semiconductor transistor technology, interest in potential alternative computing platforms grows. One such alternative is wave-based computation. In this work, we propose a general string diagrammatic formalism for wave-based computation with phase encoding applicable to a wide range of emerging architectures and technologies, including quantum-dot cellular automata, single-electron circuits, spin torque majority gates, and DNA computing. We demonstrate its applicability for design, analysis, and simplification of Boolean logic circuits using the example of spin-wave circuits.

The workhorse of conventional computing technology—in which information is encoded in electric voltages and computation is performed through the movement of charge—is the complementary metal–oxide–semiconductor (CMOS) transistor. These devices, which can be deployed as switches or amplifiers,1 can be used to realize logic gates that can perform all Boolean operations.2,3

Recent decades have seen progressive improvements in the miniaturization of CMOS4,5 and a corresponding increase in the packing density of transistors in integrated circuits. Finally, however, it has been recognized that Moore's law6 is soon to be outdone by fundamental physical scaling limits.5,7 This observation motivates intense research into potential new, “beyond-CMOS,” computing paradigms in both Boolean and non-Boolean domains.8 One class of alternatives is wave-based computation in which information is encoded in the phase or amplitude of waves, and logical operations are achieved through interference effects.

Proposals for wave-based computation span a wide range of signaling domains, including optics,9–11 neuromorphics,12 and spin waves.5 Some of these offer efficient non-Boolean computation5,24–26 and/or low energy consumption,13,24 parallelism,23 and reversibility.22,30 Moreover, it has recently been demonstrated that classical wave-based devices with phase encoding can be used to perform some quantum computing algorithms.61 

Various Boolean logic gates and circuits have been implemented using wave-based technologies, but a general theoretical framework to design and analyze these systems has, thus, far been lacking. Here, we propose such a framework and demonstrate its application with reference to spin-wave, or “magnonic,” circuits.

Magnonics involves the generation, manipulation, and detection of collective excitations of the electronic spin lattice of a magnetic material.14–16,27,47–52 In magnonic logic devices, propagating spin waves (magnon currents) take the place of electron charges as carriers of information.5 Spin waves of gigahertz frequencies can be excited at nanometer wavelengths and propagate with low energy dissipation through magnetic insulators, hinting at the possibility of miniature devices with high clock speeds.24 

A number of basic Boolean logic gates have been implemented with spin-wave systems, starting with the experimental demonstration of a NOT gate,20 followed by XNOR and NAND gates.21 Since the NAND gate is a universal gate, the latter result implies that any Boolean logical circuit can be implemented in the magnonic domain. Recently, there have been notable proposals for more complex circuits, such as a half adder,17 a full adder,18 and a 32-bit ripple-carry adder.19 

One of the major advantages of wave-based computing, in general, and spin-wave computing, in particular, is its economical implementation of the majority gate.27–29 The simplest majority gate has three Boolean inputs and an output equal to the Boolean value which is in majority at the input. In CMOS-based computing, a combination of AND and OR gates (or many transistors24) is needed to implement a majority gate. In (spin-) wave computing, the majority gate exists as a stand-alone primitive logic gate. Moreover, by controlling one of the inputs to the gate, it is possible to implement an AND gate or an OR gate.

The formalism for wave-based Boolean logic circuits we present here uses string diagrams31–33—a formally rigorous, but visually intuitive syntax that has found use in diverse areas of science and technology.35 Our proposal takes inspiration from certain kinds of spin-wave logic gates, particularly the majority gate, but is fully applicable to any other physical platform amenable to wave-based or majority computation, e.g., quantum-dot cellular automata,55 nanomagnet logic,58 single-electron circuits,59 graphene spin circuits,56 spin torque majority gates,57 molecular scale electronics,54 and DNA computing.53 

Any measurable wave characteristic can be used to encode information for wave-based computing. The choice of information encoding is important because it informs the physical structures used to perform computational tasks and also influences robustness.5 For the purpose of this paper, we focus on phase-based encoding because it is highly compositional—we can compose or cascade logic gates to form more complex circuits without recourse to non-wave-based elements.

As an illustration of phase encoding, consider a sinusoidal signal A sin ( ω t + ϕ ). We define phase ϕ = 0 to represent the logical bit 0 and ϕ = π to represent the logical bit 1. As an illustration, if we perform a computation where two waves corresponding to bit 1 and one wave corresponding to bit 0 are superimposed, we get A sin ( ω t + π ) + A sin ( ω t + π ) + A sin ( ω t ) = A sin ( ω t + π ), which is a logical 1. Note that we have used the same amplitude A for each wave. If the output has a non-zero amplitude different from A, we normalize it to A before using it as an input to another gate. For practicality, we also choose to avoid situations in which there is total destructive interference, e.g., a superposition of A sin ( ω t ) and A sin ( ω t + π ).

String diagrams are a diagrammatic alternative to symbolic reasoning.31–33,35,36 Visually intuitive yet formally rigorous, they have been applied to scientific and engineering areas as diverse as quantum physics42,43 and computing,36,37 game theory,40,41 control theory,44 electric circuit theory,45,46 machine learning,34 and linguistics.38,39

In wave-based logic circuits, signals are transmitted through waveguides. Such a waveguide can be represented by a “wire,”
(1)
through which a wave moves from top to bottom. This structure is an identity gate: the simplest possible logic gate.
Throughout the remainder of this paper, we shall assume that a wave sin ( ω t ) (where ϕ = 0) enters each circuit from the “top,” and exits at the “bottom” after being modified by the circuit. If the exiting wave has phase π, this corresponds to logical output 1; if it has phase 0, to logical output 0. A wire with a phase shift ϕ can be represented as
(2)
The phase shift has a single parameter ϕ { 0 , π }, where ϕ = p π ( ϕ = π corresponds to p = 1 and ϕ = 0 corresponds to p = 0). A single phase shift along a wire can also act as initialization of a Boolean logic variable:
To create more complex systems, we can compose copies of circuits (1) and (2). For instance, if we compose two copies of (2) with phase shifts α ( = a π) and β ( = b π), respectively, we get the following diagram:
(3)
This circuit is an example of series or sequential composition in which the phase of the input wave is manipulated by a shift α followed by β.
If we set the second phase of the above circuit to 0,
we get a circuit that is a composition of the initialized variable α and an identity gate. In other words, this circuit outputs the initialized variable.
If the second phase of circuit (3) is set to π instead,
we obtain a composition of variable α and phase shift π. What are the input–output relations of this gate? Setting input variable α = 0, we get the output π, whereas applying input α=π, we obtain the output 0. This action can be summarized in the truth table
which is essentially that of a NOT gate.20 Hence, we can interpret this gate as the NOT gate a. We may, further, define an abbreviated diagram for the complement of the variable a as follows:
Consider circuit (3) again with two variables:
If both the inputs α, β are 0 or π, the output is 0. If the inputs are different, the output is π. Therefore, we arrive at the truth table
of the Exclusive OR (XOR) gate.21 Hence, its interpretation in Boolean algebra is (ab)(ab).
If we apply a NOT gate (i.e., π phase shift) at the bottom of an XOR gate,
we get an XNOR gate with the truth table
hence, the Boolean algebraic interpretation of this diagram is (ab)(ab).
Wires can be composed in parallel as well. For example, a parallel composition of two wires with phase shifts α and β respectively is given by
We may, moreover, want to split a wave signal into two or more paths traveling down different waveguides. We denote splitting by the “copy” operation, which for the one-to-three case is represented by
and produces three copies of the wave entering from the top wire.
The dual of this operation is the “merge” operation
which adds the three waves entering the top three wires.
In order to generate phase-encoded wave-logic gates, we are concerned with one-three copy and three-one merge operations only. For instance, using copy, three phase shifts (α, β, γ) in parallel, and merge, we can generate the gate
To explain its functionality, consider a signal with ϕ=0 that enters the top wire, and gets copied into the three wires below. The three copies are phase shifted by α, β, γ (corresponding to the logical inputs a, b, c) and are then merged into a single wire to give an output phase α+β+γ=aπ+bπ+cπ. The truth table is given by
This is a majority (MAJ) gate,27–29 and its Boolean algebraic interpretation is (ab)(bc)(ca).
From the above-mentioned table, it can be seen that if one of the inputs, say c, is fixed at 0, the truth table of an AND gate is obtained.60 
Instead, if the input c is fixed at 1, we get the truth table of an OR gate.60 
Diagrammatically, these gates are represented as
with the Boolean algebraic interpretations ab and ab, respectively.
To summarize, using wires, phase shifts, copy and merge operations, and series and parallel composition, we have created identity, NOT, AND, OR, XOR, XNOR, and MAJ gates for wave-based computation. Logic gates can be composed to form more complex circuits. For example, the output of an AND gate a b may be used as the input of an OR gate such that an ( a b ) c circuit is obtained. Diagrammatically, such a circuit is generated by plugging the a b gate in as an input inside an gate with c as the other input:
As another example of composition, if the output of a logic gate, say a b, is to be inverted— ( a b ) —diagrammatically, it is obtained by composing the a b gate with a π phase shift, i.e., a NOT gate:

The foregoing description has demonstrated the versatility of string diagrams as a simple and visually intuitive way to represent wave-logic circuits. We shall now discuss their use in the context of logical reasoning.

We take two diagrams to be (operationally) equal if they represent the same logical operation. Now, we shall define diagram substitution/rewrite rules based on this notion of equality.

We have already introduced two definitional rules: identity (ID) and complement (Comp).
The rest of the rules are fusion (F), copy (C), commutativity (CM), distributivity (D), majority (M), associativity (A), and chopping (CH):
where + is sum modulo 2π.
where α,β,γ,ϕ,θ{0,π}.
As a warm-up exercise in diagrammatic reasoning, we can use the rules above to derive another rewrite rule:
We start with the left-hand side and apply complement, copy, fusion, identity, chopping, fusion, and identity to obtain the right-hand side.

At this point, it is prudent to ask whether this string diagrammatic formalism is universal, sound, and complete for Boolean algebra. Universality requires that every Boolean algebraic expression can be diagrammatically represented; soundness that every diagrammatic derivation be correct when interpreted as Boolean algebra; and completeness that every valid Boolean algebraic equation can be diagrammatically derived.

Any Boolean algebraic expression consists of Boolean variables connected by ∧, ∨, and operations. We have string diagrammatic formulas for these variables (phase shifts) and operations (logic gates). Taking the ∧ or ∨ of a Boolean expression with another one diagrammatically means nesting the corresponding diagrams in an AND or OR circuit. Taking the of an expression corresponds to composing the circuit with a NOT gate (i.e., a π phase shift). Our string diagrammatic formalism is, therefore, universal by construction.

A comprehensive discussion of soundness and completeness is beyond of the scope of this paper. However, we can provide an outline description by considering the axioms of Boolean algebra:

  • x , y B , x y = y x,

  • x , y B , x y = y x,

  • x B , x 0 = x,

  • x B , x 1 = x,

  • x B , x x = 1,

  • x B , x x = 0,

  • x , y , z B , x ( y z ) = ( x y ) ( x z ),

  • x , y , z B , x ( y z ) = ( x y ) ( x z ),

    where B = { 0 , 1 }.

The first two of these are diagrammatically contained in the commutativity (CM) rule, the second two in the chopping (CH) rule, and the third two in the CH2 rule. The last two axioms correspond to distributivity (D). One might, then, ask, to what do the rest of the diagrammatic rules correspond? The answer is that some have counterparts in Boolean algebra, which are derivable from the above axioms—in fact, they are also derivable from the string diagrams corresponding to the Boolean algebraic axioms; others are purely string diagrammatic (i.e., they come for free with the formalism) but lead to efficient Boolean algebraic derivations diagrammatically.

The diagrammatic formalism can be used to design, analyze, and optimize circuits. We shall now present some examples.

A half adder is characterized by the Boolean expressions S=(ab)(ab) and C=ab for sum and carry, respectively. Its truth table is given by
We know how to implement an AND gate diagrammatically. So, the design for the carry circuit is straightforward. The expression for sum is that of an XOR gate, which is implemented by series composition of the two phase inputs. Therefore, we get the following circuit for the half adder.
Now, a slightly more complicated example. A full adder is given by the truth table
Notice that the c_out output is equal to that of the MAJ gate whose implementation we have already discussed. On the other hand, the first half of sum (when c_in=0) is the output of XOR gate for inputs a and b whereas the second half (when c_in=1) is its complement. This means we can get the sum circuit by composing the XOR of a, b with phase shift c_in
where we represent the phase shift corresponding to c_in by γi.
As an example of analysis, we take the following circuit:
What is the behavior of the circuit if input a is set to 0? Such a situation amounts to replacing by in the circuit, which can then be simplified by the rewrite rules:
Now, optimization: we provide an example of simplification of a wave-based Boolean circuit through our diagrammatic approach.
Traditionally, in order to simplify a logic circuit, we write the algebraic expression for the circuit, simplify the expression, and then use this expression to draw the simplified circuit.
Using our formalism, we can perform simplification without an intermediate algebraic step. The diagrams, therefore, provide complete rewrite tools for performing the simplification of Boolean circuits,
Indeed, the diagrams can, in principle, be used as an alternative to Boolean algebra by mapping the expressions to diagrams, performing graphical simplification, and then converting the simplified diagrams into algebraic expressions again.

Although as a syntax, Boolean algebra is more concise as compared to string diagrams, the latter approach is more amenable to visual intuition which is useful for a circuit designer or analyst.

In summary, we have presented a general string diagrammatic formalism for wave-based logic circuits. Our work comes against the backdrop of a recent surge of interest and success in applying string diagrams to many different branches of science and technology.34,36–46

The formalism is device-independent and hence useful as a visual, intuitive aid to design, optimize, and analyze circuits in different physical platforms that are based on wave-based or majority-logic-based computation. Some such technologies include quantum-dot cellular automata,55 nanomagnet logic,58 single-electron circuits,59 graphene spin circuits,56 spin torque majority gates,57 molecular scale electronics,54 and DNA computing.53 

A major advantage of our approach lies in its immediate applicability to spin-wave logic circuits,5,27 in the sense that the components of the circuit diagrams map directly to their physical counterparts. In other words, “what you see is what you get.” The formalism, moreover, provides a theoretical framework for various spin-wave logic implementations such as those in Refs. 20, 21, and 27–29.

In addition, diagrammatic rewrite rules allow graphical simplification of circuits which potentially lend themselves to automation and/or software-based optimization.

Broadly, the approach is very expressive in the flexibility it lends to circuit design and implementation. For instance, one may tweak a particular circuit to obtain the desired design (possibly subject to hardware constraints) by moving the phase shifts along the wires and across other phase shifts, copy, and merge operations (applying the corresponding rules). More concretely, if one is to compose a NOT gate with a circuit, it may be cascaded at the bottom or the top of the circuit (or the circuit may be modified internally in a more elaborate manner), giving the same logical outcome in either case.

Another way to conceive of our formalism is as a diagrammatic alternative to symbolic Boolean algebra. There lies the possibility of a new axiomatization of Boolean algebra where some aspects of traditional axioms are taken care of by the graphical formalism. This line of thought will be the topic of future work.

M.H.W. was supported by Rhodes Trust and Magdalen College, Oxford.

The authors have no conflicts to disclose.

Muhammad Hamza Waseem: Conceptualization (lead); Investigation (lead); Methodology (supporting); Writing – original draft (lead), Writing – review & editing (equal). Alexy Davison Karenowska: Methodology (lead); Project administration (lead); Supervision (lead); Writing – original draft (supporting); Writing – review & editing (equal).

The data that support the findings of this study are available from the corresponding authors upon reasonable request.

1.
R. L.
Boylestad
and
L.
Nashelsky
,
Electronic Devices and Circuit Theory
, 11th ed. (
Pearson Education Inc.
,
2018
).
2.
E. H.
Jiang
and
W. B.
Jiang
, “
Theory of expansion Boolean algebra and its applications in CMOS VLSI digital systems
,”
Circuits, Syst., Signal Process.
38
,
5817
5838
(
2019
).
3.
J. P.
Uyemura
,
CMOS Logic Circuit Design
(
Springer Science & Business Media
,
1999
).
4.
R. H.
Dennard
,
F. H.
Gaensslen
,
H. N.
Yu
,
V. L.
Rideout
,
E.
Bassous
, and
A. R.
LeBlanc
, “
Design of ion-implanted MOSFET's with very small physical dimensions
,”
IEEE J. Solid-State Circuits
9
(
5
),
256
268
(
1974
).
5.
A.
Mahmoud
,
F.
Ciubotaru
,
F.
Vanderveken
,
A. V.
Chumak
,
S.
Hamdioui
,
C.
Adelmann
, and
S.
Cotofana
, “
Introduction to spin wave computing
,”
J. Appl. Phys.
128
(
16
),
161101
(
2020
).
6.
G. E.
Moore
, “
Cramming more components onto integrated circuits
,”
Proc. IEEE
86
(
1
),
82
85
(
1998
).
7.
M. M.
Waldrop
, “
The chips are down for Moore's law
,”
Nat. News
530
(
7589
),
144
(
2016
).
8.
International Roadmap for Devices and Systems: Beyond CMOS and Emerging Materials Integration
(
IEEE
,
2022
).
9.
Y.
Imai
and
Y.
Ohtsuka
, “
Optical computing based on interference fringe shifting
,”
Opt. Eng.
25
(
1
),
250198
(
1986
).
10.
P.
Ambs
, “
Optical computing: A 60-year adventure
,”
Adv. Opt. Technol.
2010
,
372652
.
11.
N. L.
Kazanskiy
,
M. A.
Butt
, and
S. N.
Khonina
, “
Optical computing: Status and perspectives
,”
Nanomaterials
12
(
13
),
2171
(
2022
).
12.
M.
Rahman
,
S.
Khasanvis
,
J.
Shi
, and
C. A.
Moritz
, “
Wave interference functions for neuromorphic computing
,”
IEEE Trans. Nanotechnol.
14
(
4
),
742
750
(
2015
).
13.
J.
Atulasimha
and
S.
Bandyopadhyay
,
Nanomagnetic and Spintronic Devices for Energy-Efficient Memory and Computing
(
John Wiley & Sons
,
2016
).
14.
A. A.
Serga
,
A. V.
Chumak
, and
B.
Hillebrands
, “
YIG magnonics
,”
J. Phys. D: Appl. Phys.
43
(
26
),
264002
(
2010
).
15.
A.
Khitun
,
M.
Bao
, and
K. L.
Wang
, “
Magnonic logic circuits
,”
J. Phys. D: Appl. Phys.
43
(
26
),
264005
(
2010
).
16.
A. V.
Chumak
, “
Fundamentals of magnon-based computing
,” arXiv:1901.08934 (
2019
).
17.
Q.
Wang
,
R.
Verba
,
T.
Brächer
,
F.
Ciubotaru
,
C.
Adelmann
,
S. D.
Cotofana
, and
A. V.
Chumak
, “
Integrated magnonic half-adder
,” arXiv:1902.02855 (
2019
).
18.
A.
Mahmoud
,
F.
Vanderveken
,
F.
Ciubotaru
,
C.
Adelmann
,
S.
Cotofana
, and
S.
Hamdioui
, “
Spin wave based full adder
,” in
2021 IEEE International Symposium on Circuits and Systems (ISCAS)
(
IEEE
,
2021
), pp.
1
5
.
19.
U.
Garlando
,
Q.
Wang
,
O. V.
Dobrovolskiy
,
A. V.
Chumak
, and
F.
Riente
, “
Numerical model for 32-bit magnonic ripple carry adder
,”
IEEE Trans. Emerging Top. Comput.
11
,
679
(
2023
).
20.
M. P.
Kostylev
,
A. A.
Serga
,
T.
Schneider
,
B.
Leven
, and
B.
Hillebrands
, “
Spin-wave logical gates
,”
Appl. Phys. Lett.
87
(
15
),
153501
(
2005
).
21.
T.
Schneider
,
A. A.
Serga
,
B.
Leven
,
B.
Hillebrands
,
R. L.
Stamps
, and
M. P.
Kostylev
, “
Realization of spin-wave logic gates
,”
Appl. Phys. Lett.
92
(
2
),
022505
(
2008
).
22.
R.
Cuykendall
and
D. R.
Andersen
, “
Reversible optical computing circuits
,”
Opt. Lett.
12
(
7
),
542
544
(
1987
).
23.
A.
Khitun
, “
Multi-frequency magnonic logic circuits for parallel data processing
,”
J. Appl. Phys.
111
(
5
),
054307
(
2012
).
24.
A. V.
Chumak
,
V. I.
Vasyuchka
,
A. A.
Serga
, and
B.
Hillebrands
, “
Magnon spintronics
,”
Nat. Phys.
11
(
6
),
453
461
(
2015
).
25.
G.
Csaba
,
A.
Papp
, and
W.
Porod
, “
Spin-wave based realization of optical computing primitives
,”
J. Appl. Phys.
115
(
17
),
17C741
(
2014
).
26.
S.
Khasanvis
,
M.
Rahman
,
S. N.
Rajapandian
, and
C. A.
Moritz
, “
Wave-based multi-valued computation framework
,” in
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures
(
IEEE
,
2014
), pp.
171
176
).
27.
P.
Shabadi
,
S. N.
Rajapandian
,
S.
Khasanvis
, and
C. A.
Moritz
, “Design of spin wave functions-based logic circuits,” in
Spin
(
World Scientific Publishing Company
,
2012
), Vol. 2, No. 03, p.
1240006
.
28.
T.
Fischer
,
M.
Kewenig
,
D. A.
Bozhko
,
A. A.
Serga
,
I. I.
Syvorotka
,
F.
Ciubotaru
, and
A. V.
Chumak
, “
Experimental prototype of a spin-wave majority gate
,”
Appl. Phys. Lett.
110
(
15
),
152401
(
2017
).
29.
O.
Zografos
,
S.
Dutta
,
M.
Manfrini
,
A.
Vaysset
,
B.
Sorée
,
A.
Naeemi
, and
I. P.
Radu
, “
Non-volatile spin wave majority gate at the nanoscale
,”
AIP Adv.
7
(
5
),
056020
(
2017
).
30.
M.
Balynskiy
,
H.
Chiang
,
D.
Gutierrez
,
A.
Kozhevnikov
,
Y.
Filimonov
, and
A.
Khitun
, “
Reversible magnetic logic gates based on spin wave interference
,”
J. Appl. Phys.
123
(
14
),
144501
(
2018
).
31.
R.
Penrose
, “
Applications of negative dimensional tensors
,”
Comb. Math. Appl.
1
,
221
244
(
1971
).
32.
A.
Joyal
and
R.
Street
, “
The geometry of tensor calculus, I
,”
Adv. Math.
88
(
1
),
55
112
(
1991
).
33.
P.
Selinger
, “
A survey of graphical languages for monoidal categories
,” in
New Structures for Physics
(
Springer
,
2011
), pp.
289
355
.
34.
D.
Shiebler
,
B.
Gavranović
, and
P.
Wilson
, “
Category theory in machine learning
,” arXiv:2106.07032 (
2021
).
35.
R.
Piedeleu
and
F.
Zanasi
, “
An introduction to string diagrams for computer scientists
,” arXiv:2305.08768 (
2023
).
36.
B.
Coecke
and
A.
Kissinger
,
Picturing Quantum Processes. A First Course in Quantum Theory and Diagrammatic Reasoning
(
Cambridge University Press
,
2017
).
37.
B.
Coecke
and
S.
Gogioso
,
Quantum in Pictures
(
Quantinuum
,
2022
).
38.
B.
Coecke
, “
The mathematics of text structure
,”
Joachim Lambek: The Interplay of Mathematics, Logic, and Linguistics
(
Springer
,
2021
), pp.
181
217
.
39.
V.
Wang-Mascianica
,
J.
Liu
, and
B.
Coecke
, “
Distilling text into circuits
,” arXiv:2301.10595 (
2023
).
40.
J.
Hedges
,
E.
Shprits
,
V.
Winschel
, and
P.
Zahn
, “
Compositionality and string diagrams for game theory
,” arXiv:1604.06061 (
2016
).
41.
N.
Ghani
,
J.
Hedges
,
V.
Winschel
, and
P.
Zahn
, “
Compositional game theory
,” in
Proceedings of the 33rd Annual ACM/IEEE Symposium on Logic in Computer Science
(
IEEE
,
2018
), pp.
472
481
.
42.
B.
Coecke
, “
Kindergarten quantum mechanics: Lecture notes
,”
AIP Conf. Proc.
810
(
1
),
81
98
(
2006
).
43.
B.
Coecke
,
D.
Horsman
,
A.
Kissinger
, and
Q.
Wang
, “
Kindergarden quantum mechanics graduates… or how I learned to stop gluing LEGO together and love the ZX-calculus
,”
Theor. Comput. Sci.
897
,
1
22
(
2022
).
44.
J. C.
Baez
and
J.
Erbele
, “
Categories in control
,” arXiv:1405.6881 (
2014
).
45.
G.
Boisseau
and
P.
Sobociński
, “
String diagrammatic electrical circuit theory
,” arXiv:2106.07763 (
2021
).
46.
D. R.
Ghica
,
G.
Kaye
, and
D.
Sprunger
, “
A compositional theory of digital circuits
,” arXiv:2201.10456 (
2022
).
47.
Y.
Yin
,
F.
Pan
,
M.
Ahlberg
,
M.
Ranjbar
,
P.
Dürrenfeld
,
A.
Houshang
, and
J.
Åkerman
, “
Tunable permalloy-based films for magnonic devices
,”
Phys. Rev. B
92
(
2
),
024427
(
2015
).
48.
C. S.
Davies
,
A.
Francis
,
A. V.
Sadovnikov
,
S. V.
Chertopalov
,
M. T.
Bryan
,
S. V.
Grishin
, and
V. V.
Kruglyak
, “
Towards graded-index magnonics: Steering spin waves in magnonic networks
,”
Phys. Rev. B
92
(
2
),
020408
(
2015
).
49.
Á.
Papp
,
W.
Porod
,
Á. I.
Csurgay
, and
G.
Csaba
, “
Nanoscale spectrum analyzer based on spin-wave interference
,”
Sci. Rep.
7
(
1
),
9245
(
2017
).
50.
A.
Khitun
, “
Magnonic holographic devices for special type data processing
,”
J. Appl. Phys.
113
(
16
),
164503
(
2013
).
51.
F.
Macià
,
A. D.
Kent
, and
F. C.
Hoppensteadt
, “
Spin-wave interference patterns created by spin-torque nano-oscillators for memory and computation
,”
Nanotechnology
22
(
9
),
095301
(
2011
).
52.
V. E.
Demidov
,
S. O.
Demokritov
,
K.
Rott
,
P.
Krzysteczko
, and
G.
Reiss
, “
Nano-optics with spin waves at microwave frequencies
,”
Appl. Phys. Lett.
92
(
23
),
232503
(
2008
).
53.
W.
Li
,
Y. A. N. G.
Yang
,
H.
Yan
, and
Y.
Liu
, “
Three-input majority logic gate and multiple input logic circuit based on DNA strand displacement
,”
Nano Lett.
13
(
6
),
2980
2988
(
2013
).
54.
G. S.
Rose
and
M. R.
Stan
, “
A programmable majority logic array using molecular scale electronics
,”
IEEE Trans. Circuits Syst. I
54
(
11
),
2380
2390
(
2007
).
55.
A.
Imre
,
G.
Csaba
,
L.
Ji
,
A.
Orlov
,
G. H.
Bernstein
, and
W.
Porod
, “
Majority logic gate for magnetic quantum-dot cellular automata
,”
Science
311
(
5758
),
205
208
(
2006
).
56.
D.
Khokhriakov
,
S.
Sayed
,
A. M.
Hoque
,
B.
Karpiak
,
B.
Zhao
,
S.
Datta
, and
S. P.
Dash
, “
Multifunctional spin logic operations in graphene spin circuits
,”
Phys. Rev. Appl.
18
(
6
),
064063
(
2022
).
57.
A.
Vaysset
,
M.
Manfrini
,
D. E.
Nikonov
,
S.
Manipatruni
,
I. A.
Young
,
G.
Pourtois
, and
A.
Thean
, “
Toward error-free scaled spin torque majority gates
,”
AIP Adv.
6
(
6
),
065304
(
2016
).
58.
M.
Vacca
,
M.
Graziano
,
J.
Wang
,
F.
Cairo
,
G.
Causapruno
,
G.
Urgese
, and
M.
Zamboni
, “
Nanomagnet logic: An architectural level overview
,” in
Field-Coupled Nanocomputing
, Paradigms, Progress, and Perspectives (
Springer
,
2014
), pp.
223
256
.
59.
H.
Iwamura
,
M.
Akazawa
, and
Y.
Amemiya
, “
Single-electron majority logic circuits
,”
IEICE Trans. Electron.
81
(
1
),
42
48
(
1998
).
60.
B.
Parhami
,
D.
Abedi
, and
G.
Jaberipur
, “
Majority-logic, its applications, and atomic-scale embodiments
,”
Comput. Electr. Eng.
83
,
106562
(
2020
).
61.
M.
Balynsky
,
H.
Chiang
,
D.
Gutierrez
,
A.
Kozhevnikov
,
Y.
Filimonov
, and
A.
Khitun
, “
Quantum computing without quantum computers: Database search and data processing using classical wave superposition
,”
J. Appl. Phys.
130
(
16
),
164903
(
2021
).
Published open access through an agreement withJISC Collections