Ultra-low resistance Au-free V/Al/Ti/TiN ohmic contacts for AlGaN/GaN HEMTs

High electron mobility transistors (HEMTs) based on AlGaN/GaN heterostructures have become increasingly popular in recent years^1–4 due to their high electron mobility and density of the two-dimensional electron gas (2DEG) forming at the AlGaN/GaN interface.⁵ Combined with the high breakdown voltage of GaN, HEMTs enable high frequency and high power switching. To lower the on-state resistance R_ON of GaN-HEMTs, a reduction in the metal–semiconductor source/drain (S/D) contact resistance R_c is essential. Ultra-low ohmic contact resistance of <0.2 Ω mm was reported for Ti/Al/Ni/Au contacts.^6–9 However, Au-free ohmic contacts are highly preferred, due to their dramatically improved contact surface morphology¹⁰ and edge acuity required for high frequency applications,¹¹ as well as lower manufacturing cost and CMOS process compatibility.^1,3 Achieving ultra-low R_c with Au-free metallization is challenging due to large bandgap AlGaN and required annealing temperatures.^2,11 For Au-free ohmic contacts, low work function Ti/Al-based metal stacks are preferred, such as Ti/Al/TiN^12–14 and Ti/Al/Ti/TiN.^15–19 Only two published works achieved a R_c in the range of 0.1 Ω mm, both showing a Ti_xAl_y/TiN stack, both stemming from the same working group.^20,21 Fan et al. achieved <0.1 Ω mm on Al_0.25Ga_0.75N after 880 °C anneal,²⁰ and Jiang et al. achieved 0.11 Ω mm on Al_0.2Ga_0.8N after 920 °C anneal.²¹ In other publications, additional technologies have been used to enhance charge carrier tunneling probability in order to achieve R_c < 0.2 Ω mm, like S/D barrier recess,^{17,18,22–27} regrowth,^26,28–31 or contact region doping by ion implantation.^32–34 However, these additional processing steps significantly increase fabrication complexity and cost.

Au-based metallizations are known to directly contact the 2DEG channel by locally dissolving the AlGaN/GaN barrier.^10,16,35 In contrast, Au-free metallizations grow epitaxially on the GaN cap^{10,14,16,19,36,37} and need to induce intrinsic doping to make the AlGaN/GaN barrier conductive,^6,38,39 as we have shown in a previous publication.¹⁹ Therefore, a contact metal is required that depletes N from the AlGaN/GaN barrier by forming a thin nitride phase directly at the interface to the GaN cap^13,16,39 and hence inducing a large number of N vacancies in the underlying AlGaN/GaN barrier, acting as shallow donors.^19,40,41

Here, we present a vanadium (V) based S/D contact, which is Au-free and shows ultra-low R_c, very low surface roughness and high edge acuity. V is used in an Au-free metallization and was chosen for having the same metal work function as Ti (Φ_V,Ti = 4.3 eV⁴²) but forms a lower work function nitride (Φ_VN = 3.56 eV⁴³ vs Φ_TiN = 3.74 eV⁴⁴) which is known to contribute to the ohmic contact formation on GaN.^13,19,39 Furthermore, V has a higher electrical conductivity than Ti [σ_V = 5 × 10⁶ (Ω m)⁻¹ vs σ_Ti = 2.5 × 10⁶ (Ω m)⁻¹].⁴⁵ A R_c < 0.1 Ω mm is achieved on Al_0.25Ga_0.75N after annealing at only 800 °C, without using S/D barrier recess, regrowth, or ion-implantation. However, these technologies could pave the way to Au-free ultra-low R_c values to AlGaN barriers with increased Al concentrations.^46,47 The electrical performance of the contact is demonstrated on planar HEMTs and compared to devices with Au-free Ti/Al/Ti/TiN and state-of-the-art Au-based Ti/Al/Ni/Au ohmic contacts.

For this study, AlGaN/GaN heterostructures grown by metal organic chemical vapor deposition (MOCVD) on sapphire substrates were used. The epitaxial stack consisted of 1.9 μm undoped GaN buffer, 24 nm Al_0.25Ga_0.75N barrier, and 3 nm undoped GaN cap (Fig. 1). The sheet resistivity was approximately R_sh ≈ 420 Ω/sq. at room temperature.

As test devices, transfer length method (TLM) patterns and planar HEMTs were fabricated using laser writing lithography. Mesa insulation was patterned by inductively coupled plasma reactive ion etching (ICP-RIE) using a BCl₃/Cl₂ based gas combination. The GaN native oxide surface termination was chemically wet etched in 4% HCl. The contacts were defined using a lift-off process, the deposition of the Au-free contacts (V/Al/Ti/TiN, sample A, and Ti/Al/Ti/TiN, sample B) was done by magnetron sputtering at room temperature. The TiN layer was deposited by reactive sputtering, as described in our previous publication.¹⁹ For comparison, a state-of-the-art Au-based stack (Ti/Al/Ni/Au, sample C) was deposited by e-beam evaporation. The contacts were activated using rapid thermal annealing (RTA) for 300 s in N₂ environment at atmospheric pressure in a SiC susceptor. Layer thicknesses and RTA temperatures (shown in Table I) were chosen to achieve the lowest R_c of each metallization scheme, while not exceeding 850 °C. Subsequently, gate (G) Ni/Au (20/100 nm) contacts were deposited by e-beam.

R_c and R_sh were measured using a linear TLM structure consisting of 17 contact pads of w × l = 200 × 80 μm², with increasing spacing from d = 3–80 μm. On each sample, 10 TLM patterns were measured, resulting in 160 data points. Confocal laser scanning microscopy (CLSM) was used to correct the dimension error of the TLM patterns and to measure the R_RMS surface roughness. Condenser corrected scanning transmission electron microscopy (STEM) was used at atomic resolution to reveal the ohmic contact microstructure and phase formation after RTA by applying a high-angle annular dark-field (HAADF) detector together with energy dispersive x-ray spectroscopy (EDX).

Figure 2 shows linear TLM results for the three samples that exhibited linear current–voltage (I–V) characteristics, confirming their ohmic behavior. The achieved R_c and R_sh of the substrates 2DEG were extracted, considering the real TLM-pad spacings measured by CLSM. R² values for the linear fits were remarkably high, especially for sample A and are given in Fig. 2. R_c was (0.08 ± 0.02) Ω mm (ρ_c < 2.4 × 10⁻⁷ Ω cm²) for sample A (V/Al/Ti/TiN), (1.1 ± 0.1) Ω mm (3.1 × 10⁻⁵ Ω cm²) for sample B (Ti/Al/Ti/TiN), and (0.26 ± 0.05) Ω mm (1.6 × 10⁻⁶ Ω cm²) for sample C (Ti/Al/Ni/Au).

The contact RMS surface roughness (R_RMS), surface morphology, and optical images of the planar HEMT test devices were obtained by CLSM (shown in Fig. 3). R_RMS of the Au-free metallizations was with 3.5 nm more than one order of magnitude lower compared to the Au-reference sample with R_RMS of 92 nm. The Au containing sample suffered from large Ni/Al and Au/Al rich grains of up to 0.9 μm size, which are known from the literature.^35,48,49 Under optical magnification, sample A displayed high edge acuity while maintaining minimal edge roughness.

Figure 4 shows HAADF-STEM images and corresponding EDX maps of the Au-free contacts of samples A and B after RTA processing. Identification of intermetallic phases, as pointed out in the HAADF images of Fig. 4, are the result of structural information based on the HAADF images at atomic resolution as well as quantitative EDX evaluation of shown elemental mappings. The main difference between the two stacks is the formation of a Ti₂AlN layer at the GaN interface in the Ti/Al/Ti/TiN stack [sample B, Fig. 4(b)], whereas such a Ti₂AlN layer is apparently suppressed in the V-based stack [sample A, Fig. 4(a)]. Therefore, V seems to ensure a direct ohmic contact between GaN and an intermetallic Al₃(V,Ti) phase forming in sample A, which is assumed to be electrically well conductive because Al inside the Al₃(Ti,V) phase occupies a fcc-based Al sublattice, the same as pure Al metal. In contrast, Ti₂AlN is known for its anisotropic conductivity, which is significantly lower along its c axis,^50,51 representing the actual pathway of conductivity in the stack. Furthermore, the columnar crystallites of the TiN cap in sample A are slightly tilted toward each other [Fig. 4(a): Ti;N], which may also enhance electrical conductivity due to small-angle crystallite boundaries.

A second explanation for increased Ti/Al/Ti/TiN contact resistance is attributed to the residual native oxide content on top of the GaN cap, as O cannot be fully eliminated during HCl cleaning procedure and is clearly visible in sample B [Fig. 4(b): O], resulting in decreased conductivity. This is not the case for sample A, where during RTA and Al₃(V,Ti) phase formation, V-bearing Al–Ti melt getters the surface oxide from the GaN cap more efficiently than Ti₂AlN. Thus, O accumulates after crystallization in these V-bearing islands [Fig. 4(a): O]. Between these islands, a direct GaN/metal contact is visible [Fig. 4(a): Al] and might also support the ultra-low contact resistance of the V/Al/Ti/TiN stack to the HEMTs 2DEG.

The fabricated planar HEMTs have a gate width of 50 μm and a gate length of 15 μm. The output characteristics [Fig. 5(a)] shows the drain saturation current I_D,sat of all three samples for various gate–source voltages (V_GS = 0…−5 V). The maximum output current (I_D,sat or I_ON) is limited by R_sh and R_c from S/D. The highest value of I_D,sat = 290 mA/mm was achieved for the V-based device (sample A). Here, R_c contributes only by ≈1% to the total device on-state resistance R_ON of 7.8 Ω mm. For the Au-based device (sample C), I_D,sat is slightly lower (279 mA/mm) caused by slightly increased R_c and R_sh, leading to an increased R_ON of 8.2 Ω mm. The lowest I_D,sat of 222 mA/mm was measured for the Ti-based Au-free sample B, caused by the increased R_c, which is responsible for ≈10% of the total device resistance value R_ON of 11.7 Ω mm. Relevant parameters for all three samples are given in Table I.

The device transfer curves at a S/D voltage of V_DS = 5 V are shown in Fig. 5(b). The V-based Au-free metallization (sample A) has an I_ON/I_OFF ratio of 7 orders of magnitude and low gate leakage current I_G,leak and threshold voltage V_th, which are both comparable with the Au-based reference metallization (sample C). The Ti-based Au-free sample B has a reduced I_ON/I_OFF ratio of only 5 orders of magnitude because of its higher R_c. Moreover, I_G,leak and V_th are both increased due to increased RTA temperature as the devices are not passivated. However, this can be attributed to the device channel and has less effect on the ohmic contacts but may underline the benefits of reducing the RTA thermal budget during contact formation.

In summary, a V-based Au-free V/Al/Ti/TiN (30/135/20/80 nm) ohmic contact metallization for Al_0.25Ga_0.75N/GaN HEMTs is demonstrated, showing an ultra-low contact resistance of R_c < 0.1 Ω mm (ρ_c < 2.4 × 10⁻⁷ Ω cm²) and very low surface roughness (R_RMS = 3.5 nm) after annealing at 800 °C. No additional S/D barrier recess, regrowth, or ion-implantation was needed. The results prove that the V-based Au-free contact can compete with the state-of-the-art Au-based Ti/Al/Ni/Au metallization in terms of R_c, while having CMOS compatibility and showing far smoother surface morphology required for high frequency device fabrication. Compared to the Ti/Al/Ti/TiN metallization, the V-based contact shows significantly lower R_c and allows decreased annealing temperatures. A mechanism is proposed, in which the formation of a less conducting Ti₂AlN layer is suppressed by V and a Al₃(V,Ti) layer is formed. Furthermore, the remaining native surface oxide of the GaN cap is gettered by V more efficiently through the formation of islands. This enables a direct electrical contact of the surrounding metallization with the HEMTs 2DEG, and hence high saturation current, low R_ON, and high I_ON/I_OFF ratio of the planar test device.

This work was financially supported by the Federal Ministry of Education and Research in Germany within the project “ForMikro – LeitBAN” (Grant No. 16ES1114) and within funding for the program Forschungslabore Mikroelektronik Deutschland (ForLab), in particular, “ForLab – Mat4μ” (Grant No. 16ES0947). We appreciate CENEM of University Erlangen-Nürnberg for access to TEM facilities.