The large physical size of superconducting qubits and their associated on-chip control structures presents a practical challenge toward building a large-scale quantum computer. In particular, transmons require a high-quality-factor shunting capacitance that is typically achieved by using a large coplanar capacitor. Other components, such as superconducting microwave resonators used for qubit state readout, are typically constructed from coplanar waveguides, which are millimeters in length. Here, we use compact superconducting through-silicon vias to realize lumped-element capacitors in both qubits and readout resonators to significantly reduce the on-chip footprint of both of these circuit elements. We measure two types of devices to show that through-silicon vias are of sufficient quality to be used as capacitive circuit elements and provide a significant reduction in size over existing approaches.

Superconducting qubits, a promising hardware platform for quantum computing applications, have progressed from proof-of-principle single-qubit demonstrations to mature deployments of many-qubit quantum processors.1–3 With increased processor size comes the need for vertical integration, which previously motivated the development of high-density superconducting through-silicon vias (TSVs) for connecting grounds and routing signals between the top and bottom sides of a chip.4–6 However, the potential utility of a TSV goes far beyond signal routing. In particular, a high-aspect-ratio TSV can have large self-capacitance that provides a means to miniaturize the largest lateral footprint components of superconducting quantum processors: the coplanar capacitance of the qubits and resonators. In this work, we demonstrate a compact TSV-enabled lumped-element resonator that provides vertical readout integration in a footprint smaller than that of a standard transmon qubit. We also demonstrate high-coherence transmon qubits, for which TSVs provide the majority of the capacitance across the Josephson junction (JJ), shrinking the on-chip footprint of the qubit by a factor of approximately 30. TSV integration, thus, provides a remarkable new method for scaling and improving superconducting quantum processors.

Previously, TSVs have been utilized to route signals to planar qubits5 or to shift electromagnetic modes in substrates to higher frequencies.4 While these are important applications of the technology, TSVs can have a much broader impact on superconducting qubits. In particular, they have the potential to be integrated into qubit circuits in a fundamentally different manner, in which their geometry is exploited to construct novel 3D devices that are not possible in a 2D architecture. The high-capacitance density enabled by TSVs can reduce the size of certain large qubit control and readout elements, allowing for a more compact tiling of qubits and their associated electronics. Furthermore, TSVs can be used to provide the large shunting capacitance needed for qubits, such as transmons,7 C-shunt flux qubits,8 or 0 π qubits,9 eliminating the requirement for a large area coplanar capacitor. We present the design and characterization of a novel TSV-integrated compact resonator for qubit readout and a compact transmon qubit incorporating TSVs. Our results, which represent the first use of superconducting TSVs as capacitive elements in a qubit circuit, establish the feasibility of using superconducting 3D technologies to enable new qubit and control circuit geometries.

One of the obstacles to building addressable qubit arrays is the size of each qubit's associated control and readout elements, which can be significantly greater than the inter-qubit spacing. In a typical configuration, a superconducting resonator is constructed from meandering sections of a coplanar waveguide (CPW) transmission line, terminated on each end of the resonator with either an open or a short circuit to ground. The termination determines the fundamental mode of the resonator, either λ / 4 or λ / 2, where λ is the mode wavelength.10 For readout multiplexing, several resonators are coupled to a shared transmission line,11 with one end of each resonator near the shared transmission line and the other end of each resonator near the qubit's reading out. In the limit of weak external coupling and high internal quality factors, the resonator frequency is set by the inductance and capacitance per unit length, l and c, respectively, along with the total resonator length.12 While using a CPW resonator is straightforward from a design and fabrication perspective, these resonators occupy a large area, i.e., the CPW has a length of order λ, which corresponds to several mm for mode frequencies in the 6–8 GHz range (see Fig. 1). Additionally, higher harmonics of the fundamental modes can also interact with the qubit, causing enhanced relaxation when the qubits are higher in frequency than the resonator.13 Lumped-element resonators can offer an improvement in both size and higher mode issues (a lumped-element resonator does not explicitly host higher harmonics at integer multiples of the fundamental mode frequency) in CPW resonators, but realizing a high-capacitance density in planar elements has previously proved elusive.

FIG. 1.

An optical micrograph of a planar superconducting qubit-resonator system. The device consists of a transmon qubit (highlighted in red) with a single Josephson junction and the large capacitive shunt, which are coupled to a CPW resonator (highlighted in blue). The insets are images, taken at the same scale, of the qubit and resonator components from two devices, which are miniaturized by using TSVs (the dark ovals in the images) for the capacitive circuit elements. The lumped-element resonators are on a separate chip and are bump bonded to a qubit chip, with the side (1) facing the qubit and coupled via the TSV resonator going through the chip to side (2).

FIG. 1.

An optical micrograph of a planar superconducting qubit-resonator system. The device consists of a transmon qubit (highlighted in red) with a single Josephson junction and the large capacitive shunt, which are coupled to a CPW resonator (highlighted in blue). The insets are images, taken at the same scale, of the qubit and resonator components from two devices, which are miniaturized by using TSVs (the dark ovals in the images) for the capacitive circuit elements. The lumped-element resonators are on a separate chip and are bump bonded to a qubit chip, with the side (1) facing the qubit and coupled via the TSV resonator going through the chip to side (2).

Close modal

To simultaneously realize a high quality, large capacitance, and small form factor, we use a superconducting TSV integrated into a compact lumped-element resonator. The resonator, shown in Fig. 2, comprises a central disk (with radius r) connected to a TSV and a meandering spiral (with linewidth w) and gaps (g) between adjacent spirals. The offset distance (d) between the edge of the spiral and the feedline sets the coupling quality factor of the resonator, Qc. In all of the designs presented here, the resonators are over-coupled, with their internal quality factors Qi much greater than Qc, which is related to the resonator linewidth κ = Q c / ω r. The resonators are capacitively coupled to the qubits via the TSV. The central disk, meandering spiral, and TSV are all constructed from a 200-nm-thick superconducting TiN film. Extended details of the TSV fabrication process are provided in the previous work.6 From a set of test λ / 4 CPW resonator test structures, we extract a kinetic inductance L k 2.0 pH/ of the TiN film. The combination of a high kinetic inductance film and a laterally compact TSV capacitor allows for a lumped-element resonator that is less than 180 μ m in diameter, smaller in dimension than capacitors typically used in transmon qubits. We note that, in principle, a lumped-element resonator could be constructed with a Josephson junction array or a higher-Lk material for even greater kinetic inductance density and, thereby, a smaller-sized resonator.14,15 Although not fundamental to the operation of the device, the resonators and qubits are fabricated on two separate chips, with an interposer chip comprising the resonators, shielding/ground TSVs, flux bias lines, and microwave antennas, as well as a qubit chip with transmon qubits, superconducting bump bonds, and etched-silicon spacers to set the separation distance of 3 μm between two chips.16 

FIG. 2.

Top panel: A schematic view of the spiral resonator coupled to the input/output feedline. Bottom panel: Measured resonator frequencies (circles) as a function of length of the spiral inductor. The colored bands represent the range of simulated resonator frequencies using L k = 2.0–2.2 pH / , to account for Lk variation across different chips across a wafer. The inset shows the simulated (black circles) and measured (red stars) values of the resonator line widths, κ, for different values of the distance between the resonator and CPW feedline.

FIG. 2.

Top panel: A schematic view of the spiral resonator coupled to the input/output feedline. Bottom panel: Measured resonator frequencies (circles) as a function of length of the spiral inductor. The colored bands represent the range of simulated resonator frequencies using L k = 2.0–2.2 pH / , to account for Lk variation across different chips across a wafer. The inset shows the simulated (black circles) and measured (red stars) values of the resonator line widths, κ, for different values of the distance between the resonator and CPW feedline.

Close modal

The bump-bonded devices are measured in a dilution refrigerator with base temperature T 12 mK. We find quantitative agreement between the measured resonator frequencies and those simulated using Sonnet electromagnetic solver ( f sim), as shown in Fig. 2. We vary the number of turns of the spiral inductor and compare the measured and simulated frequencies (with Lk = 2 pH / ) and find an average difference of f ¯ diff = 80 MHz or f ¯ diff / f sim = 1%. In addition to the spiral length variations, several additional devices were tested with reduced offset distance d to increase κ for faster qubit readout (inset of Fig. 2).

We measure the coherence times of several transmon qubits to further characterize the coupled qubit and resonator system. The qubit chips consist of both fixed frequency, single Josephson junction (JJ), transmon qubits, and flux-tunable transmons with two JJs placed in a SQUID loop. Changing magnetic flux through the SQUID loop changes the qubit frequency, proportional to 2 E J | cos ( π Φ / Φ 0 ) |, where EJ is the Josephson energy of the two JJs (designed here to be equal), Φ is the flux through the SQUID loop, and Φ 0 is the magnetic flux quantum. The values of measured energy relaxation time T1 for both the tunable and fixed-frequency transmons are shown in Fig. 3. Additionally, we find an echoed coherence time T 2 E with average value T 2 E = 47 μs for the fixed frequency transmons and T 2 E 2 T 1 at Φ = 0 (flux-sweet spot) for the flux-tunable transmons. The black dashed line is the expected T1 vs ωq accounting for both dielectric loss and Purcell relaxation13 through the readout resonator. For a frequency-independent dielectric quality factor Q diel = ω q T 1,17 we find Q diel = 10 6, which is consistent with the value we measure in other flip-chip devices coupled to CPW resonators. For the tunable transmon labeled “Qu1,” we measure a dispersive shift 2 χ / 2 π = 930 kHz of the resonator at the qubit maximum frequency near 4.45 GHz. From decay measurements of the output voltage of the resonator when the readout drive is turned off, we extract 1 / κ = 300 ns.

FIG. 3.

Top panel: Measurement of transmons bump bonded to the readout resonators on the TSV chip (schematic inset). We plot the T1 for two tunable transmons (circles and triangles) as well as several single junction fixed frequency qubits (stars). The dashed line is a fit of T1 vs ωq accounting for dielectric loss and Purcell relaxation. Bottom panel: Readout characterization of the flux-tunable qubit device, Qu1, showing SNR vs τm. The dashed black line is a fit to Eq. (1). Inset: Histograms of the I and Q voltage quadratures for τ m = 700 ns (orange cross for SNR = 5), with the qubit prepared in either the ground or excited state. The readout voltages are normalized by the width, σ, of the voltage distributions of the 104 trials.

FIG. 3.

Top panel: Measurement of transmons bump bonded to the readout resonators on the TSV chip (schematic inset). We plot the T1 for two tunable transmons (circles and triangles) as well as several single junction fixed frequency qubits (stars). The dashed line is a fit of T1 vs ωq accounting for dielectric loss and Purcell relaxation. Bottom panel: Readout characterization of the flux-tunable qubit device, Qu1, showing SNR vs τm. The dashed black line is a fit to Eq. (1). Inset: Histograms of the I and Q voltage quadratures for τ m = 700 ns (orange cross for SNR = 5), with the qubit prepared in either the ground or excited state. The readout voltages are normalized by the width, σ, of the voltage distributions of the 104 trials.

Close modal
To characterize the readout visibility of the TSV resonator, the qubit is prepared in either its ground or excited state and then measured. The preparation and measurement sequence is repeated 104 times for each state, and the resulting complex readout voltages are histogrammed (Fig. 3, bottom inset). The distributions are fit to Gaussians of width, σ, and the voltages are then normalized by σ. In this way, the signal-to-noise ratio (SNR) can be expressed as the separation of the normalized ground- and excited-state readout voltages. This approach is not a measure of the full state preparation and measurement fidelity, which would include pulse errors, qubit relaxation, and thermal population of excited states, but rather a method to characterize the readout separation fidelity of the qubit ground and excited states.18 We characterize the SNR as a function of measurement time, as shown in Fig. 3. In the dispersive regime and long measurement time limit, the SNR is given by
SNR ( τ m ) 2 ϵ κ 2 κ τ m | sin 2 ϕ | ,
(1)
where τm is the measurement time, ϵ is the readout drive amplitude, and ϕ is the phase shift of the resonator between the two qubit states.19,20 The separation fidelity can be expressed as F s = 1 erfc ( SNR / 2 ), which, for Qu1, exceeds 99.9% for t m 700 ns. In principle, even faster readout can be achieved with an increased resonator κ (decreased distance d to the feedline) as well as incorporating a TSV based compact filter to protect the qubit from relaxation due to the Purcell effect.18,21

At the current error rates in state-of-the-art qubits, a large-scale quantum computer based on superconducting qubits would likely need 105 to 108 qubits.22 While transmon qubits are one of the leading building blocks today, their physically large shunt capacitor makes scaling to thousands of qubits a daunting engineering challenge. Additionally, at large chip sizes, low-quality-factor cavity modes associated with the chip enclosure can couple to qubits, causing a degradation in performance.23 With these challenges in mind, several groups have sought to reduce qubit size via different means, including the use of interdigitated capacitors24 or using the high specific capacitance of the junction itself.25,26

To this end, we designed a set of transmon qubits with a Josephson junction connected to a TSV capacitor on a single chip, shown in the left inset of Fig. 1. The device consists of the 10 × 20 μm2 TSV capacitor with a 20 μm gap to ground for a total lateral device size of 40 × 50 μm2, an areal size reduction of a factor of 30 compared to the size of typical state-of-the-art transmon qubits.27 A series of these qubits were fabricated across a range of frequencies spanning 3.5–4.8 GHz, by changing the JJ area, i.e., the critical current and thereby the Josephson energy EJ. The total shunt capacitance of the qubits was nominally fixed at 85 fF, with the contribution from the TSV capacitor being approximately 93%–98% of the total capacitance. The T1 times for the qubits are shown in Fig. 4, where the error bars give a measure of the temporal variation over the course of 24 h. The TSV itself provides the majority of the total shunt capacitance, and therefore, the qubit T1 is a good indicator for the quality of the TSV capacitor. We can again use a constant Q diel vs ωq, to estimate a quality factor Q diel = ( 746 ± 41 ) × 10 3, which is comparable to what has been measured in other small footprint capacitor based transmon qubits.25,26 Previously measured values of dielectric loss in superconducting devices indicate that Q diel = ( 4 5 ) × 10 6 for bulk silicon substrates,28,29 suggesting that the lower Q diel measured in the TSV qubits comes from the interface between the TiN lining the TSV and the silicon substrate. The reduced values of Q diel for the TSV qubits compared to state-of-the-art planar designs are also consistent with an increased electric field strength of the qubit mode, thereby increasing coupling strength to two-level systems (TLS),30 which have been previously linked to a reduced T1 in qubits.17 A future study of different geometries, with varying amounts of TiN/silicon surface area, can help put a stricter quantitative bound on this loss.

FIG. 4.

T1 vs ωq measured for the TSV transmon qubits (schematic inset with a single TSV for the qubit capacitor). The black dashed line is a constant Q diel fit. The error bars indicate the distribution of T1's measured for each of the qubits over the span of 24 h. The inset schematic corresponds to a line slice through the optical image of the TSV qubit in Fig. 1. The majority of the capacitance comes from the electric field extending directly between the qubit TSV (red) and the TSV embedded in the ground plane (gray) 30 μm away. The red boxed “X” indicates the position of the single JJ directly connecting the qubit TSV to the ground plane.

FIG. 4.

T1 vs ωq measured for the TSV transmon qubits (schematic inset with a single TSV for the qubit capacitor). The black dashed line is a constant Q diel fit. The error bars indicate the distribution of T1's measured for each of the qubits over the span of 24 h. The inset schematic corresponds to a line slice through the optical image of the TSV qubit in Fig. 1. The majority of the capacitance comes from the electric field extending directly between the qubit TSV (red) and the TSV embedded in the ground plane (gray) 30 μm away. The red boxed “X” indicates the position of the single JJ directly connecting the qubit TSV to the ground plane.

Close modal

We have created superconducting qubits and lumped element readout resonators with integrated superconducting TSVs. The reduced lateral size of the readout resonators enables tiling of qubit arrays at a pitch limited by the size of the coplanar-capacitor-based transmon qubits. We additionally characterized the coherence of transmon qubits constructed with TSVs and find the quality comparable to what has been measured in other high-capacitance-density structures.25,26 Future extensions of TSV-based superconducting devices include the integration of TSVs as Purcell filters,21 which would feature a similar size reduction as the readout resonators as well as investigating the mechanisms which limit Q diel in the TSV process to improve the T1 in the TSV transmon qubits. TSVs should also prove advantageous for qubits made of novel materials, which may have increased microwave losses.31 While current flip chip technologies allow coupling for qubits between the surfaces of two chips,32,33 a fully 3D qubit that extends through a chip could be used to improve the feasibility of a 3D color code,34 which has the potential advantage of needing only a single round of local measurement for error correction35 compared to toric codes.36 

This material is based upon work supported by the U.S. Department of Energy, Office of Science, Office of Advanced Scientific Computing Research, High Performance Computing and Network Facilities (Rep-Quantum Testbeds), under Contract No. FWP #FP00008338, and by the Under Secretary of Defense for Research and Engineering under Air Force Contract No. FA8702-15-D-0001. Any opinions, findings, conclusions, or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the Department of Energy or the Under Secretary of Defense for Research and Engineering.

The authors have no conflicts to disclose.

Thomas Hazard: Data curation (equal); Formal analysis (equal); Investigation (equal); Visualization (equal); Writing – original draft (equal); Writing – review & editing (equal). Wayne Woods: Conceptualization (lead); Investigation (equal). Danna Rosenberg: Conceptualization (equal); Funding acquisition (equal); Investigation (supporting). Rabindra Das: Methodology (supporting); Resources (supporting). Cyrus Hirjibehedin: Formal analysis (supporting); Writing – review & editing (supporting). David K. Kim: Methodology (supporting); Resources (supporting). Jeffrey Knecht: Methodology (equal); Resources (equal). Justin Mallek: Methodology (supporting); Resources (supporting). Alexander James Melville: Methodology (supporting); Resources (supporting). Bethany M. Niedzielski: Methodology (supporting); Resources (supporting); Writing – review & editing (supporting). Kyle Serniak: Data curation (supporting); Formal analysis (supporting); Methodology (supporting); Writing – review & editing (supporting). Katrina Sliwa: Formal analysis (supporting); Validation (supporting); Writing – review & editing (supporting). Donna Yost: Methodology (supporting); Resources (supporting). Jonilyn L. Yoder: Funding acquisition (supporting); Project administration (supporting). William Oliver: Conceptualization (supporting); Funding acquisition (supporting); Project administration (supporting); Writing – review & editing (supporting). Mollie Schwartz: Conceptualization (supporting); Data curation (supporting); Funding acquisition (lead); Investigation (supporting); Project administration (supporting); Visualization (supporting); Writing – review & editing (supporting).

The data that support the findings of this study are available from the corresponding authors upon reasonable request.

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