Empowering 2D nanoelectronics via ferroelectricity

While the Si-based semiconductor industry has rapidly approached the post-Moore's law regime,¹ two-dimensional (2D) van der Waals (vdW) materials such as graphene, transition metal dichalcogenide (TMDC), and black phosphorus have emerged as a promising material platform for developing nanoelectronics that can transcend the fundamental performance limits of the complementary metal-oxide-semiconductor (CMOS) technology.^2,3 These layered materials possess atomic thickness, low surface defect states due to the lack of dangling bonds, and potentially high mobility. Their easily stackable nature makes them versatile building blocks for designing complex device architectures,⁴ either by combining different vdW materials or by interfacing the 2D layer with other functional materials with distinct crystal structures. Among them, devices harnessing ferroelectricity offer a promising route for realizing low-power, high-speed operation and reconfigurable functionalities.⁵ 

Ferroelectric order is manifested in noncentrosymmetric materials with a double-well free energy profile emerging below the Curie temperature (T_C), which results in a spontaneous polarization that can be switched by an external electric field higher than the coercive field E_c (Fig. 1). The polarization can be the order parameter for the paraelectric-ferroelectric phase transition (proper ferroelectrics)^6,7 or be coupled with another leading order parameter associated with certain non-ferroelectric lattice distortion or charge/spin ordering states (improper ferroelectrics).^8,9 There are also scenarios where different ferroic orders are induced by the same lattice distortion modes (hybrid improper ferroelectricity), which allow the realization of strongly coupled multiferroics.¹⁰ Historically, the development of ferroelectric-based nanoelectronics is strongly intertwined with the pursuit of new ferroelectric nano-materials and high quality ferroelectric thin films and heterostructures.^6,7 The polarization can be utilized directly as the state variable or be coupled with the electronic properties of a neighboring material, e.g., in a ferroelectric field-effect transistor (FeFET) structure,⁵ to represent the “on” and “off” states in memory and logic devices. As the data bit can be sustained even when the device is turned off, FeFET-based nonvolatile memory requires a lower operation power than the volatile memory technologies, e.g., dynamic random-access memory (RAM) and static RAM. The fact that the polarization can be voltage-controlled also makes it more energy efficient than other nonvolatile memories that require high current switching (e.g., magnetic RAM and spin-transfer torque RAM).¹¹ Leveraging the unique negative curvature in the free energy landscape, ferroelectrics have also been exploited to design steep slope FETs.¹² Ferroelectric-based 2D FETs, thus, have the potential to overcome the power scaling crisis faced by the semiconductor industry.¹ Controlling the ferroelectric polarization at the nanoscale can further lead to programmable junction devices for electronic and optoelectronic applications. As ferroelectrics exhibit piezoelectricity and pyroelectricity, the polarization control can also be achieved via temperature or strain, enabling versatile device operation schemes. The atomically thin nature of the 2D materials, on the other hand, offers unique opportunities for sensing the variation of the ferroelectric order parameter induced by external electrical, mechanical, and thermal stimuli, as well as serving as transparent, flexible electrodes for the ferroelectric layer. For 2D materials that lack inversion symmetry, the polar properties can also be coupled with those of the ferroelectrics, which can facilitate the design of unconventional mechanical¹³ and smart optical¹⁴ devices.

To date, extensive research has been carried out on ferroelectric/vdW heterostructures, leveraging their interfacial synergy to realize a wide range of electronic, optical, and energy applications,⁵ while new opportunities emerge upon the newly discovered vdW materials with intrinsic ferroelectric order.^15–17 This Perspective reviews the recent advancements in both materials systems, outlining the progress in developing a wide range of nanoelectronic applications, including high-performance nonvolatile memories, steep slope transistors, programmable junctions, charge and pressure sensors, photodiodes, and smart optical filters, as well as discussing the challenges and outlook of the field.

In ferroelectric/vdW heterostructures, an appealing interfacial synergy is the direct coupling between the ferroelectric polarization field and the doping level in the layered 2D material. The large spontaneous polarization, combined with the high dielectric constant of the ferroelectric, can render highly efficient doping change that conventional dielectrics cannot offer.^18–20 A wide range of ferroelectrics have been investigated as the gate of transistor devices, including complex oxides^19–39 such as the ABO₃ type perovskites Pb(Zr,Ti)O₃, BaTiO₃, and BiFeO₃, ferroelectric copolymer poly(vinylidene fluoride-co-trifluoroethylene) or P(VDF-TrFE),^40–61 and HfO₂-based binary oxides.^62–68 Interestingly, ferroelectric 2D semiconductors have been exploited as both gate^69–72 and channel materials in the^50,73,74 FET structure.

For FeFET devices, switching the polarization direction can lead to bi-stable conduction states in the channel, which forms the basis for constructing a nonvolatile memory. Early research has focused on the ferroelectric/graphene hybrid structures.⁵ As graphene has no bandgap, the on-off ratio of the channel resistance or current upon polarization switching is normally less than 10 in these devices.³³ A substantially enhanced on-off ratio has been achieved by working with semiconducting 2D channels, including MoS₂,^{27–29,41,45–48} MoTe₂,^37,59 WSe₂,^29,57 α-In₂Se₃,⁷³ and black phosphorus.^35,43 For example, a nonvolatile on-off ratio of about 10⁵ has been observed in MoS₂ top-gated by P(VDF-TrFE)⁴⁸ and black phosphorus with a PZT back-gate.³⁵ Yap et al. demonstrated nonvolatile switching in MoS₂ FETs with a 16 nm Al doped HfO₂ gate, showing that this device concept can be compatible with the CMOS technology.⁶² One of the major device challenges, however, is to control the interfacial charge dynamics due to adsorbates and defect-induced trapping,⁵ which can lead to fast relaxation of the memory state and even result in anti-hysteresis in devices with ferroelectric back-gate.^{21,22,25–28,31–33} Nonvolatile hysteresis has also been observed in Al₂O₃-gated MoS₂ FET by biasing an externally connected PZT capacitor, which avoids the direct interface between the ferroelectric and the 2D layer.⁷⁵ In addition to direct doping control, electrical field control has also been exploited to engineer the strain state in a PMN-PT gate, which, in turn, switches a neighboring MoTe₂ channel between the semimetallic and semiconducting phases, leading to a nonvolatile switching of channel conductance by a factor of 10⁷.³⁷ 

Besides the powerful doping capacity, a ferroelectric gate offers another distinct advantage over conventional dielectric: the polarization can be controlled at the nanoscale through domain patterning, leading to programmable functionalities in the 2D channel. Xiao et al. showed that poling a P(VDF-TrFE) top-gate into two adjacent domains with opposite out-of-plane polarization can lead to a homojunction in the MoS₂ channel underneath the ferroelectric domain wall (DW), so that the device can be reconfigured between the Ohmic conduction and Schottky-diode type rectifying I–V characteristic via domain writing [Figs. 2(a) and 2(b)].⁴⁵ The Schottky barrier originates from the Fermi level difference between the regions doped via the polarization up and down domains and can be changed continuously by varying the global back-gate voltage. A similar approach has been exploited to tune the work function difference between the contact electrode and the MoS₂ channel,⁴⁶ pointing to a promising contact engineering approach for TMDC devices.⁷⁶ Selective contact doping further leads to reversible polarity for the rectifying I–V [Figs. 2(c) and 2(d)]. Lv et al. used this approach to realize pn diodes and npn bipolar phototransistors in MoS₂, which exhibit a responsivity of ∼12 A W⁻¹ and a detectivity of over 10¹³ Jones at a fast response time of 20 μs.⁴⁷ Various lateral homojunctions have been demonstrated in MoTe₂ devices, facilitating the design of high performance photodetector/photovoltaic devices.^59–61 As the photoluminescence (PL) response of the 2D semiconductors can also be tuned by the polarization,^14,77,78 Wu et al. proposed a prototype nonvolatile memory that operates upon electrical writing-optical readout, eliminating the need for the source/drain electrodes.⁵⁹ The ferroelectric domain patterning can be utilized to define arbitrary conduction paths in the 2D channel.³⁶ It has been suggested that using periodically poled domain structures, it is possible to construct graphene-based terahertz plasmonic waveguides.⁷⁹ In addition to the electrical approach, it is also possible to write the domain by applying mechanical stress through the vdW layer via the flexoelectric effect.⁸⁰ 

For logic applications, ferroelectric-gated 2D structures have drawn increasing research interest for building steep slope FETs that can transcend the Boltzmann limit of 60 mV/dec subthreshold swing (SS) at room temperature.¹² The original proposal of the device concept capitalizes on the negative curvature in the free energy of the ferroelectric upon polarization switching (Fig. 1), known as the negative capacitance (NC) effect.⁸¹ To stabilize the device operation in the NC region, a widely adopted approach is to exploit a ferroelectric/dielectric stack gate,¹² while other mechanisms, such as polarization rotation,⁸² DW,³⁸ strain,⁸³ and interfacial charge trapping,⁸⁴ have also been proposed. Despite the intense debate on the origin, sub-60 mV/dec SS has been achieved in 2D FETs using various ferroelectrics as the gate, including PZT,³⁸ P(VDF-TrFE),^51,55,56 (Hf,Zr)O_x (HZO),^63–67 Al-doped HfO₂,⁶⁸ SrBi₂Nb₂O₉,³⁰ and CuInP₂S₆ (CIPS),⁷² while dielectrics such as HfO₂, Al₂O₃, and h-BN have been adopted for providing the capacitance matching. The dielectric layer modifies the net free energy landscape and quenches the hysteresis window. Working with the HZO/Al₂O₃ stack gate, Si et al. have achieved hysteresis-free switching with a minimum SS of 5.6 mV/dec and a maximum drain current of 510 μA/μm. While most of these devices are n-type, p-type NC-FETs have been demonstrated in WSe₂ channels.^67,72 Steep slope switching has also been observed in FET devices with a single ferroelectric layer,^38,55,56,72 which has been attributed to the intrinsic capacitance of the 2D-FET,⁷² the existence of an interfacial dielectric dead layer,⁵⁵ and the metastable polar region within the ferroelectric DW.³⁸ 

As polarization switching in ferroelectrics displays memristive characteristics, i.e., history-dependent switching, applications of ferroelectric/2D heterostructures for neuromorphic computing have garnered attention. The partial switching of ferroelectric polarization can lead to multi-level conductance states in the 2D channel for effective signal mapping in artificial neural networks during the in-memory data processing. Optically controlled synaptic switching has been reported in PZT-gated WS₂,³⁹ which can be used to develop neuromorphic optical sensing and memory. Graphene transistors gated by P(VDF-TrFE) have been electrically reconfigured as complementary potentiative/depressive synapse, which can be used for both level-based and spike-based computing.⁵⁸ This research effort demonstrates the application potential of the ferroelectric/2D heterostructures for image recognition, machine learning, and energy-efficient logic-in-memory computing.

In addition to memory and logic applications, ferroelectric polarization-induced doping has led to the development of a range of high-performance nanoelectronic and optoelectronic devices, such as broadband photodetectors, ferroelectric tunnel junctions (FTJs), and various sensing devices. It is proved to be effective in enhancing sensitivity and suppressing zero-bias dark current in vdW-based photodetectors for visible to infrared wavelengths.^24,48–50 For example, Wang et al. showed that the remnant polarization of P(VDF-TrFE) can tune the bandgap of few-layer MoS₂, broadening the sensing spectrum to the wavelength range of 0.85–1.55 μm,⁴⁸ while a spectrum of 0.6–1.5 μm has been demonstrated for MoTe₂.⁴⁹ Graphene⁸⁵ and MoS₂⁸⁶ have been interfaced with ultrathin BaTiO₃ to build the FTJs. A voltage-controlled tunnel resistance switching ratio of 10⁴ has been reported in the MoS₂-based FTJ,⁸⁶ which is 50-fold higher than similar FTJs with metal electrodes. Inserting an ultrathin BiFeO₃ tunnel barrier to the drain contact in a vertical FET structure has led to a current switching ratio of 7 × 10⁷ in the transfer characteristic, with SS = 45 mV/dec achieved.⁸⁷ 

As the ferroelectrics also exhibit piezoelectric and pyroelectric effects, the doping-induced variation in the 2D electronic properties can be utilized to detect the polarization change induced by the electric field, stress, or temperature, making the hybrid structure well suited for developing various sensor applications. Besides charge sensors,^22,26 graphene⁴⁴ and MoS₂⁴² FeFETs have also been utilized to detect pressure-induced polarization changes in the ferroelectric gate for touch screen applications. It has been shown that standalone MoS₂ FETs can detect the static and dynamic variation of piezopotential in a series connected P(VDF-TrFE) capacitor.⁸⁸ The sensitive optothermal response of the ferroelectric/2D hybrid structures⁸⁹ makes them viable for constructing infrared bolometers, with a ultrahigh temperature coefficient of resistance realized in graphene on LiNbO₃.⁹⁰ Taking advantages of the atomic layer thickness and high mechanical strength of the vdW materials, the ferroelectric/2D structures are promising building blocks for flexible electronics,^23,52–54 facilitating their implementation in wearable applications. In addition, 2D materials have been used as high-quality transparent conductors for ferroelectric-based photovoltaic devices.^91,92

The aforementioned electronic and optoelectronic devices center on the modulation of the electronic transport in the 2D layer. Noncentrosymmetric vdW materials, on the other hand, offer new research opportunities resulting from the direct polar coupling with the ferroelectrics. For example, monolayer MoS₂ exhibits in-plane piezoelectricity⁹³ and strong nonlinear optical responses⁹⁴ due to the lack of the inversion center. When interfaced with PbTiO₃, it is possible to induce a virtual out-of-plane piezoelectric response in odd-layer MoS₂, which is substantially higher than the ferroelectric substrate.¹³ Polar coupling can be further combined with nanoscale domain patterning to design the nonlinear optical response. By transferring monolayer MoS₂ on the pre-patterned domain structures in epitaxial (001) PZT thin films, Li et al. have shown that the second harmonic generation (SHG) signal at the heterointerface can be either significantly enhanced or almost entirely quenched at the DWs depending on the alignment between the polar axis of MoS₂ and the chiral rotation of the surface dipole at the DWs (Fig. 3).¹⁴ These emerging functionalities pave the way for designing polarization-controlled actuators and smart optical filters that can be programmed and reconfigured at the nanoscale.

For the ferroelectric/2D vdW heterostructures, the fundamental limit for vertical size scaling is imposed by the ferroelectric layer. In perovskite oxides, ferroelectricity is often suppressed or even disappears when the film is below a critical thickness due to the depolarization field, known as the finite size effect.⁶ For the ferroelectric polymer P(VDF-TrFE), while layer-by-layer deposition with precise thickness control can be achieved via the Langmuir–Blodgett technique,⁷ films thinner than 10 nm would congregate into isolated nanomesa structures.⁹⁵ In contrast, 2D vdW ferroelectrics are not bound to such limitations. Layered vdW ferroelectrics have emerged in recent years as a new class of ferroelectric materials, which have many intriguing traits and high application potential in nanoelectronics and optoelectronics.^96,97 Many vdW materials can retain ferroelectricity even down to 1 unit-cell thickness, benefiting from the absence of surface reconstructions, compensation of the in-plane depolarization between odd and even layers, and/or effective polarization screening provided by intrinsic charge carriers.^15,98,99 As vdW ferroelectrics can be grown or transferred on any substrate, they can be seamlessly integrated with other layered materials into ferroelectric heterostructures and superlattices, offering high fabrication flexibility. Compared to their oxide counterparts, the vdW ferroelectrics also have many distinct properties, such as the tunable bandgap, negative piezoelectric constant, and high mechanical flexibility,^100–103 which can enable tunable bandwidth photodetectors, electromechanical devices, and wearable applications.

The 2D ferroelectric family encompasses a broad spectrum of electronic behaviors, ranging from insulators, semiconductors, to semimetals.^15–17 Table I summarizes the key properties of five representative 2D ferroelectrics. Here, CIPS and WTe₂ have out-of-plane polarization,^16,104 SnTe and SnS possess in-plane polarization, while α-In₂Se₃ shows inter-correlated in-plane and out-of-plane polarization.¹⁰⁵ For those with in-plane polarization, such as SnTe, SnS, and α-In₂Se₃, robust ferroelectricity is sustained down to the monolayer limit. The Curie temperature for most of these vdW ferroelectrics is above room temperature, which is highly desirable for practical applications.

Among these five vdW ferroelectrics, CIPS has the largest bandgap (2.9 eV), which is a critical factor for choosing a gate dielectric. CIPS has a layered sulfur framework, with the octahedral voids filled by Cu, In, and P–P pairs.⁹⁸ Both Cu and In cations can displace vertically inside the S octahedral, leading to out-of-plane polarization.¹⁰⁷ The polarization switching in CIPS is coupled to the ionic movement of the copper atoms, which leads to a long switching time constant (∼100 μs).⁵⁹ The large displacive freedom of the Cu ions combined with the softness of the vdW interaction leads to the large deformation susceptibility of the lattice under the electric field, which results in a giant negative piezoelectric effect in CIPS.^101,102 Density functional theory calculations reveal that CIPS has an unusual uniaxial quadruple potential well, which is enabled by the second stable Cu position in the vdW gap.¹⁰² The coexistence of four polarization states was further verified by PFM measurements.¹⁰² In₂Se₃ is a semiconductor with a moderate bandgap (1.36 eV). Each In₂Se₃ quintuple layer consists of five atomic layers in the sequence of Se–In–Se–In–Se.¹¹⁰ The central Se layer is tetrahedrally coordinated by the two neighboring In layers, which effectively breaks the centrosymmetry and induces both in-plane and out-of-plane spontaneous polarization.¹¹⁰ The shifting of the Se atoms in the central layer by a vertical or lateral electric field will cause the reversal of the out-of-plane and in-plane polarization simultaneously.¹⁵ 2D ferroelectricity was recently discovered in semi-metallic WTe₂.¹⁷ The metallic ferroelectrics are rare because the mobile charge carriers in metal can effectively screen the electrostatic force between ions and the external electric field. However, if the ferroelectric metal is thin enough, ferroelectric polarization can, in principle, be switched. Fei et al. have demonstrated ferroelectric switching in 1T′ WTe₂ by applying an electric field between the top and bottom electrodes, which results in bi-stable conductance states in the channel associated with the out-of-plane polarization in the P_up and P_down states.¹⁷ 

Since the initial discovery, extensive research has been carried out on developing vdW ferroelectric-based electronic and photonic devices for their excellent properties and intrinsic scaling advantages. Notable examples include nonvolatile memories,^{50,69–71,73} switchable rectifiers,^74,108 NC-FETs,⁷² electrocaloric devices,¹⁰⁷ and piezoelectric devices.¹⁰³ Wan et al. assembled α-In₂Se₃/graphene heterostructures and constructed ferroelectric diodes, in which the Schottky barrier between α-In₂Se₃ and graphene can be modulated by reversing the polarization of α-In₂Se₃, leading to a switchable rectification polarity.¹⁰⁸ Unlike the traditional FeFET exploiting a ferroelectric gate insulator, Si et al. realized a large memory window and a high on/off ratio of over 10⁸ at room temperature in HfO₂-gated α-In₂Se₃ FETs, where the hysteresis behavior originates from polarization reversal in the α-In₂Se₃ channel.⁷³ Wang et al. achieved a minimum subthreshold swing of 28 mV/dec in CIPS-gated MoS₂ NC-FETs⁷² and showed that the leakage current and hysteresis can be effectively suppressed by inserting an h-BN layer between CIPS and MoS₂. Gate tunable memristive switching has also been observed in α-In₂Se₃ with a SiO₂ back-gate, making it a viable candidate for developing neuromorphic computing.⁷¹ While the study of 2D vdW ferroelectric materials is still in an early stage, these results already showcase their great application potential for low-power logic and memory applications.

In the above discussion, we have provided a brief review of the recent advancement in ferroelectric/vdW heterostructures and vdW ferroelectrics. The interplay between ferroelectricity and van der Waals bonding enables the innovation and development of a wide variety of nanoscale electronic, photonic, and sensing devices, including low-power memories, steep-slope logic transistors, high-performance photodetectors/photovoltaic devices, programmable junctions, and polarization-controlled actuators and optical filters. There are, however, materials challenges that need to be tackled before these device concepts can be commercialized.

For ferroelectric/2D heterostructures, a major challenge is to control the extrinsic charge dynamics at the heterointerface, which significantly compromise the field effect.⁵ Another key issue is the large-scale synthesis of vdW materials. Although wafer-scale synthesis of TMDCs, such as MoS₂ and WS₂, has been demonstrated,¹¹¹ processes for fabricating high-quality vdW ferroelectrics on a large scale are yet to be developed. The field also offers exciting new research opportunities. For example, in addition to the polarization-induced electrostatic doping, the piezoelectric and pyroelectric effect in the ferroelectric materials can be further exploited in tuning the 2D materials for information processing and sensor applications. Novel mechanical and optical devices can be envisioned by leveraging the direct polar coupling between ferroelectric oxides and van der Waals materials.

Regarding the 2D vdW ferroelectrics, the relative low bandgap can lead to undesired operation power consumption when they are employed as the gate material. As the ferroelectric 2D with an out-of-plane polar axis is still subject to the finite size effect, soft 2D ferroelectrics with an in-plane polar axis, i.e., easily polarizable along the film normal direction, can be highly desirable for electronic and mechanical applications. One research direction of strong interest is, thus, to discover new vdW ferroelectric materials with a larger bandgap or desired dielectric and optical properties, e.g., through data mining. Although over one thousand 2D materials have been predicted theoretically, only a handful of them have been identified as ferroelectric materials. On the other hand, experimental confirmation of ferroelectricity in the material candidates is also important. Currently, many predicted ferroelectric materials, such as III–VI chalcogenides,¹¹⁰ group IV monochalcogenides,^98,112,113 and group III–V binary monolayers,¹¹⁴ still remain to be verified experimentally.

For both material schemes, 3D monolithic integration of these ferroelectric electronic/optoelectronic devices with silicon-based CMOS technology will bring logic, memory, and sensors in close proximity,^115–117 paving the way for developing the next generation computing and sensing systems with high density, high speed, low power consumption, and disruptive operation principles.

D.L. and X.H. would like to acknowledge the support of the U.S. Department of Energy (DOE), Office of Science, Basic Energy Sciences (BES), under Award No. DE-SC0016153. H.R., K.X, and W.Z would like to acknowledge the support of the National Science Foundation (NSF) under Grant No. ECCS 16-53241 CAR and of the Office of Naval Research (ONR) under Grant No. NAVY N00014-17-1-2973. H.R would like to acknowledge the support of the Kwanjeong Educational Foundation.