We describe a method to control the insulator–metal transition at the LaAlO3/SrTiO3 interface using ultra-low-voltage electron beam lithography. Compared to previous reports that utilize conductive atomic force microscope (c-AFM) lithography, this approach can provide comparable resolution (∼10 nm) at write speeds (10 mm/s) that are up to 10 000× faster than c-AFM. The writing technique is nondestructive, and the conductive state is reversible via prolonged exposure to air. Transport properties of representative devices are measured at milli-Kelvin temperatures, where superconducting behavior is observed. We also demonstrate the ability to create conducting devices on graphene/LaAlO3/SrTiO3 heterostructures. The underlying mechanism is believed to be closely related to the same mechanism regulating c-AFM-based methods.
The complex oxide heterostructure LaAlO3/SrTiO3 (LAO/STO) exhibits a wide range of physical phenomena that are mostly traced back to the rich properties of the STO system. When a thin layer (typically 4 unit cells) of LAO is grown on TiO2-terminated STO, a two-dimensional electron gas spontaneously forms at the interface.1 This system exhibits, under various conditions, superconductivity,2,3 magnetism,4 gate-tunable spin–orbit interactions,5,6 and a tunable metal–insulator transition.7 The metal–insulator transition can be controlled by light,8,9 ion beam irradiation,10 applied back gate voltages,7 and conductive atomic force microscope (c-AFM) lithography.11,12
C-AFM lithography enables extreme nanoscale control of the metal–insulator transition in LAO/STO. The technique is believed to work by mediating a “water cycle,”13 selectively removing OH− from adsorbed water on the LAO surface, and allowing the remaining H+ ions to modulation dope the LAO/STO interface. Applying a positive voltage to the c-AFM tip locally switches the LAO/STO interface to a conductive state, while negative voltages restore the insulating phase. The c-AFM technique has been widely used in exploring complex oxide systems, and many devices have been created at the 2DEG interface such as ballistic nanowires,14 electron waveguides,14 single-electron transistors,15 and novel forms of quantum matter.16,17
While capable of creating a wide range of nanoscale patterns, c-AFM lithography has practical limitations imposed by small scan ranges (∼100 μm) and slow writing speed (∼1 μm/s) of typical AFMs. Devices naturally decay in air on a time scale of hours,11,12 which also limits the complexity of devices that can be written.
To address these limitations and to enable more complex devices to be created, alternate approaches have been pursued, including parallel writing with AFM tip arrays.18 Electron-beam lithographic (EBL) patterning enables larger devices with more complex layouts to be created. EBL is typically used with a resist such as PMMA,19 which is generally used with an additive or subtractive lithography step that is irreversible. High-energy electron beams are known to cause damage in highly insulating oxide materials, and the electron penetration for typical (>10 keV) electron acceleration energies can cause damage to the oxide material.20,21 Moreover, the etching of material itself causes uncontrolled and, in many cases, undesirable behavior in the underlying material, which is sensitive to structural distortions.
In this Letter, we demonstrate an approach to reversible control of the metal–insulator transition in LAO/STO heterostructures, using an ultra-low voltage electron-beam lithography (ULV-EBL) technique. This approach works without e-beam resist and enables rapid, large-scale switching of the conductivity of the LAO/STO interface, with spatial precision comparable to c-AFM lithography, with no discernible changes in the topography of the LAO/STO structure. In addition to being significantly faster, the ULV-EBL technique enables patterning through the most widely investigated van der Waals (vdW) material, monolayer graphene, which portends the ability to combine LAO/STO-based nanoelectronics with a wide range of 2D layered materials.
A thin layer (3.4 unit cells) of LAO is grown on top of the TiO2-terminated STO (001) substrate by pulsed laser deposition (PLD). The LAO thickness is determined by reflection high-energy electron diffraction (RHEED) oscillations. The LAO thickness is optimized for c-AFM lithography, so that the interface is insulating but close to the critical thickness where the insulator-to-metal transition is known to occur.7 Additional details of the growth technique are provided elsewhere.7 The LAO/STO samples are initially insulating with ∼MΩ resistance at the interface. Ti/Au (5 nm Ti and 20 nm Au) is deposited to the sample using standard photolithography to form “canvases” with low-resistance electrical contacts to the LAO/STO interface, as illustrated in Fig. 1(a). The canvas is the area defined and surrounded by the electrodes within a clear area of μm2. The central canvas is designated for electron-beam exposure.
(a) Illustration of ULV-SEM on LAO/STO. (b) Illustration of 2DEG nanowire geometry. The wire is composed of dwell dots of the electron beam. (c) Conductance coming from connecting two interfacial electrodes by writing a nanowire with a 100 V e-beam. (d) AFM erases the ULV-EBL created nanowire with a negatively biased AFM tip. The sample is transferred to an AFM chamber after EBL writing. The transfer took 1 h 43 min in the ambient condition. Conductance drop results from cutting the existing nanowire.
(a) Illustration of ULV-SEM on LAO/STO. (b) Illustration of 2DEG nanowire geometry. The wire is composed of dwell dots of the electron beam. (c) Conductance coming from connecting two interfacial electrodes by writing a nanowire with a 100 V e-beam. (d) AFM erases the ULV-EBL created nanowire with a negatively biased AFM tip. The sample is transferred to an AFM chamber after EBL writing. The transfer took 1 h 43 min in the ambient condition. Conductance drop results from cutting the existing nanowire.
A commercial electron beam lithography instrument is used (Raith e-LiNE) with the electron acceleration reduced to 100 V. Unwanted electron-beam exposure to the canvas surface is avoided, and markers patterned on the edge of the sample are used for focus and alignment. The electron beam current is measured to be 195 pA, and the write field is set to be . The sample chamber vacuum is maintained at 1 × 10−6 mbar during ULV-EBL writing and all electrical measurements, unless noted. Because LAO/STO samples are often light-sensitive, optical illumination inside the chamber, which is often used to adjust the sample stage position and e-beam gun position, is turned off after the initial setup and the sample is kept in the dark during ULV-EBL writing. The conductance of the 2DEG devices is monitored in situ during the ULV-EBL writing process. After device patterning is complete, the sample is transferred to a dilution refrigerator, enabling electrical transport measurements to be performed over a temperature range of 50 mK to 300 K in magnetic fields up to 9 T. c-AFM lithography is performed using an Asylum Research MFP-3D AFM in contact mode.
To demonstrate the ULV-EBL writing and c-AFM erasing steps, a strip-like pattern of dots (total width is exposed between two electrodes using ULV-EBL, illustrated in Figs. 1(a) and 1(b). We define average electron dose as , where is the beam current, is the dwell time, and are the step size and line spacing, respectively. The dose used to expose the channel is . As shown in Fig. 1(b), the nanowire is composed of dwell points of the electron beam with a spacing of 10 nm. The writing speed is calculated to be 10 mm/s. Figure 1(c) shows the conductance jump, with an on/off ratio of 153.7 that is dominated by the “off” value, which is more a function of the sample than the ULV-EBL. After writing, we transferred the sample into an AFM, which took 1 h 43 min to accomplish. During the transfer, the sample was kept in a gel box under ambient atmospheric conditions. The conductance was measured and subsequently “erased” using c-AFM lithography. Figure 1(d) shows the final “cut” from the negatively biased AFM tip in which the conducting channel is rendered insulating. The ability of c-AFM lithography to locally erase the nanostructure demonstrates that the writing process is reversible and suggests that the mechanism for controlling the conductivity is similar to c-AFM-based methods.
To understand the resolution of the writing process, nanowires with varying gaps of sizes are written using ULV-EBL [illustrated in Fig. 2(a)] separated by to avoid interference. By monitoring the conductance change with respect to the gap sizes, we observe significant changes in conductance, , which appear when the gap size is in the range of 5–20 nm [Fig. 2(c)], indicating that the gap starts to be “covered” by the writing resolution in this range. Thus, we conclude that the resolution of the writing process is approximately 10 nm. As with c-AFM lithography, the actual resolution depends on the details of the writing parameters and possibly on variations between LAO/STO samples as well.
(a) Schematic diagram of writing nanowires with varying gaps of width in the middle. (b) Close-up illustrating the array of nanowires, gap separation , and wire separation . (c) Measured conductance changes vs gap size . A transition occurs between nm and 20 nm. The red points label the insulating phase, and green points are the conducting phase. The purple point ( represents an experiment where there is no gap.
(a) Schematic diagram of writing nanowires with varying gaps of width in the middle. (b) Close-up illustrating the array of nanowires, gap separation , and wire separation . (c) Measured conductance changes vs gap size . A transition occurs between nm and 20 nm. The red points label the insulating phase, and green points are the conducting phase. The purple point ( represents an experiment where there is no gap.
While room-temperature transport characteristics are themselves important, the ability of devices to remain conductive at low temperatures is critical for quantum device applications. Here, we describe low-temperature transport properties of devices created by ULV-EBL. For these measurements, a four-terminal device is created [Fig. 3(a)] and transport measurements are performed in a dilution refrigerator (base temperature ). The conducting channel survives to [Fig. 3(b)]. The nanowire () shows evidence of superconducting behavior starting at (Fig. S2), consistent with other reports of superconductivity at the LAO/STO interface2,3 and in nanowire devices.22 Figure 3(d) shows an intensity map of differential conductance vs bias current and magnetic field , showing values for critical current extracted from Fig. 3(c) and upper critical field . The asymmetry observed between positive and negative current is a known effect coming from the gating as semiconductors.
(a) Schematic diagram of the device. (b) Cooldown curve of with respect to . (c) IV measurement at showing a superconducting phase at . (d) plotted as a function of and . .
(a) Schematic diagram of the device. (b) Cooldown curve of with respect to . (c) IV measurement at showing a superconducting phase at . (d) plotted as a function of and . .
The integration of LAO/STO nanostructures with two-dimensional layered materials represents an exciting frontier application of this technique. Previously, it has been shown that c-AFM lithography can control the LAO/STO metal–insulator transition through a monolayer of adsorbed graphene.23 We tested whether it is possible to achieve the same type of control with graphene/LAO/STO heterostructures using ULV-EBL. Graphene grown by chemical vapor deposition is transferred onto LAO/STO using a method that is described elsewhere,24 and patterned into a rectangular shape. Graphene is electrically isolated from the LAO/STO interface electrodes, as illustrated in Fig. 4(a) and shown in the AFM scan in Fig. 4(b). A close-up AFM scan [Fig. 4(c)] shows that graphene is conformal on the STO surface, with clear evidence of the 4 terraces of the STO underneath. A conductive channel with a width of is exposed, causing a substantial conductance jump [Fig. 4(d)]. During the ULV-EBL writing, the total conductance increases and then abruptly begins to decay after the electron beam is turned off, yielding a peak feature at t = 1200 s. Similar behavior is observed with c-AFM lithography of 2D regions.25 Several tests were conducted consecutively to investigate the channel's conductance as a function of both electron dose and nanowire width. For this experiment, we choose a dose of . Also, we define as the dimensionless normalized dose factor. The real area dose () of the e-beam is then varied while writing a series of wires connected to the leads, the spacing of each experiment is 5 to minimize interactions. We observe that increases with the dose of the electron with the wire [as shown in Fig. 4(e)]. The resulting conductance change vs the normalized dose factor for wires with different widths is shown in Fig. 4(f).
(a) Schematic diagram of the device on graphene/LAO/STO. (b) AFM profile of graphene on LAO/STO. The scale bar at the bottom right of the image corresponds to 10 μm. (c) AFM image of graphene on LAO/STO. Terraces from the STO substrate are visible through graphene. The scale bar at the bottom right of the scanning image corresponds to 500 nm. (d) Conductance change when writing a 1-μm-wide strip connecting two interface electrodes. (e) Conductance change while writing a series of 5-nm-wide wires with increasing dose factors. (f) Conductance change with respect to normalized dimensionless dose factor for different widths of wires.
(a) Schematic diagram of the device on graphene/LAO/STO. (b) AFM profile of graphene on LAO/STO. The scale bar at the bottom right of the image corresponds to 10 μm. (c) AFM image of graphene on LAO/STO. Terraces from the STO substrate are visible through graphene. The scale bar at the bottom right of the scanning image corresponds to 500 nm. (d) Conductance change when writing a 1-μm-wide strip connecting two interface electrodes. (e) Conductance change while writing a series of 5-nm-wide wires with increasing dose factors. (f) Conductance change with respect to normalized dimensionless dose factor for different widths of wires.
We now discuss possible mechanisms for reversible doping of the LAO/STO interface via ULV-EBL. We first consider mechanisms that are already known to result in doping of the STO layer. Oxygen vacancies, either in the STO or LAO layer,11 can shift the STO conduction band with respect to the Fermi energy. We find from CASINO Monte Carlo simulations (see the supplementary material) that electrons are stopped before reaching the STO layer, most likely because of the low energy of the electron beam, and therefore, direct e-beam-induced creation of oxygen vacancies in STO can mostly be ruled out, although it is possible that they are created in the LAO layer. Electron-stimulated desorption of ions, specifically those which are believed to be desorbed using c-AFM lithography to selectively remove OH− species,13 is certainly a candidate mechanism.26 The LAO surface is known to be covered by at least one monolayer of water, which cannot be removed even under high vacuum conditions.27 In the case of graphene/LAO/STO, a few different mechanisms are possible. Electron beam irradiation of boron nitride/graphene heterostructures was used to dope the graphene layer reversibly, depending on the voltage applied across a SiO2 barrier.28 An analogous mechanism may lead to reversible gating of the graphene/LAO/STO interface. Previous experiments using c-AFM lithography with graphene/LAO/STO are able to reversibly control the metal–insulator transition.23,24,29 With c-AFM lithography, it was assumed that protons were penetrating the graphene layer. The buried interfacial chemistry that leads to the conductance change is not well understood; however, it is reversible and is likely to be mediated by interfacial water layers and/or oxygen vacancies, which are understood to provide a similar type of doping of the LAO/STO interface.26 Future investigations are required to pinpoint the precise doping mechanism.
The ability to rapidly create large-scale complex nanostructures at oxide interface (and through 2D) layers open many avenues of exploration. A systematic comparison with “standard” devices created using c-AFM lithography (e.g., electron waveguides14 and single-electron transistors15,16) should be performed since their behavior depends sensitively on the nanoscale electrostatic confinement provided by the lithography methods. Important questions about the writing mechanism, homogeneity of conductive regions, carrier mobility in the 1D–2D crossover, and other properties remain to be explored, as well as the ability to extend this approach to heterostructures between LAO/STO and vdW materials other than single-layer graphene.
In summary, a technique for reversible ULV-EBL-based patterning of the metal–insulator transition in LAO/STO and graphene/LAO/STO heterostructures has been demonstrated. The technique has sub-10-nm resolution and is capable of creating nanostructures that exhibit interesting behavior at low temperatures, including superconductivity. The fast writing speed and scalability of the ULV-EBL approach make it well-suited to the development of much more complex families of quantum devices than before, including 2D simulation, arrays of THz and optical photodetectors, and graphene-based nanodevices.
See the supplementary material for the details of Monte Carlo simulation and the cooldown curve below 500 mK.
The work at the University of Pittsburgh was supported by ONR Grant No. N00014-20-1-2481 and by Vannevar Bush Faculty Fellowship ONR Grant No. N00014-15-2847. The work at the University of Wisconsin-Madison (synthesis characterization of epitaxial thin film heterostructures) was supported by the U.S. Department of Energy (DOE), Office of Science, Office of Basic Energy Science (BES), under Award No. DE-FG02-06ER46327.
DATA AVAILABILITY
The data that support the findings of this study are available from the corresponding author upon reasonable request.