Vanadium gate-controlled Josephson half-wave nanorectifier

In the last few years, the possibility to suppress the critical current in conventional Bardeen–Cooper–Schrieffer (BCS) superconducting wires,¹ Dayem bridge (DB) Josephson junctions (JJs),^2–5 and superconductor-normal metal–superconductor weak-links⁶ via electrostatic gating was demonstrated.⁷ Such a technique is at the basis of a class of innovative all-metallic superconducting Josephson transistors, where a gate electrode is used to modulate down to full suppression the critical current of a superconducting channel, in analogy to what occurs for the current in standard gated semiconductor transistors. Furthermore, the impact of the electrostatic gating on the macroscopic phase and on the phase slip dynamics was proved in superconducting quantum interference devices (SQUIDs)⁸ and in gated titanium DBs, respectively.⁹ So far, the microscopic origin of the gating effect in metallic superconductors is unclear, and the debate in the search of a satisfactory explanation for the aforementioned phenomenology has just started.^4,10,11 Electrostatic-field-driven surface-orbital polarization was proposed as the knob to control both the amplitude and the phase of gated superconductors.^4,11 Furthermore, it was conjectured about the role of a tiny field-emission gate-superconductor current.^12,13 Yet, several technological implementations based on gated superconducting transistors for both classical and quantum computation architectures were proposed⁷ until now and promise new paradigms to realize innovative superconducting circuits. These are expected to benefit from operation frequencies close to those typical of rapid single flux quantum devices (up to $∼750$ GHz),¹⁴ but in a voltage-driven fashion, which would provide a direct and convenient interface with complementary metal-oxide technology (CMOS).

Here, we demonstrate a vanadium (V) Josephson half-wave rectifier based on a scheme recently proposed,⁵ which exploits the strong non-linearity of the resistance (R) of a gated superconducting nanotransistor vs gate voltage (V_G). Such a device might form the rectifying core of a photon sensor operating at high frequencies, relevant, for instance, for cosmological applications¹⁵ or could be exploited as a comparator¹⁶ to be used in all-superconducting digital electronic circuits.⁷ The potentially high operation frequency, the ease of fabrication, and the simple geometry of our nanodevices make them attractive as effective alternatives to conventional all-semiconductor¹⁷ and semiconductor–superconductor hybrid^18–23 field-effect-transistor-based technologies.^24–28 Below, we focus on the manipulation of the dissipative response of the V-based Josephson weak-link via the application of a voltage to a gate capacitively coupled to the junction and show its time-resolved response to periodic square-wave and sinusoidal signals applied to the gate, thereby leading to electric rectification.

Our device consists of a planar 60-nm-tick, 160-nm-long, 90-nm-wide V Dayem bridge JJ with a 70-nm-apart, 120-nm-wide side-gate aligned to the constriction. The device fabrication was performed on a silicon oxide substrate by single-step electron beam lithography followed by vanadium deposition performed at a rate of 0.36 nm/s in an ultra-high vacuum electron-beam evaporator with a base pressure of $∼10−11$ Torr.^29–35 Figure 1(a) shows the false color scanning electron micrograph of a representative V JJ transistor along with the 4-wire biasing scheme used for the low-temperature current vs voltage (I–V) characterization of the devices performed in a filtered cryogen-free ³He–⁴He dilution refrigerator.

For temperatures below $∼3.5$ K, the V JJ is superconducting and exhibits, at 2 K, a critical current I_C of $∼1.42$ mA, a retrapping current $IR∼380 μ$A, and a normal-state resistance R_N of around $∼110 Ω$⁠. The forward and backward current I vs V characteristics for temperatures T ranging from 2.0 K to 3.8 K are shown in Fig. 1(b), where the full evolution of I_C as a function of T is highlighted by the gray area. The hysteretic behavior of the curves stems from quasiparticle over-heating when the junction switches from the superconducting to the normal state.^36,37 Moreover, the additional features present on the I–V characteristics at higher current are likely to be related to the switching of the DB banks to the normal state. The decay of both I_C and I_R with the temperature is shown in Fig. 1(c), where the black dashed line represents a fit of the I_C vs T characteristic performed with Bardeen's equation: $IC(T)=IC0[1−(TTC)2]32$⁠, where $IC0$ is the zero-temperature critical current and T_C is the DB critical temperature. The fitting procedure yielded $IC0=(2.2±0.1)$ mA and $TCfit=(3.62±0.07)$ K. The latter value is in agreement with the experimental critical temperature determined from the 4-wire lock-in measurement of the junction resistance vs bath temperature T, as shown in the inset of Fig. 1(b).

The preliminary characterization of the gating effect on I_C and R was carried out by acquiring the forward and backward I–V characteristics of a representative vanadium DB as a function of the voltage applied to the gate electrode, V_G. Figure 2(a) displays the $IC(VG)$ characteristics extracted from I–V acquired at several bath temperatures. The suppression of I_C occurs for both positive and negative values of V_G (⁠$VG→−VG$⁠), and the gating effect persists up to $∼3.3$ K, i. e., $∼0.9TC$⁠. We note that the sharper suppression of I_C observed for positive values of V_G seems to be in contrast to a possible contribution to the critical current suppression driven by cold field-emission of electrons. Indeed, electron extraction from the gate (occurring at negative gate bias values) is expected to be more effective than that from the DB (occurring at positive gate bias values) owing to the substantial asymmetry of the device geometry.¹³ 

Let us now describe further the transport properties of the transistor by focusing on the behavior of the device resistance R under the action of the electric field. The steep modulation of the critical current yields, at constant current bias I_B, an analogous modulation of the resistance of the device. Figure 2(b) displays the evolution of R as a function of gate voltage V_G for several values of bias current I_B, which was always set below the retrapping current so that no hysteretic behavior was expected from the device. We note that R remains almost equal to 0 for V_G values such that $IC(VG)>IB$⁠. Then, for higher gate voltage, the resistance jumps to finite values due to the gate-driven superconducting-to-normal state transition of the device. Finally, R increases with V_G, probably owing to the enlargement of the normal-state region within the junction.² In particular, for $IB>30$ μA, R exhibits a linear dependence on V_G. Moreover, the steepness of the resistance jump also depends on I_B, as customarily described by the figure of merit of the resistance derivative with respect to the gate voltage (⁠$dR/dVG$⁠), which is shown in Fig. 2(c). The amplitude of the differential resistance peaks, corresponding to the transition to the normal state, increases with I_B reaching the maximum value of $∼30Ω/$ V at I_B = 150 μA. Furthermore, the peak center shifts toward lower V_G values as the bias current is increased.

The strong non-linearity typical of the $R(VG)$ characteristics, provided by the transition to the dissipative regime, could be conveniently exploited to implement a superconducting half-wave rectifier converting an AC signal applied to the gate into a DC one across the DB. Such a mechanism has been recently proposed for Nb gate-controlled transistors,⁵ where the rectification properties of a DB device have been analyzed by a standard lock-in technique, which does not provide information neither on the time-resolved behavior of the devices nor on the shape of the output signal. These features could allow us to realize, for instance, a radiation detector in which the AC electric field collected by an antenna coupled to the gate electrode would be rectified, thereby leading to an amplified non-zero average signal. The gain of such a device can be defined as the ratio $g=Vout/Vin$⁠, where V_in and V_out are the peak-to-peak amplitudes of the signal applied to the gate and the voltage drop across the DB, respectively. The quantity g can be calculated through the relation $g=R(VG)IBτ/σ$⁠, where $R(VG)IB=Vout$ is the product of the gate-dependent DB resistance R and the current bias I_B, while $σ/τ=Vin$ is given by the ratio of the typical width (σ) of the switching current probability distribution for gate-driven superconducting field-effect transistors⁹ and the transconductance $τ=dIC/dVG$⁠.⁷ For V-based devices, g is expected to reach values as high as $∼7$ with a typical power dissipation of $∼40$ nW. Our V DB nanotransistor shows gain performance similar to cryogenic semiconductor devices^38,39 with a reduction in power consumption of about three orders of magnitude. Noteworthily, a series of N rectifiers can be realized by feeding the gate electrode of the nth rectifier with the output voltage of the $(n−1)th$ one, resulting in a total gain equal to g^N.

In the following, we shall focus on the time-resolved investigation of the response of V Josephson transistors to AC square-wave and sinusoidal gate signals. The measurement setup, comprising an input/output analog-to-digital/digital-to-analog converter (ADC/DAC) board for the generation and the acquisition of time-resolved alternate current and voltage signals, is depicted in Fig. 3(a). The voltage drop V(t) across the current-biased DB was measured as a function of a time-dependent gate voltage $VG(t)$⁠. In this configuration, when $IC[VG(t)]<IB$⁠, the junction is in the normal state and a finite voltage drop is built across the DB (high-state). By contrast, when $IC(VG(t))>IB$⁠, the DB is superconducting and $V∼0$ (low-state). The response of the device to a transistor–transistor-logic (TTL)-like square-wave excitation was probed by feeding the gate with a signal consisting of a V_DC = 10 V DC bias added to a V_AC = 5 V square-wave signal with frequencies up to $∼50$ Hz, as shown in Fig. 3(c). The voltage drop in the high and low states for some representative values of I_B is shown in Fig. 3(d) as pairs of points of the same color superimposed on the I–V characteristics. Such curves are taken at selected values of V_G. As displayed in Fig. 3(d), the voltage drop across the junction preserves the shape of the input signal. In this regard, we emphasize that in our experiments, the maximum operation frequency is limited by the low-pass filtering stages of the electrical lines of our setup. A lower bound to the operation frequency of the V gate-controllable rectifiers might arise in the $108−1010$ Hz range due to the typical electron–phonon relaxation rates at these bath temperatures.⁴⁰ Furthermore, the frequency defined by $2Δ/h∼265$ GHz, where Δ is the superconducting gap energy and h Planck's constant, is likely to provide the ultimate operation limit.⁴¹ The latter value is comparable to state-of-the-art hybrid and CMOS field-effect transistors;^17,42,43 nonetheless, we stress that at the present time, the timescale of gate-driven superconducting phase transition is still totally unknown and is worth to be investigated through specifically designed experiments.

The response of the DB to a sinusoidal gate voltage excitation was measured by applying to the gate an AC sine signal V_AC with peak-to-peak amplitudes ranging from 1 to 3.5 V added to a V_DC = 11 V DC voltage bias. This results in a periodic sinusoidal oscillation of the critical current I_C above and below I_B, producing a gate-driven periodic modulation of the device resistance. The voltage drop across the DB as a function of I_B and V_G is displayed in Fig. 4(a). We note that by choosing I_B and V_DC, it is possible to set a working point for the rectifier, which determines the intensity and the shape of the resulting output voltage signal through the evolution of the super-to-normal switching point [red dashed line in Fig. 4(a)] and through the dependence of the device resistance on the gate voltage (also see Ref. 2). Indeed, the system lies in the zero voltage state for $IC(VG(t))>IB$⁠, and a voltage drop across the junction occurs when $IC(VG(t))≃IB$⁠. For higher values of V_G, i.e., when $IC(VG(t))<IB$⁠, the voltage drop increases due to the gate-driven evolution of the DB resistance, which eventually will saturate at the asymptotic value of the normal-state resistance. Figure 4(c) shows the voltage drop of the DB as a function of time, in response to the gate signal reported in Fig. 4(b). To clarify the response of the system to such excitation, we highlight in Figs. 4(a) and 4(b) three points corresponding to the minimum of the $VG(t)$ signal (light green dot), the switching point (red dot), and the maximum of $VG(t)$ (dark green dot). The value of the biasing current was set to $IB=72μ$A in order to take advantage of both the sharp normal-to-superconductor transition and the linear relation between R and V_G for I_B > I_C. The latter feature allows us to preserve the sinusoidal shape in the output voltage when the JJ is in the resistive state, as shown in Figs. 4(c)–4(e) for different values of V_AC. Indeed, although the output signal resembles that of a conventional half-wave rectifier,⁴³ it is worth emphasizing that, in our systems, it is possible to tune the rectification threshold $VG*$ by changing both I_B and V_DC.

In summary, we have demonstrated a half-wave rectifier based on a gated vanadium Dayem nano-bridge Josephson transistor operating at 3 K. We showed the time-resolved response of our device to square-wave and sinusoidal gate signals, demonstrating the ability to convert an AC excitation into a DC one, and with a gain, which is expected to obtain a value close to 7 at a power consumption of $∼40$ nW. The performance of the V DB represents a major improvement in energy efficiency compared to conventional cryogenic semiconductor technology.^38,39 V-based gate-controllable Josephson rectifiers could represent a breakthrough and a possible enabling technology to implement innovative all-metallic superconducting photon detectors^44–46 based on gating as well as electric diodes suitable for superconducting digital⁴¹ and quantum electronics^47,48 circuitry.

The authors acknowledge the European Union's Horizon 2020 research and innovation program under Grant No. 777222 ATTRACT (ProjectT-CONVERSE) and under Grant No. 800923-SUPERTED for partial financial support.