Engineered substrates offer a promising avenue towards graphene devices having tunable properties. In particular, topographically patterned substrates can expose unique behavior due to their ability to induce local variations in strain and electrostatic doping. However, to explore the range of possible science and applications, it is important to create topographic substrates that both have tunable features and are suitable for transport measurements. In this letter, we describe the fabrication of tunable, topographically patterned substrates suitable for transport measurements. We report both optical and transport measurements of graphene devices fabricated on these substrates and demonstrate the characteristic strain and local doping behavior induced by the topographic features.
Graphene is a material with enormous potential for both scientific research and technical applications.1–4 In particular, the ability to tune graphene's properties through the use of engineered substrates offers a practical method to explore graphene's properties and modify them for specific applications.5,6 Previous work on engineered substrates has employed substrate topography,7–10 electrostatic charge injection,11 substrate lattice mismatch,6 and ferroelectric polarization12 to achieve a range of modifications to graphene's properties.
Of the various substrate engineering techniques, topographic substrate patterning has two distinct advantages: first, topographic substrates can create local strain in graphene. Strain has large effects on graphene's electrical properties,13 from inducing minigaps14 to creating large pseudo-magnetic fields.5,15 To date, however, the techniques used to produce strain in graphene are either not amenable to performing electrical transport measurements on graphene7,10,14–17 or not compatible with standard lithographic fabrication procedures.9 Second, topographic substrates can modulate the effect of a single electrostatic gate to produce complex doping profiles in graphene without the need for multiple, distinct gate electrodes. Here, we demonstrate a fabrication procedure for producing engineered arrays of topographic features on standard silicon substrates, and we report optical and transport measurements of strain and local doping in graphene devices fabricated atop these substrates.
The process used to create the topographic features on the substrate is illustrated schematically in Figs. 1(a)–1(d). First, an array of 20 nm thick copper circles is deposited, using standard electron-beam lithography and evaporation techniques, on a silicon chip covered with a 1000 nm layer of thermal oxide. The deposited copper is then used as a mask in a CF4 reactive ion etching (RIE) step to produce cylindrical pillars in the SiO2 layer. The RIE etch time and the diameter of the deposited copper mask circles together define the aspect ratio of the resulting pillars. For these devices, we use a mask diameter of 100 nm and a 10 min etch time, which gives a height of approximately 200 nm. The pillar diameter is independent of RIE etch time and is equal to the mask diameter. After etching, the copper mask is removed by immersing the chip in a 0.1M solution of ammonium persulfate for several hours. Finally, the chip is dipped in the buffered oxide etchant to sharpen the SiO2 pillars produced during the RIE step into pointed, conical shapes having tips of ∼20 nm diameter.
(a) An array of 20 nm thick copper circles is deposited on a silicon chip covered with a 1000 nm layer of thermal oxide. (b) The deposited copper is then used as a mask in a CF4 reactive ion etching (RIE) step to produce cylindrical pillars in the SiO2 layer. (c) After etching, the copper mask is removed by immersing the chip in a 0.1M solution of ammonium persulfate for several hours. (d) The chip is dipped in a buffered oxide etchant to sharpen the SiO2 pillars produced during the RIE step into pointed, conical shapes having tips of ∼20 nm diameter. (e) Ti/Au (5 nm/30 nm) leads and contact pads are defined and deposited using electron-beam lithography and evaporation. (f) A monolayer of graphene is transferred to the topographic substrate using polymer-assisted wet-transfer techniques. (g) The same polymer layer used to transfer the graphene is then used as a resist in an electron-beam lithography step. The exposed and developed graphene is removed using a reactive ion etch, yielding graphene in a Hall bar configuration. (h) The remaining polymer resist is dissolved in acetone, and the chip is dried in a critical point drying apparatus.
(a) An array of 20 nm thick copper circles is deposited on a silicon chip covered with a 1000 nm layer of thermal oxide. (b) The deposited copper is then used as a mask in a CF4 reactive ion etching (RIE) step to produce cylindrical pillars in the SiO2 layer. (c) After etching, the copper mask is removed by immersing the chip in a 0.1M solution of ammonium persulfate for several hours. (d) The chip is dipped in a buffered oxide etchant to sharpen the SiO2 pillars produced during the RIE step into pointed, conical shapes having tips of ∼20 nm diameter. (e) Ti/Au (5 nm/30 nm) leads and contact pads are defined and deposited using electron-beam lithography and evaporation. (f) A monolayer of graphene is transferred to the topographic substrate using polymer-assisted wet-transfer techniques. (g) The same polymer layer used to transfer the graphene is then used as a resist in an electron-beam lithography step. The exposed and developed graphene is removed using a reactive ion etch, yielding graphene in a Hall bar configuration. (h) The remaining polymer resist is dissolved in acetone, and the chip is dried in a critical point drying apparatus.
Graphene devices are fabricated on substrates prepared by this method using the process shown in Figs. 1(e)–1(f). First, Ti/Au (5 nm/30 nm) leads and contact pads are defined and deposited using electron-beam lithography and evaporation. Next, a monolayer of graphene is grown on a different substrate using established chemical vapor deposition techniques.19 The graphene is then transferred to the topographic substrate using standard polymer-assisted wet-transfer techniques.20 The same polymer layer used to transfer the graphene is then used as a resist in an electron-beam lithography step. Next, the exposed graphene is removed using a reactive ion etch, yielding graphene in a Hall bar configuration. Finally, the remaining polymer resist is dissolved in acetone, and the chip is dried using a critical point drying apparatus. Figure 2 shows the scanning electron microscopy (SEM) micrographs of substrates and graphene devices produced by this process. Although the transfer and drying processes do lead to some ripping of the graphene [see holes evident in Fig. 2(c)], holes and rips cover less than 10% of the surface, leaving the graphene largely robust for transport measurements on the 10–50 μm length scale of typical devices. As shown in Fig. 2(a), we do not observe significant ripple formation,9,10 likely because our topographic features are widely spaced.21
SEM micrographs of substrates prepared by this method. (a) Graphene deposited on widely spaced topographic features partially delaminates in the vicinity of the SiO2 cones. An arrow points to a representative delaminated graphene region around a periodic topopgraphic feature. The lighter region outlined by dashes on the left is an Au electrical lead. The scale bar is 500 nm. (b) After the BOE dip, the SiO2 pillars are sharpened into cones with a tip diameter of less than 20 nm. The scale bar is 1 μm. Inset: A single sharpened cone. The scale bar is 100 nm. (c) For tight topographic feature spacings, the graphene is suspended on the pointed tips of the substrate features. Here, a slightly ripped region of the graphene is used to show the substrate below (darker regions). The scale bar is 500 nm. (d) After transfer, the graphene is patterned into a Hall bar geometry (darker contrast in image). The six triangular features are Ti/Au electrical leads. The scale bar is 40 μm.
SEM micrographs of substrates prepared by this method. (a) Graphene deposited on widely spaced topographic features partially delaminates in the vicinity of the SiO2 cones. An arrow points to a representative delaminated graphene region around a periodic topopgraphic feature. The lighter region outlined by dashes on the left is an Au electrical lead. The scale bar is 500 nm. (b) After the BOE dip, the SiO2 pillars are sharpened into cones with a tip diameter of less than 20 nm. The scale bar is 1 μm. Inset: A single sharpened cone. The scale bar is 100 nm. (c) For tight topographic feature spacings, the graphene is suspended on the pointed tips of the substrate features. Here, a slightly ripped region of the graphene is used to show the substrate below (darker regions). The scale bar is 500 nm. (d) After transfer, the graphene is patterned into a Hall bar geometry (darker contrast in image). The six triangular features are Ti/Au electrical leads. The scale bar is 40 μm.
We perform optical measurements of graphene devices fabricated on these substrates to confirm the presence of strain. Raman spectroscopy is performed using a Nanophoton Raman 11 microscope with a 532 nm laser at room temperature. The laser power is kept below 1 mW to minimize local heating. Raman measurements are collected in a raster pattern across a 20 μm × 20 μm area with a measurement spot size of 350 nm; each scan encompasses a varying number of topographic features depending on the array spacing. Random variations in spectra for regions away from topographic features yield shifts of less than ±0.5 cm −1. The data for the flat substrates are collected separately for each device to account for the varying residual doping present in each sample. At each raster point, the Raman G and 2D peak positions are extracted.22 Figures 3(a) and 3(b) summarize the extracted positions of the Raman G and 2D peaks, respectively, for graphene in topographically patterned and flat regions of devices prepared by the method described above. Data are shown for devices having pillar spacings between 300 and 700 nm.
Raman peak positions for graphene on micropatterned and flat substrates. (a) and (b) Raman G and 2D peak positions extracted from a raster scan of graphene on topographically patterned and flat substrates for array spacings from 300 nm to 700 nm. Each element in (a) and (b) describes the distribution of measurements over all raster points in a given scan: the central vertical line is the median, the colored box (red or light blue) encompasses the interquartile range of the peak distribution, and the horizontal lines denote the largest (smallest) non-outlier measurement. (c) Raman G peak position vs. 2D peak position for graphene on a flat substrate and a substrate with topographic features spaced 700 nm apart. The black dashed line shows the ratio r = Δω2D/ΔωG expected for shifts due to strain, and the grey dotted line shows the ratio expected for shifts due to doping. The two lines intersect at the expected peak positions for undoped, unstrained graphene.18 The slopes for strain and doping are overlaid on the distributions for graphene on topographic and flat features. The intersection of the overlapped slopes is placed at the median of the distribution. A median 2D peak shift for topographically supported graphene of roughly 10 cm−1 can be attributed to strain.
Raman peak positions for graphene on micropatterned and flat substrates. (a) and (b) Raman G and 2D peak positions extracted from a raster scan of graphene on topographically patterned and flat substrates for array spacings from 300 nm to 700 nm. Each element in (a) and (b) describes the distribution of measurements over all raster points in a given scan: the central vertical line is the median, the colored box (red or light blue) encompasses the interquartile range of the peak distribution, and the horizontal lines denote the largest (smallest) non-outlier measurement. (c) Raman G peak position vs. 2D peak position for graphene on a flat substrate and a substrate with topographic features spaced 700 nm apart. The black dashed line shows the ratio r = Δω2D/ΔωG expected for shifts due to strain, and the grey dotted line shows the ratio expected for shifts due to doping. The two lines intersect at the expected peak positions for undoped, unstrained graphene.18 The slopes for strain and doping are overlaid on the distributions for graphene on topographic and flat features. The intersection of the overlapped slopes is placed at the median of the distribution. A median 2D peak shift for topographically supported graphene of roughly 10 cm−1 can be attributed to strain.
Both the G and 2D peaks of graphene in the patterned substrate regions display shifted peak positions relative to graphene in the flat regions. This shift increases with increasing topographic feature spacing and displays a qualitative jump for spacings above 600 nm. We attribute this jump to a snap-through transition17,23,24 in the adhesion of the graphene to the substrate: for spacings below 600 nm, the graphene is suspended in the entire topographically patterned region, while for spacings above 600 nm, the graphene adheres to the substrate except in the immediate vicinity of a topographic feature. The partial delamination present in the sparse topographic samples produces strain in the graphene that generates the shifted Raman peak positions.17
Doping from charge impurities in the substrate is also known to shift Raman peak positions in graphene;25,26 however, the ratio
(where Δω is the shift in a Raman peak position relative to its intrinsic value) differs between the two mechanisms.18 Experimental measurements27–29 and theoretical results16,30 place the ratio for the strain between 2.25 and 2.8 and the ratio for doping at approximately 0.75.18 Figure 3(c) shows the extracted Raman G and 2D peak positions for a representative topographically patterned sample having a spacing of 700 nm, along with lines corresponding to strain (dashed) and doping (dotted). We note several differences between the Raman spectra for the topographic and flat graphene. First, the distribution of peaks shows a larger variance along the strain line for graphene on topographic patterns; in contrast, topographic graphene and flat graphene have comparable variances along the doping line. We attribute the scattered points for graphene on topographic features having ωG above 1587 cm−1 to the residual post-fabrication polymer. Hence, this difference in distributions directly shows that there is a varying strain on graphene from the topographic features. Additionally, we note that the position of the median for the distributions from flat and topographically supported graphene is essentially shifted along the purely strain axis. We attribute the deviation from purely strain to a change in doping from the graphene being partially suspended around the pillars. Thus, we can confirm that an approximately 10 cm−1 shift in the 2D peak position of topographically supported graphene is from the effect of strain in the graphene. From a 10 cm−1 shift in the 2D peak position, we estimate that the graphene is subject to a cumulative tensile strain on the order of 0.1%.16–18 Based on the large variance of 2D peaks for topographically supported graphene along the strain axis and previous work on topographically supported graphene,17 we expect this strain to be non-uniformly distributed below the resolution of the Raman microscope and that large tensile strains are localized in close proximity to the apex of the pillar.17
Next, we perform magneto-transport measurements on a device having a substrate pillar spacing of 750 nm to elucidate the effect of local variations in the electrostatic potential and strain. Several similar devices were measured and yielded qualitatively similar results. For sparsely patterned substrates, the graphene is locally delaminated in the vicinity of each individual topographic feature. This delamination alters the effective gate capacitance by including a region of vacuum in series with the SiO2 dielectric layer. The local variation in the gate capacitance creates a corresponding variation in the potential, effectively creating a circular potential barrier, e.g., a quantum dot. This situation is illustrated schematically in Fig. 4(d). Carriers in graphene cannot be confined electrostatically: as massless particles governed by the Dirac equation (in the low energy limit), they display Klein tunneling.31,32 However, previous work has shown that circular potential barriers can create pseudo-bound states in graphene.33–37 For graphene on topographically patterned substrates, we therefore expect transport behavior to display signatures of scattering from these pseudo-bound states. We note that we do not expect coherent transport behavior (such as Fabry-Perot resonance or superlattice effects) across multiple topographic features, as the coherence length is ∼1 μm38 and a typical device length is 20 μm which encompasses ∼30 pillars.
Longitudinal resistance Rxx of a graphene device fabricated on (a) a substrate with 750 nm-spaced topographic features and (b) a flat substrate as a function of gate voltage and magnetic field. The color scale is measured in kΩ. (c) The same data as in (a) with a linear background Rbackground = mVg + b subtracted. (d) The potential profile created by the local delamination of the graphene from the varying capacitance. In the delamination regions, the vacuum layer alters the gate capacitance and thus creates local variations in the potential.
Longitudinal resistance Rxx of a graphene device fabricated on (a) a substrate with 750 nm-spaced topographic features and (b) a flat substrate as a function of gate voltage and magnetic field. The color scale is measured in kΩ. (c) The same data as in (a) with a linear background Rbackground = mVg + b subtracted. (d) The potential profile created by the local delamination of the graphene from the varying capacitance. In the delamination regions, the vacuum layer alters the gate capacitance and thus creates local variations in the potential.
Figures 4(a) and 4(b) show the results of magneto-transport measurements performed at 250 mK on a 750 nm-spaced topographic device and a flat control device, respectively. Both devices are 20 μm long and 10 μm wide; for the topographic device, the patterned substrate features cover the entire device area. The Dirac point for both devices is located at approximately 40 V; this reflects both the residual doping from the fabrication process and the reduced gate capacitance of the thicker-than-normal SiO2 dielectric layer. All transport measurements were taken with a channel current of 50 nA, and gate leakage current was always less than five percent of channel current. The reduced mobility of the topographic device relative to the flat control device is due to rips introduced during the critical point drying step of the fabrication process. Qualitative differences between the topographic and flat devices are apparent: the flat control device displays the onset of a typical Landau level fan pattern;39 however, the topographic device displays several resistance maxima not present in the control device. Figure 4(c) shows the same data as Fig. 4(a) with a linear background Rbackground = mVg + b subtracted; we remove this background to emphasize deviations from the expected Dirac cone pattern of gated graphene. Several additional local maxima are visible in the low gate voltage region. The diamond-like high resistance features [red regions in Fig. 4(c)] are reproducible. Although they are somewhat irregular, they have typical energy scales of ∼1 T in the magnetic field and ∼5 V in gate voltage.
The scale of the observed transport features, in both the magnetic field and gate voltage, is in good agreement with theoretical predictions for scattering from quasi-bound states in graphene. Considering first the magnetic field scale, previous work37 has shown that the scattering properties of quantum dots in graphene depend on the size of the dot: for small dots, forward scattering is strongly suppressed and conductivity is reduced, while large dots can focus carriers and enhance conductivity. In the presence of a magnetic field, we take the cyclotron radius rc to be the relevant length scale, e.g., for dot size r < rc, we expect an effective “small” dot with reduced conductance, while for r > rc, we expect a “large” dot with larger conductance. This is consistent with our observation of more resistive behavior at smaller magnetic fields, i.e., at larger rc. This can be estimated quantitatively by calculating the cyclotron radius, given by
where vF = 106 m s−1 is the Fermi velocity in graphene, m∗ is the carrier effective mass, e is the charge of an electron, B is the applied magnetic field, h is Planck's constant, and n is the carrier density. For our devices, with a field of 1 T corresponding to the field at which the transport features disappear and a carrier density of 1011 cm−2 as determined by separate Hall measurements, we find a cyclotron radius of 40 nm. This is in excellent agreement with the 50 nm radius of the local delamination regions, as determined by SEM measurements.
Next, we consider the gate voltage scale of the transport features. Forward scattering of quasibound states in graphene quantum dots is also suppressed when the energy of incident carriers matches the energy of a quasi-bound state.33 We therefore expect the gate voltage scale of the transport features to match the spacing between quasi-bound state energy levels. Features in the transport data are spaced approximately 5 V apart. The change in the Fermi energy in graphene for a given change in gate voltage is given by
where α = Cbg/CQ is the capacitive lever arm of the back-gate, the capacitance of the backgate Cbg is that of a SiO2 parallel plate capacitor with an area of 200 μm2 and a separation of 500 nm, and the quantum capacitance of the graphene sheet is given by CQ = e2ρ(EF)40 (in the low temperature limit, where EF ≫ kT). The density of states ρ(E) is known for graphene,41 and EF can be extracted from the carrier density. Using a carrier density of 1011 cm−2 as above, this gives an energy scale for the observed transport features of approximately 40 meV. Next, we relate this experimental value to theoretical predictions. For a parabolic potential of the form , theoretical results33 give the following expression for the energy scale of the quasi-bound states:
As shown in Fig. 4(d), the potential profile in our devices is defined by the local delamination of graphene in the vicinity of the topographic features. Approximating the potential profile in our devices as parabolic, we take x0 = 25 nm to be half the radius of the topographic features and U to be the change in potential created by the locally varying gate capacitance
The capacitive lever arm for the flat region αflat remains the same as above, and we model the capacitance of the delaminated region as the cylinder of air in series with the SiO2 substrate. The cylinder of air has radius x0 and a height of 100 nm, where the latter figure is half the height of the patterned features on the substrate. Taking Vg = 22.5 V as the midpoint of the region of interest, we find a theoretically predicted energy scale of 57 meV for the quasi-bound states in our device, in good agreement with our experimental results. We note that the energy scale of the quasibound states depends on the height of the potential barrier as E ∝ U1/3. In our experimental configuration, the height of the potential barrier depends in turn on the magnitude of the applied gate voltage as U ∝ Vg. The gate voltage in our measurements varies by a factor of two in the region of interest, and so, we expect the theoretically predicted energy scale to vary by a factor of 21/3 over the course of the measurement, which precludes a more precise quantitative comparison.
It is also possible that local strain and pseudomagnetic fields affect transport in this regime. To further analyze the data, we consider the impact of mechanical deformations on the properties of the electron transport. In the case of the graphene partially delaminated on the pillars, we can estimate the effect of strain from works on graphene drumheads42 and graphene supported on pyramid arrays.17 In the case of graphene drumheads, a 1D profile of suspended graphene having a similar geometry as Fig. 4(d) was studied through numerical simulations.42 In this work, while strain on the order of 1% was confined to a small radius (r ≈ 1 nm) around the apex, the pseudomagnetic field profile calculated extended over 50 nm and had a maximum field intensity at ∼10 nm. Such a pseudomagnetic field profile generates quantum dots in graphene, and strain-induced dots were spectroscopically studied by STM to have a radius of 30–50 nm and an energy spacing of 20–30 meV.42,43 Similarly, 3D simulations of strain and the pseudomagnetic field for graphene strained on nanoscale pillars (having similar aspect ratios to the tips of the pillars in the current work) showed that strain was strongly localized to the ∼1 nm radius around the apex and that maximum pseudomagnetic field strengths occurred for a radius of 10 nm around the apex.17 Indeed, additional numerical simulations support that the pseudomagnetic field profile is strongly localized around the maximum radius of curvature (i.e., the apex of a periodic topographic feature) while retaining a nearly invariant confinement ratio.44 While sharper aspect ratios generate larger pseudomagnetic fields in close proximity to the apex, the confinement area of the dot will be similar.17,42 This work implies that a bound state from a strain based quantum dot would be on the order of a 50 nm confinement radius, similar to what we estimated from the transport data. The bound state diameter and energy scale estimated from our transport data are thus consistent with a quantum dot from a strain induced pseudomagnetic field.42 Additionally, strain may also provide some effective gating by generating a local electrostatic potential,46 further contributing to the bound state potential. Hence, our data likely reflect a rich interplay from a varying potential caused by periodic modulations of gate capacitance and strain.17,42–46 However, the transport measurements utilized here do not allow for clear distinction, the effect of which dominates. Future experiments utilizing local probe measurements such as STM42,43 and simulations based on the transport geometry should provide a more complete understanding of the impact the micropatterned substrate has on graphene.
In summary, we describe a fabrication procedure for producing graphene devices on substrates having an array of topographic features, and we report experimental signatures caused by these features. We find that the spacing of the topographic features determines the adhesion behavior of the graphene; for large spacings, partial delamination creates strain in the graphene which we observe using optical measurements. Finally, we find that magneto-transport measurements display features consistent with the presence of a locally varying potential, which we attribute to interplay between a variable gate capacitance induced by graphene adhesion to the topographic features. Specifically, the transport features are consistent with the engineering of quasibound states in the graphene, and the tunable nature of the graphene delamination17 offers an opportunity to carefully engineer the properties of these quasi-bound states.43 With careful considerations of the topographic feature spacing and height, this technique can be adapted to length scales on the order of the coherence length in graphene, thereby offering a route to explore correlated strain and electrostatic potentials along with superlattice effects in graphene.
J.H.H. and N.M. acknowledge the support from NSF CMMI Grant No. ENG-1434147. S.T.G. and N.M. acknowledge the support from the NSF-MRSEC program under NSF Award No. DMR-1720633. S.T.G acknowledges the support from an NSF Graduate Research Fellowship. This work was carried out in part in the Frederick Seitz Materials Research Laboratory Central Facilities at the University of Illinois.