Al transmon qubits on silicon-on-insulator for quantum device integration

In recent years, significant developments in experimental quantum information science^1,2 have been realized using microwave superconducting qubits. These devices, consisting of Josephson junctions (JJs) and linear circuit elements, are typically coupled to high-Q superconducting microwave cavities, which realizes the microwave analog of cavity QED—so-called circuit QED.^3–5 The advent of the transmon qubit^6–8 has provided a robust and scalable circuit QED building block. The large vacuum coupling rate attainable between qubit and cavity in the circuit QED architecture has enabled, among other things, realization of the strong dispersive coupling regime,^5,9 creation of quantum gates with state-of-the-art gate fidelities,¹⁰ and most recently, circuits capable of quantum error detection and correction.^11,12

Interfacing the circuit QED toolbox with other systems of physical or technological interest—cavity optomechanical systems, for example, Refs. 13 and 14—requires scalable fabrication techniques on compatible materials systems. Many works within the circuit QED community have focused on developing fabrication methods that realize long qubit lifetimes and small dephasing rates.^15–17 Two primary approaches have emerged: the so-called planar approach wherein qubits are coupled to on-chip resonators¹⁸ and the 3D cavity approach wherein qubits are coupled to 3D box cavities.¹⁹ Whereas the former affords higher device densities and more integration, the latter yields longer coherence times. In recent years, silicon has become favored as a substrate for its low dielectric loss and for the diversity of available fabrication techniques,^20–22 resulting in transmon qubits that have coherence times and gate fidelities similar to or exceeding their sapphire counterparts.^{10,18,23–25}

Here, we present the fabrication and characterization of a planar transmon qubit on silicon-on-insulator (SOI) with a coherence time which is a factor of 20 improvement over prior work in this material system.²⁶ These SOI qubit fabrication methods not only realize viable qubits but are also compatible with the integration of other photonic, electronic, and MEMS components on the same SOI substrate.²⁷ Moreover, the processing steps for SOI may be simply added to those required for a silicon qubit process, enabling either Si or SOI qubits to be fabricated without a complete process change.

Our qubit design [pictured in Fig. 1(b) and shown schematically in Fig. 2(c)] is based on the Xmon qubit.¹⁸ A long rectangular capacitor is capacitively coupled to both a readout resonator and an XY-control line; the capacitor is connected to ground through a SQUID loop [Fig. 1(c)] that is inductively coupled to a DC control line, which allows for frequency tuning of the qubit.¹⁸ Our readout resonator, consisting of a $λ/4$ coplanar waveguide resonator, is inductively coupled to a transmission line, which allows for dispersive readout of the qubit.¹⁸ We realize the as-measured parameters of: $fq=ωq/2π=5.652$ GHz, $η/2π=−300$ MHz, $ωr/2π=7.143$ GHz, and $χ/2π=3.5$ MHz, where $ωq=ω10$ is the qubit transition frequency, $η=(ω21−ω10)$ is the anharmonicity, ω_r is the readout resonator frequency, and $2χ=ωr,|0〉−ωr,|1〉$ is the dispersive shift. These measured values imply a Josephson energy $EJ/h=14.8$ GHz in the transmon limit (⁠$EJ≫EC$⁠), where $ℏωq≈8EJEC−EC$ and the charging energy $EC≈−ℏη$⁠, as well as a vacuum qubit-resonator coupling rate $g/2π=177$ MHz where $g≈−Δχ(1+Δ/η)$ and $Δ=ωq−ωr$⁠. The readout resonator has intrinsic and extrinsic coupling Qs of $Qi=45.8×103$ and $Qe=6.1×103$⁠, measured at single-digit intracavity photon numbers. These values are close to the designed and expected values.

Our fabrication process is a multi-layer process pictured in Fig. 1(a). We begin with a 10 mm × 10 mm chip of SOI [Si device layer: float zone grown, 220 nm, $≳3$ kΩ cm; buried oxide (BOX) layer: 3 μm, silicon dioxide; Si handle: Czochralski grown, 750 μm, $≳5$ kΩ cm]. We then perform the following main fabrication steps [from left to right in Fig. 1(a)]: (i) C₄F₈/SF₆ inductively coupled plasma reactive ion etch (ICP-RIE) of 50 nm radius holes through the device layer to allow for release in step (v) below; (ii) electron beam evaporation of 120 nm Al at 1 nm/s to define a ground plane, the qubit capacitor, and the readout resonator; (iii) double-angle electron beam evaporation of 60 nm and 120 nm of Al at 1 nm/s with an intervening 20 min oxidation at 5 mbar and subsequent 2 min oxidation at 10 mbar to forms the JJs; (iv) 5 min argon ion mill and 140 nm Al evaporation to form a “bandage” layer that electrically contacts the Al layers defined in steps (ii) and (iii); and (v) HF vapor etch of the underlying BOX layer. In the supplementary material, we omit steps (i) and (v) to fabricate a qubit on a high-resistivity Si substrate, with characterization confirming that steps (ii)–(iv) alone yield a viable qubit on Si (as opposed to SOI).

After steps (ii)–(iv), a liftoff process was performed in n-methyl-2-pyrrolidone at 80 °C for 2 h. In (i)–(iv), we use electron beam lithography to pattern our resist. The above process is similar to that described elsewhere^28,29 and, for SOI samples, yields a device layer that is partially suspended above the handle wafer. As highlighted by the yellow boundary line in the scanning electron microscope image of Fig. 1(b), we etch 100 μm into the BOX layer such that the circuit is far from the lossy Si/SiO₂ interface.²⁸ 

We characterize the qubit in a ³He/⁴He dry dilution refrigerator with a base temperature of $Tf∼7$ mK using frequency-domain and time-domain spectroscopy. We begin with frequency-domain characterization and measure transmission (S₂₁) through a coplanar waveguide feedline using a two-port vector network analyzer (VNA). The Z control line is used to carry a small current which produces an external flux bias, $Φext$⁠, in the SQUID loop of the qubit, thereby tuning the qubit transition frequency, f_q. For a given $Φext$⁠, we identify f_q and transitions to higher levels (from which we extract η) by sweeping a continuous-wave (CW) microwave tone applied to the XY drive line and monitoring the resonator response.³⁰ 

Having identified device parameters, we switch over to time-domain characterization, using the measurement setup summarized in Fig. 2. We characterize the qubit using dispersive readout³¹ (Fig. 3), with $Φext$ set so that the qubit is at a first-order flux-insensitive point.^6,18 Excited state population decay [Fig. 3(b)] and Ramsey oscillations [Fig. 3(c)] yield $T1=$ 3.5 μs and $T2*=$ 2.2 μs, respectively. Comparative work, involving superconducting phase qubits on much thicker (2 μm device layer) SOI, has previously realized $T1=1.6$ μs and $T2*=110$ ns.²⁶ 

We can estimate the Purcell-limited T₁ by the simplistic single-mode estimate $(Δ/g)2/κr=8.5$ μs, where $κr=ωr/Q$ and $1/Q=1/Qi+1/Qe$⁠. This is not much higher than our measured T₁, implying that incorporating an on-chip Purcell filter may improve our qubit lifetime.^32,33 Regarding the measured $T2*$ values, since obtaining these measurements, we have identified and resolved some grounding issues in our measurement setup that likely contributed to excess flux noise coming from 60 Hz currents on our flux bias line. We anticipate that these improvements may even be important at the first-order flux insensitive point.

To characterize our gate fidelities, we utilized Clifford group randomized benchmarking,^10,34,35 shown schematically in Figs. 4(a) and 4(b). We measured three gates (⁠$Xπ, Xπ/2$⁠, and $Yπ$⁠). We realize an average gate fidelity of $f¯(C)=0.9860(2)$ as well as individual gate fidelities of >0.992 for all measured gates. It should be noted that these gates have not yet been optimized to avoid phase errors or leakage outside the computational basis.³⁶ 

In terms of the impact of the SOI device layer properties or various fabrication steps on the resulting qubit decoherence times, further systematic studies are required. In particular, the importance of using the vapor HF etch to remove native oxides and (temporarily) passivate the Si surface before every evaporation step of aluminum on the Si layer (including right before the double angle evaporation used to form the JJs) needs to be clarified further. Also, any residual effects of the underlying BOX layer needs to be ruled out through the systematic studies of qubit coherence versus undercut extent, in conjunction with 3D numerical modeling to determine more optimized qubit and membrane geometries. Even while the precise physical and materials limitations of our system are unclear, current coherence times are sufficient for many quantum simulation and quantum optics experiments. Meanwhile, our realization of a highly coherent SOI qubit represents an essential building block for hybrid electro-opto-mechanical systems on SOI. Already, electromechanical and optomechanical coherent transduction bandwidths exceed the bandwidth of our qubit by a factor of two,^14,28,37 a prerequisite for high-fidelity, bi-directional microwave-to-optical quantum state transduction—an interesting and challenging research program in its own right, with many potential realizations.

Overall, our fabrication and measurements of Al qubits on SOI represent a modest but important technical stepping stone on the path to a variety of potential quantum information and quantum science goals. Taken together with complementary advances in the fields of cavity opto- and electro-mechanics,^14,38 and in the context of competing systems,^18,25 we are optimistic about the potential of hybrid quantum systems and circuit QED on silicon-on-insulator.

See supplementary material for details concerning the measurement setup and the randomized benchmarking, and for characterization of an Al-on-Si transmon fabricated by omitting the first and last steps of our SOI fabrication process.

We gratefully acknowledge the Martinis Group (UCSB/Google) for their amplifier and filter designs, Dan Vestyck for his support of our uEtch HF vapor tool, and Mark Rosamond for discussions. This work was supported by the AFOSR MURI Quantum Photonic Matter (Grant No. 16RT0696), the AFOSR MURI Wiring Quantum Networks with Mechanical Transducers (Grant No. FA9550-15-1-0015), the Institute for Quantum Information and Matter, an NSF Physics Frontiers Center (Grant No. PHY-1125565) with the support of the Gordon and Betty Moore Foundation, and the Kavli Nanoscience Institute at Caltech. A.J.K. acknowledges the IQIM Postdoctoral Fellowship.