Highly repeatable room temperature negative differential resistance in AlN/GaN resonant tunneling diodes grown by molecular beam epitaxy

Tunneling based diodes have taken multiple forms dating back to the traditional p-n Esaki diode. Esaki diodes utilize interband tunneling, whereas a resonant tunneling diode (RTD) is a unipolar intraband device. The primary interest in tunneling diodes is due to their unique ability to create N-type negative differential resistance. The mechanism for creating negative differential resistance (NDR) in an RTD as reported originally by Chang et al.¹ is based on a resonant tunneling effect wherein a quasi-bound energy state, located within a quantum well (QW) between two higher energy barriers, aligns and mis-aligns with the Fermi level in the injector region outside the barriers with increasing bias voltage. This kind of feature can be utilized in a vast number of applications ranging from self-oscillators to logic and memory.² 

III-nitride RTDs^3–14 have attracted a great deal of interest in recent years as they have potential to increase the power output and operating temperature of RTDs due to the large band offsets available in pseudomorphic and III-nitride heterojunctions (∼2 eV for AlN/GaN). Subsequently, intraband tunneling could enable a new class of tunneling injection devices. For example, the combination of RTDs with plasmonic modes in a III-nitride HEMT structure¹⁵ could lead to power gain at high frequencies.

Past reports have shown InAs/AlSb RTD oscillation frequencies of 712 GHz,¹⁶ and more recently InAs/AlAs RTD oscillations up to 1.1 THz.¹⁷ Despite these high-speed capabilities, RTDs have never become popular as THz oscillators due to low output power; however, a III-nitride RTD could change this perspective. Intraband resonant tunneling is also a critical component for quantum cascade lasers (QCLs)¹⁸ based on intersubband emission.^19,20 Therefore, advancements in nitride heterostructures will facilitate this class of devices too. III-nitride QCLs have the potential to provide shorter wavelength operation than achievable in traditional III-(As,P) heterostructures because of their larger conduction band offsets. Additionally, the higher optical phonon emission rates in the III-Ns could reduce the threshold current by facilitating population inversion. However, stable, repeatable, and hysteresis-free room temperature resonant tunneling and NDR in III-nitride structures have proven to be very challenging.

There has been some success using non-polar GaN substrates^5,9 to circumvent polarization issues, as well as low temperature and pulsed NDR repeatability on polar substrates.¹⁰ But to date, there are no reports of room-temperature NDR from devices grown on polar substrates which is simultaneously free from hysteresis, highly repeatable, and robust over multiple voltage sweeps. Past researchers have attributed this lack of reproducibility to three main factors: (i) spontaneous and piezoelectric polarization along the c-axis leading to strong internal fields,^3–5 (ii) trapping effects,^5–8,21 and (iii) scattering and leakage pathways related to dislocations.⁷ Some have even suggested that there may exist a percolation based leakage in barriers made from nitride ternary alloys.²² 

This study aimed to address the latter issues by utilizing low dislocation density, freestanding GaN substrates, and homoepitaxial growth by molecular beam epitaxy (MBE) to produce a strictly controlled active region with sharp interfaces and a layer structure with minimal extended defects. Additionally, very high levels of doping were utilized to suppress the depletion region outside of the top barrier, while simultaneously using thick unintentionally doped (UID) cladding regions to prevent the Si dopants from entering the UID active region. Finally, great care was taken during the device processing to minimize the creation of unwanted current conduction mechanisms.

The RTD structure in this study is illustrated via the energy band diagram and growth stack in Figs. 1(a) and 1(b), respectively. The sample was grown by plasma-assisted MBE at 860 °C on an 18 × 18 mm² freestanding HVPE-grown Ga-polar semi-insulating (SI) GaN substrate. Details of ex situ substrate surface preparation prior to loading the wafer into the ultra-high vacuum system can be found elsewhere.²³ Immediately prior to initiating growth of the device layers, the surface of the GaN substrate was exposed to the nitrogen plasma for two minutes. The Ga and Si shutters were then opened for growth of the GaN:Si buffer layer, which also functioned as the bottom contact layer. The active region consisted of (in order from bottom up) a 12-nm unintentionally doped (UID) GaN “spacer” layer, a 2-nm AlN barrier layer, a 3-nm UID GaN well, a second 2-nm AlN barrier, and a final, 6 nm-thick UID GaN spacer layer. A 100 nm-thick GaN:Si top contact layer was then grown. All layers were grown continuously and without interrupts. The GaN layers were grown in the intermediate growth regime described by Heying et al.,²⁴ in which the nominal Ga flux is greater than the active nitrogen flux yet no droplets of excess Ga were observed on the sample surface after growth. The AlN barriers were grown with an aluminum/active nitrogen flux ratio of ∼1. Investigation of similarly grown device structures by cross sectional high-angle annular dark-field scanning transmission electron microscopy (HAADF STEM), illustrated in Fig. 1(c), reveals that no new observable threading dislocations are generated within the epitaxial layers.

The sample was fabricated using common semiconductor device processing methods. The surface went through a standard cleaning process and was followed by a spin-coating of AZ-5214 image reversal resist. Immediately following the resist treatment, the top mesa contact was defined via optical lithography. Electron beam (e-beam) evaporation was used to deposit a Ti/Al/Ni/Au top contact. After lift-off, a resist-based etch mask was defined so as not to damage the top contact during the mesa etch. The mesa was defined using a Cl₂/BCl₃/Ar inductively coupled plasma reactive ion etch (ICP-RIE) process done at a relatively high power to ensure vertical sidewalls through the active region.²⁵ This avoids the problem of a sloped sidewall leading to unwanted current leakage pathways because of focused field effects at sharp edges.

Following the mesa definition, a third photo-mask was used to define the bottom contact. This time e-beam evaporation was used to deposit a Ti/Al/Ni/Au/Ti contact. The additional Ti layer was incorporated to act as a protective layer during the subsequent via etch as well as an adhesion promoter for the ground-signal-ground (GSG) pad. Next, device isolation pads were defined with the fourth photo-mask. The same ICP-RIE process was used to etch down to the SI substrate, thus allowing for complete device isolation. A 300 nm layer of SiO₂ was then deposited using plasma enhanced chemical vapor deposition (PECVD). Vias through the SiO₂ were defined using the fifth mask, followed by a CF₄-based etch. Finally, a Ti/Au GSG pad was defined with the sixth mask.

Room temperature dc electrical characterization of the devices was carried out with a Keysight B1500A Parameter Analyzer. Voltage-source bias was applied to the top contact via tungsten probes. To verify the correct operation of a device initially, a full voltage sweep from −5 V up to +6 V and then back to −5 V (illustrated in Fig. 2(a) inset) was performed. Multiple voltage ramp rates were utilized, but had no effect on the results. Negative differential resistance was routinely observed on roughly 90% of the devices, regardless of size. The remaining 10% of the devices were usually flawed in some way as a result of process error and manifested as a short or an open. The peak current density, J_p, and peak-to-valley current ratio (PVCR) scale with device size [Fig. 2(a)]. The I–V curves seen in Fig. 2(b) show very stable NDR over 1000 continuous sweeps, with only a very slight shift with time from Joule heating effects. This is contrary to any past reports, which generally detail a degradation of any observed NDR with subsequent sweeps. The 7 × 10 μm device measured in Fig. 2(b) was swept from +2.5 V up to +5.5 V and then from +5.5 V down to +2.5 V. This up-and-down measurement was considered one “sweep cycle”. This approach was taken to display the lack of hysteresis which is usually observed in III-nitride tunneling devices during the downward part of the cycle. Additionally, this particular measurement illustrates the high degree of thermal stability available to III-nitride tunneling devices. The chair-like pattern in the NDR region is indicative of self-oscillation as the voltage-source bias presents negligible series resistance. The histogram displayed in Fig. 2(c) shows the peak NDR voltage of 50 different operational devices found across the sample. The values varied between 3.65 V and 4.22 V; however, most had a resonant voltage of 4.1 V. This variance can easily be explained by slight variations in barrier and QW thickness across the large sample. Low temperature dc I–V measurements were carried out at 20 K and then again at 297 K [displayed in Fig. 2(d)]. There is a slight decrease in tunneling current at the peak voltage; however, the difference is greater at the valley point. This is because inelastic scattering mechanisms, which are greatly reduced with temperature, generally have a more significant influence over the valley current. Additionally, the peak voltage is slightly higher at low temperature, while the valley voltage is significantly higher. This behavior has been commonly observed in RTDs across other material systems as well.^26–28 

Traditionally, RTDs exhibit an antisymmetric I–V characteristic with respect to bias if the heterostructure and doping profiles are both symmetric about the center of the quantum well. As seen in Fig. 2(a) (inset displaying negative bias), our GaN/AlN RTD I–Vs are distinctly not antisymmetric partly because of asymmetry in the spacer-layer thickness and in the doping concentration in the contact layers. However, we believe that a more important asymmetric effect is from the polarization fields present at the heterojunctions. The asymmetry is apparent in the band diagrams of Figs. 3(a) and 3(b). The polarization charge is responsible for inducing a significant increase in the height of the first (top) barrier, as well as the creation of a thick space-charge immediately outside of it. Both of these greatly affect the probability for tunneling, especially through the first quasibound state, E₁. To help minimize these effects, very high doping levels were utilized in the top contact layer. Additionally, an accumulation region is formed immediately following the second barrier.

Energy band diagrams calculated using numerical simulations²⁹ indicate the existence of three quasibound states located within the RTD quantum well and one bound state located in the accumulation region. The first state is located deep within the potential well where the barriers are much thicker, the tunneling probability resonance is very narrow, and thus it has little or no impact on the overall current contribution. The second state, E₂, has a much broader resonance and is responsible for most of the measured current and NDR observed in this study. Additionally, the bound state in the outer accumulation well, E₀, could be creating another less pronounced resonance, contributing to the current significantly at the valley point and beyond. As the bias is increased past the 1st NDR region one would expect to see a 2nd NDR region resulting from the third quasibound state E₃, this, however, is not the case. With increasing bias, as shown in Fig. 3(b), the first barrier eventually drops too low with respect to the second barrier, resulting in very poor confinement prior to the occurrence of resonant tunneling.

Despite a high degree of repeatability, further testing was carried out to verify that the NDR observed in our devices was not the result of severe trapping effects. To this end, the probe station and the devices were isolated from all light sources, and a baseline I–V was performed (in the same manner as described previously) and plotted in Fig. 4. After a period of time, a high power, 1.15 W (0.75 mm beam diameter and ∼2603 mW/cm² power intensity) white light was put directly over the device and another I–V sweep was measured. This same process was carried out for lower power, ∼150 mW (0.65 mm beam diameter and ∼452 mW/cm² power intensity), white, blue, green, and red light sources. If there were any significant contribution from trapping effects one would expect to observe a noticeable difference in the device operation, however, as seen in Fig. 4, the device remains stable and repeatable during the forward and backward voltage sweeps. The inset does show a very small difference when zoomed in on a point. The observed difference is only ∼1 nA and is most likely a result of photocurrent.

Further studies must be done to determine how to suppress the valley current (thereby increasing the PVCR), and the following effects should be considered. First, it is quite possible that the high valley currents observed in these devices are a result of a resonant interaction with the bound state located in the accumulation region. If this is the case, it could be suppressed by significantly decreasing the doping levels on the bottom contact, which could also be used to increase the peak current if the contributions were constructive. Second, it is possible that the high valley current is caused by inelastic scattering which effectively broadens the resonant transmission peak of the second quasibound state. This will be further investigated with temperature-dependent I–V measurements. Third, it is possible that the high valley current is the result of another leakage mechanism such as sidewall roughness. This could be addressed by utilizing a second atomic layer etch or a controlled wet etch. Fourth, a reduction of the polarization fields by moving to AlGaN barriers, semi-polar substrates, or non-polar substrates could facilitate resonant tunneling through the ground state, which would allow for a lower NDR voltage. Finally, further manipulation of the barrier and well width could lead to considerably higher current densities while also controlling the NDR onset voltage.

In conclusion, highly repeatable room temperature NDR was measured in a double barrier GaN/AlN RTD grown via plasma-assisted molecular-beam epitaxy (PAMBE) on the SI bulk GaN substrate, and having UID GaN spacer layers immediately outside both barriers and heavily doped buffer layers outside the spacers. A 90% yield of operational devices across the sample was observed. The measured NDR exhibited no degradation after 1000 continuous sweeps, and the I–V curve showed no difference between forward and reverse sweeps or with strong light illumination. Therefore, the present results demonstrate that a combination of design, growth, substrate quality, and processing improvements can alleviate many of the problems that have hampered previous GaN-based RTDs and prevented NDR at room temperature.

The authors would like to acknowledge funding from Office of Naval Research under the “DATE” MURI program (N00014-11-1-0721, program manager: Dr. Paul Maki). The authors would like to thank Dr. Brian P. Downey and Jeffrey Daulton for helpful discussions regarding processing techniques.