Carbon-based supercapacitors are lightweight devices with high energy storage performance, allowing for faster charge-discharge rates than batteries. Here, we present an example of all-solid-state supercapacitors on silicon for on-chip applications, paving the way towards energy supply systems embedded in miniaturized electronics with fast access and high safety of operation. We present a nickel-assisted graphitization method from epitaxial silicon carbide on a silicon substrate to demonstrate graphene as a binder-free electrode material for all-solid-state supercapacitors. We obtain graphene electrodes with a strongly enhanced surface area, assisted by the irregular intrusion of nickel into the carbide layer, delivering a typical double-layer capacitance behavior with a specific area capacitance of up to 174 μF cm−2 with about 88% capacitance retention over 10 000 cycles. The fabrication technique illustrated in this work provides a strategic approach to fabricate micro-scale energy storage devices compatible with silicon electronics and offering ultimate miniaturization capabilities.

There is currently an increasing demand for compact and efficient energy storage solutions to match the rapid development of portable and wearable electronic products.1–5 Miniaturized supercapacitors, as compared to battery technologies, are a preferable solution as they have an ultrafast charge/discharge capability, a high power density, and a long operating life.6,7 However, conventional supercapacitors may suffer from liquid electrolyte leakage and incompatibility with miniaturization.8 All-solid-state supercapacitors, fabricated entirely in solid materials with ionic or gel electrolytes and ultrathin electrodes, can fill the energy supply gap for portable electronic products, due to their lightweight, high safety, leak-free solid electrolyte, and possibility for integration into miniaturized electronics.9–12 Packed with electrolytes in a solid form, the all-solid-state supercapacitors can also operate over a wide temperature range without suffering from issues such as freezing or boiling of the electrolyte, ensuring therefore superior reliability.

The carbon-based materials, and specifically graphene, are promising candidates as electrodes for supercapacitors, surviving potentially millions of charge and discharge cycles.13–15 Graphene has been intensively investigated for various energy storage devices,16–18 but the use of graphene in the all-solid-state supercapacitors has not been investigated sufficiently,19–24 due to limitations in the availability of a large-scale high-quality graphene on the one hand, and to the difficulties related to the transfer of graphene powders to the substrate/device location, which results in cumbersome fabrication as well as poor reliability on the other hand. These challenges have urged the search for more reliable fabrication methods to obtain graphene on the substrate without further handling, e.g., transfer-free graphene on silicon substrates.

We use here a thin film based technique to grow graphene directly on the silicon substrates through the use of epitaxial silicon carbide, to fabricate the all-solid-state supercapacitors on silicon. We have recently introduced a graphitization process using a sole nickel catalyst on SiC layers to simultaneously amplify the extent of accessible surface area for ion diffusion.25 In this paper, we devise the all-solid-state supercapacitors with graphene thin film derived from epitaxial SiC on silicon using a gel electrolyte, demonstrating promising performance and capacitance retention upon cycling. Although not flexible for mechanical bending or roll-up, this technique offers unique opportunities for miniaturization and wafer-level fabrication, compatible with silicon technology and allowing scaling up to industrial production. The additional benefits of this approach include a binder-free electrode, as binders are not required to adhere graphene to the substrate, improve conductivity and device performance, and excellent adhesion to the substrate through selective and direct graphene growth from a solid source.26 Finally, this approach could potentially be also extended to fabricate three-dimensional electrode structures, with a further enhancement in the energy density.19 

A 4-in. (100 mm in diameter) p-type Si(100) wafer with an epitaxial layer of cubic SiC (∼500 nm in thickness) was purchased from NOVASIC (France) and used as received. The 3C-SiC/Si wafer was diced into 1 × 2 cm2 slides as the substrates and reference materials. A nickel metal layer was sputtered onto these 3C-SiC/Si slides by using a DC Ar+ ion sputterer with a deposition current of 100 mA at a base pressure of 8 × 10−2 mbar for 20 s. The sputtered wafer slides were annealed at 1100 °C at a temperature ramping rate of 35 °C min−1 for 1 h under vacuum in a commercial horizontal tube furnace (Carbolite STF 15/450). The produced graphene samples were immersed into a Freckle solution (70:10:5:5:10%–85% H3PO4:Glacial acetic acid:70% HNO3:50% HBF4:H2O) for 6 h to remove silicides and unreacted metal.

The mechanism behind the synthesis of graphene on 3C-SiC/Si wafers was detailed in our previous publication.25 Briefly, at high temperature (1100 °C), nickel diffuses into the SiC layer and assists the dissociation of Si-C bonds,27,28 forming silicides, releasing graphitic carbon above the SiC layer, and simultaneously creating a highly rugged underlying surface. The graphitic carbon then forms graphene, and the roughened SiC surface is thus coated with graphene possessing an enhanced and highly accessible surface area. Freckle wet etching for 6 h removes the reacted metal layer and retains the formed graphene on the 3C-SiC/Si substrate. The samples are then cleaned with deionized water and dried.

The X-ray Photoelectron Spectrometry (XPS) analysis of the graphene samples is exhibited in Figures 1(a) and 1(b). The XPS survey scan of the sample indicates three major bindings of C1s, Si2s, and Si2p, which identify the presence of carbon and silicon and the complete removal of the metal layer. We also observe minor oxidation on the sample, as evidenced with the existence of the O1s peak, and this is very likely due to the Freckle etching process where nitric acid is used. The high-resolution XPS spectrum of the C1s peak can be deconvoluted into two fitting peaks, as shown in Figure 1(b). The peak at ∼284 eV can be identified as the enriched graphenic C-C bonds from graphene, while the other peak at ∼283 eV is associated with the carbidic Si-C bonds from the SiC layer. Note that the graphenic C-C peak is considerably more intense than the Si-C peak, indicating the location of graphene growth above the epitaxial SiC layer (∼500 nm thick).

FIG. 1.

(a) XPS survey scan of the graphene sample; (b) high-resolution XPS spectrum of the C1s peak; and (c) Raman spectrum of the graphene sample. The inset shows a magnified view of D, G, and 2D peaks. (d) A SEM image showing the graphene sample surface with a dense pitting pattern.

FIG. 1.

(a) XPS survey scan of the graphene sample; (b) high-resolution XPS spectrum of the C1s peak; and (c) Raman spectrum of the graphene sample. The inset shows a magnified view of D, G, and 2D peaks. (d) A SEM image showing the graphene sample surface with a dense pitting pattern.

Close modal

Figure 1(c) shows the Raman spectrum of the graphene sample in a broad range of 400–3000 cm−1. The peak at ∼520 cm−1 is allocated to the Si wafer, while two Raman peaks at 796 and 970 cm−1 are ascribed to the TO and LO modes of the epitaxial 3C-SiC layer.29 Another three Raman peaks are located at 1352, 1583, and 2706 cm−1, and they are assigned to the D, G, and 2D bands, respectively, as seen in a magnified view (inset, Figure 1(c)). The D peak relates to the broken symmetry of the sp2 carbon network, the G band is marked as the E2g mode of phonon vibration, and the 2D band is referred as an overtone of the D band.30,31

The Scanning Electron Microscopy (SEM) image of our graphene sample is shown in Figure 1(d). Unlike the reference 3C-SiC/Si sample, which possesses rectangular hillocks due to the stacking faults with twofold symmetry on (100) surface,25,32 the graphene sample demonstrates a rugged surface with a dense pitting pattern across the whole area. During the graphitization process, nickel intrudes the SiC surface creating a highly rugged topography, while graphene is simultaneously grown on the roughened SiC surface.

We fabricated all-solid-state supercapacitor cells directly with two identical graphene samples (1 × 2 cm2) face-to-face using a layer of a gel electrolyte in a two-electrode configuration without a separator. The working area (1 × 1 cm2) was defined by using insulating fill-in components (0.5 mm thick). The gel electrolyte was prepared by mixing 0.03 g of fumed silica and 1.0 g of the ionic liquid, 1-butyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide ([BMIM][NTf2]) and filled onto the working area. Titanium foils were used to make electrical connections between the electrodes and the testing equipment. The whole all-solid-state cell was sealed by a Kapton tape about 2 h prior to the measurements. The cell with reference 3C-SiC/Si was fabricated in the same configuration. The Cyclic Voltammetry (CV) curves of both graphene and reference 3C-SiC/Si electrodes are shown in Figures 2(a) and 2(b). The graphene electrode exhibits a quasi-rectangular shape at various scanning rates throughout a potential window of 2 V, verifying a double-layer behaviour with high reversibility. The reference 3C-SiC/Si electrode shows CV curves with a similar shape, but much smaller responsive current density, implying inferior performance.

FIG. 2.

CV curves of (a) graphene and (b) reference 3C-SiC/Si electrodes at scan rates of 10, 20, 50, and 100 mV s−1. Galvanostatic charge and discharge curves of (c) graphene and (d) reference 3C-SiC/Si electrodes at current densities of 10, 20, and 30 μA cm−2. (e) Specific area capacitance of graphene vs. reference 3C-SiC/Si. (f) Cycling performance of graphene electrode in the all-solid-state cell at a current density of 10 μA cm−2 over 10 000 cycles.

FIG. 2.

CV curves of (a) graphene and (b) reference 3C-SiC/Si electrodes at scan rates of 10, 20, 50, and 100 mV s−1. Galvanostatic charge and discharge curves of (c) graphene and (d) reference 3C-SiC/Si electrodes at current densities of 10, 20, and 30 μA cm−2. (e) Specific area capacitance of graphene vs. reference 3C-SiC/Si. (f) Cycling performance of graphene electrode in the all-solid-state cell at a current density of 10 μA cm−2 over 10 000 cycles.

Close modal

To quantify the specific area capacitance, galvanostatic charge and discharge curves of graphene and reference 3C-SiC/Si are demonstrated in Figures 2(c) and 2(d). In typical charge and discharge processes, both graphene and reference samples show triangular-shaped curves with no obvious IR drop at current densities of 10, 20, and 30 μA cm−2. This again confirms the excellent double-layer characteristics of both electrodes in the all-solid-state test cell. The specific area capacitance is calculated as per the following equation in a two-electrode configuration:33 

(1)

where C is the specific area capacitance (μF cm−2) of the electrode, I is the current density (μA cm−2) applied to the galvanostatic charge and discharge process, Δt is the discharge time (t), and ΔU is the potential window (2 V). The area capacitance of graphene and the reference 3C-SiC/Si are plotted in Figure 2(e) at current densities of 3 through to 100 μA cm−2. It is clear that the graphene electrode outperforms the reference 3C-SiC/Si electrode at all current rates, and the highest capacitance of 174 μF cm−2 can be obtained at 3 μA cm−2, three times of the capacitance (56 μF cm−2) of the reference 3C-SiC/Si electrode at the same current density. Even at a high current density of 100 μA cm−2, the graphene electrode can yield a satisfactory capacitance of 59 μF cm−2, demonstrating high-rate capability. We credit the excellent overall performance of the graphene electrode to its considerable double-layer capacitance over the reference electrode, and its highly accessible surface area for shorter ion diffusion, which has been discussed in detail in our previous work.25 The cycling performance of graphene electrode in the all-solid-state cell is shown in Figure 2(f), with a capacitance retention rate of 88% after 10 000 continuous cycles.

To investigate the performance degradation mechanism upon long-term cycling, we carried out additional SEM observations to compare the surface morphology changes of the graphene thin film electrode before and after the cycling test (10 000 cycles). It is clear that prior to any test, graphene is distributed on roughed 3C-SiC surface with the pitting pattern from the graphitization process (Figure 3(a)). After cycling, enhanced pitting is observed in Figure 3(b), and we attribute this phenomenon to the repeated ion adsorption and desorption to the electrode surface, causing damage on the surface topography. This damage may lead to the discontinuity of graphene film on certain sites and obstruct the ion diffusion path to the accessible surface area. Nevertheless, most of the electrode surface is still well maintained during the prolonged cycling test to achieve capacitance retention around 90%.

FIG. 3.

SEM images of graphene thin film electrode (a) before and (b) after the cycling test.

FIG. 3.

SEM images of graphene thin film electrode (a) before and (b) after the cycling test.

Close modal

Potentiostatic electrochemical impedance spectroscopy was performed at the open circuit potential to assess the internal resistance of the all-solid-state supercapacitor cell. The frequency range was set to be 0.01 Hz to 100 kHz with an alternating current amplitude of 10 mV. The obtained Nyquist plots of graphene and reference 3C-SiC/Si electrodes are shown in Figure 4. Both the plots show a very steep behaviour in the low frequency region, suggesting good capacitor behavior. The intercept at the real part axis refers to equivalent series resistance and is an indication of the bulk electrolyte resistance. Both cells show a similar electrolyte resistance of ∼110 Ω, due to the relatively low ionic conductivity of the gel electrolyte compared to conventional aqueous electrolytes. However, this gel electrolyte can extend the potential window to 2 V and further improve the energy density of the all-solid-state supercapacitors. The diameter of the semicircle on the Nyquist plots in the high frequency region indicates the charge transfer resistance of the electrodes. The graphene electrode exhibits a small semicircle, barely observable in the inset, while the reference electrode reveals a much larger semicircle, thus a substantially larger charge transfer resistance for the reference sample (Figure 4). We ascribe this difference to the fact that graphene is a highly conductive active material. Moreover, graphene obtained through the discussed selective and direct growth also provides excellent adhesion to the substrate, eliminating the need for binders. Binders would typically improve the electrode/substrate adhesion but also would degrade the electrode conductivity; so, this method allows for maximum benefit in terms of lowering the charge transfer resistance and thus increased performance.

FIG. 4.

Nyquist plots of graphene and reference 3C-SiC/Si electrodes in all-solid-state cells. The inset shows a magnified view of the plots in the high frequency region.

FIG. 4.

Nyquist plots of graphene and reference 3C-SiC/Si electrodes in all-solid-state cells. The inset shows a magnified view of the plots in the high frequency region.

Close modal

In conclusion, this work reports the all-solid-state graphene thin film supercapacitors on silicon substrates with a capacitance of up to 174 μF cm−2 and capacitive retention of 88%, and opens opportunities for implementation as on-chip miniaturized supercapacitors. This represents a viable route for energy storage devices embedded in integrated circuits on silicon. Such supercapacitors offer a very promising alternative to metal–ion batteries, thanks to faster charge/discharge rates, their lightweight and safer operation for future portable devices with a small form factor.

F.I. is the recipient of an Australian Research Council Future Fellowship (FT120100445). Support from the AFOSR through the Grant No. AOARD 15IOA053, as well as infrastructure support through the Australian National Fabrication Facility (ANFF), is also acknowledged.

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