We demonstrate the ability to orient, position, and transport microchips (“chiplets”) with electric fields. In an open-loop approach, modified four phase traveling wave potential patterns manipulate chiplets in a dielectric solution using dynamic template agitation techniques. Repeatable parallel assembly of chiplets is demonstrated to a positional accuracy of 6.5 μm using electrodes of 200 μm pitch. Chiplets with dipole surface charge patterns are used to show that orientation can be controlled by adding unique charge patterns on the chiplets. Chip path routing is also demonstrated. With a closed-loop control system approach using video feedback, dielectric, and electrophoretic forces are used to achieve positioning accuracy of better than 1 μm with 1 mm pitch driving electrodes. These chip assembly techniques have the potential to enable future printer systems where inputs are electronic chiplets and the output is a functional electronic system.

Current micro-electronics manufacturing technologies rely largely on batch processing to create many identical devices cost effectively. While this has proved an extremely successful approach in many areas, it does not adequately address applications that require short runs, customization, or distribution of functionality over large areas. If it were possible to formulate micro-components or micro-building blocks into functional micro-objects, or “chiplets,” that could then be organized and assembled as readily as laser printers place toner particles onto paper, then highly customized, application-specific micro-scale systems could be generated. In this report, we demonstrate a method for achieving an essential component of the technology that is needed to realize such an envisioned systems (illustrated in Ref. 1). Electric fields are used to reliably and accurately transport, position, and orient micro-objects dispersed in a non-polar carrier fluid by using a dynamic electric field template, in open loop manipulation (as in a directed assembly process), or with improved accuracy by close loop manipulation.

Massive parallel organization of randomized particles into a designated pattern is an essential aspect of printing techniques such as laser printing or xerography.2 Directed assembly has previously been proposed as a micro-electronics manufacturing method and various demonstrations have been presented.3–11 Directed assembly typically involves two major processes: creating a static template of charge,3 shape,4–6 hydrophobicity,5 magnetic field,7 or other physical property such that the final assembly configuration represents an energy minimum, and applying some form of agitation to prevent the system from becoming trapped in local minima, moving the objects towards their desired pre-defined positions.

Our goal is to create a system that can digitally convert a design to a physical placement of micro-objects where the final pattern is defined only though software. This requires a dynamic template to be used that can rapidly and controllably change to guide the chiplets to any arbitrary desired position on a surface. The agitation process is as important to directed assembly as the template creation process, yet this is a less studied topic as most prior mesoscopic directed assembly rely on simple, but limited, macroscopic mechanical shaking. In this work, we use the same mechanism for both template generation and agitation. This allows for iterative control of the objects, leading to more precise positioning as well as the ability to correct point defects and enable high yields, essential for any electronic system. The result is a platform capable of studying the fundamentals of a chip agitation process, providing a level of control analogous to controlling temperature and Brownian motion in an atomic scale assembly process.

We chose to explore using electric fields to generate the dynamic template because such fields can be readily engineered using simple conductive electrodes or controlled by thin film transistors similar to active-matrix backplanes used for driving electrophoretic displays.12–14 Manipulation of small objects by electrodes in water based solutions has been demonstrated before,8 where chiplets are believed to be driven by electrophoretic force as well as fluid motion from electro-osmotic flow. Using fluid flow alone to manipulate micro-objects has also been demonstrated.6,15,16 Acting on a spring attached micro Si plate, Reference 17 shows that both repulsive and attractive manipulation forces can be achieved using electro-static potentials. We demonstrate here that using a dielectric carrier fluid that allows for long-range Coulomb interactions, and a chemically charged chiplet surface, we can manipulate these objects with both dielectrophoretic and electrophoretic forces such that both attraction and repulsion are accessible. Furthermore, chiplet orientation can be controlled through chemical patterning of the chiplet surface, removing the typical ambiguity of two-fold symmetry that is inherent in a rectangular shape.

In order to induce electrostatic charges onto the chips in the non-polar carrier fluid (isopar M), a method was used similar to that that for charging particles in some electrophoretic display technologies,18,19 liquid toners,20 and layer-by-layer assembly from non-polar liquids.21 Inverse micelles are created in the carrier fluid though addition of a surfactant or charge control agent. Here, sodium dioctyl sulfosuccinate (Aerosol-OT or AOT)] is used. Interaction of these micelles with the surface of particles dispersed in solution has been shown to induce a charge imbalance on the particle through mechanisms including acid-base chemistry,22 variations in interaction cross-section between charged micelles and the particle,23 and combinations of these depending on surfactant concentration.24 As such, using micelle mediated charging, it should be possible to controllably charge the chiplets through its surface chemistry. Specifically, we found that controlling the hydrophobicity of a dielectric surface can conveniently control the sign of the induced charge (apparent negative charge for a hydrophobic surface and positive charging for a hydrophilic surface1,25). Further experimental details to confirm the charging process used in this report can be found in Ref. 1.

A process flow for forming the experimental chiplet inks used in this report is shown in Figure 1. Key to fabricating the chiplet is the use of a process that allows for the generation of small silicon objects with metal interconnects and a surface energy pattern (either mono or bi-polar) that will facilitate charging when submerged into carrier fluid. The experimental chiplets are fabricated using standard micro-fabrication processes which are compatible with CMOS chips, as the steps can be applied as post processes to CMOS wafers received from a typical foundry. Further details of the process can be found in Ref. 1.

FIG. 1.

Chiplet fabrication process. (a) Process flow used for the fabrication of the solution-based chip ink used in the xerographic micro-assembler. (b) Chips after singulation and prior to release (scale bar = 200 μm). (c) Completed released resistor chiplet (scale bar = 100 μm). (d) Completed released resistor chiplet showing condensation of water on the chip demonstrating surface energy contrast (scale bar = 100 μm). (e) SEM image of resistor chiplet (scale bar = 100 μm).

FIG. 1.

Chiplet fabrication process. (a) Process flow used for the fabrication of the solution-based chip ink used in the xerographic micro-assembler. (b) Chips after singulation and prior to release (scale bar = 200 μm). (c) Completed released resistor chiplet (scale bar = 100 μm). (d) Completed released resistor chiplet showing condensation of water on the chip demonstrating surface energy contrast (scale bar = 100 μm). (e) SEM image of resistor chiplet (scale bar = 100 μm).

Close modal

Fixed spatial pattern electrodes were used to study the essential fundamental operations: transport, anneal-and-position to a designated location, and clamp/rinse/dry (Figure 2). The electrostatic potentials created in these electrodes, while limited in spatial patterns, are rich in temporal patterns. For each of the four spirals, there are four non-crossing metal lines, controlled by ± 400 V amplifiers driven by a computer (Figure S4 of Ref. 1). An insulating spacer layer as shown in Figure S3(a) (Ref. 1) is placed above the electrode array and the chiplets in ink are poured onto the surface. After applying a sequence of potentials to the electrodes, generating a combination of electrophoretic and dielectrophoretic forces on the chiplets, they are transported from their initial random positions towards their desired final position at the center of the spirals. In the first 30 s of the assembly process (Figure 2(c)) long distance chiplet transport is demonstrated by applying a modified 4-phase traveling wave (TW) potential sequence to the four isolated electrodes,1,26 reducing the chiplet distance to the final destination from >1 mm to <200 μm (Figure S5 of Ref. 1). Using a straightforward TW potential sequence (which creates a moving potential well moving monotonically towards the center) leads to more than half of the transport attempts failing, primarily by stiction and missteps. This is overcome by introducing higher frequency jittering/pseudo-random movement of potential well sizes and positions, enabling highly reliable transport. The non-monotonic behavior displayed in Figure 2(c) reflects the chiplet response to these electronic agitations. These pseudo-random movements of potential wells provide a physical annealing process in which the chiplets are excited initially far from equilibrium so that they can avoid being locked into undesired potential minima. As the movements are reduced, either globally or in a chiplet-specific manner, each chiplet stochastically converges on its lowest energy location in a manner similar to temperature profile control in crystal growth.

FIG. 2.

Image development process based on directed assembly. (a) Initial chiplet location (indicated by red arrows). (b) Final positions after assembly process (scale bar = 1 mm). (c) Time evolution of distances of chiplet center to the final designated assembly site. Curves Q1 through Q4 represent chiplets assembled to the four quadrants. (d) Experimental setup to demonstrate chip orientation control with charge patterns (scale bar = 200 μm). (e) Chiplet orientation time series: black curve is the video extracted orientation. Red line shows when the +90° or −90° commanding waveforms are applied. (Multimedia view) Movie S1 for (a) and (b): [URL: http://dx.doi.org/10.1063/1.4891957.1] Movie S2 for (d): [URL: http://dx.doi.org/10.1063/1.4891957.2]

FIG. 2.

Image development process based on directed assembly. (a) Initial chiplet location (indicated by red arrows). (b) Final positions after assembly process (scale bar = 1 mm). (c) Time evolution of distances of chiplet center to the final designated assembly site. Curves Q1 through Q4 represent chiplets assembled to the four quadrants. (d) Experimental setup to demonstrate chip orientation control with charge patterns (scale bar = 200 μm). (e) Chiplet orientation time series: black curve is the video extracted orientation. Red line shows when the +90° or −90° commanding waveforms are applied. (Multimedia view) Movie S1 for (a) and (b): [URL: http://dx.doi.org/10.1063/1.4891957.1] Movie S2 for (d): [URL: http://dx.doi.org/10.1063/1.4891957.2]

Close modal

Once the chiplets reach the center 200 μm of the spiral, the attraction and annealing potentials are applied. This occurs between 30 and 65 s as shown in Figure 2(c). Again, in principle, a simple attractive field can be applied to the two center landing electrodes, but this often results in unsuccessful or partial assembly. Various alternating potentials are applied to both the two center landing electrodes and the two side electrodes causing movements of the potential well which induces momentum transfer to the chiplets. The effects can be observed from the non-monotonic decrease in the chiplet center distance. With this “virtual annealing,” the transport and assembly operations are highly reliable. We are able to move chiplets in, fix them to the landing sites, move them out again with reversed TW potential sequences and repeat this process continuously (>5 times).

After 65 s, once the chiplets have converged to their final assembly sites, a high frequency (>100 Hz) AC potential is applied to the two center landing electrodes of each spiral to dielectrophoretically hold chiplets in position while the dielectric fluid is flushed, and the chiplets dried in preparation for transfer to a final substrate.

With a charge pattern applied to the surface of a chiplet, shown schematically in Figure 2(d), it is possible to assemble it with specific orientation, without 2-fold degeneracy. While in the center position (with the charge patterned side of the chip facing the electrodes), two potential sequences are used to manipulate the chiplet; one designed to orient −90° by its charge encoded dipole moment and the other sequence designed for opposite orientation (+90°). A combination of six +90° and −90° potential series (orientation commands) and the response shown in Figure 2(e) unambiguously demonstrate chiplet alignment to the desired orientation according to the dipole charge pattern encoded on the surface, not their initial orientation. Between commands, all electrodes are held at 0 V to ensure each commanding potential sequence is isolated. Similar to Figure 2(e), using dynamic template agitation to create bifurcating chiplet motion paths that are sensitive to the chiplet surface charge pattern is essential for this demonstration. Applying simple static polarizing electric field on the template, we have never observed chiplets to rotate 180° to match surface charge pattern and polarization field. When using the same commanding sequence on a control chiplet without a dipole charge pattern no orientation aligning effect was observed.

To demonstrate our capability to manipulate chiplets following an arbitrary designated route, we built a 4 × 4 array of circular electrodes driven by 16 control amplifiers (Figure 3). A chiplet can be dielectrophoretically trapped on the grid by applying a 300 V AC potential at 100 Hz between the two adjacent electrodes. By sequentially applying that AC potential to different adjacent pairs of electrodes, it can be made to follow arbitrary paths around the grid. This has been demonstrated both for one chip (Figure 3(a) and Movie S3), as well as two chips simultaneously (Figure 3(b) and Movie S4). The ability to drive multiple chips along arbitrary paths enables one to position and orient chiplets with an initially random distribution, to final positions with a density determined by the electrode spacing, and the total chiplet count determined by the size of the grid.

FIG. 3.

(a) Single chiplet following an arbitrary path on a 4 × 4 electrode array (scale bar = 1 mm). (b) Two chiplets simultaneously manipulated on the array. (c) Video frame of a closed-loop chiplet manipulation experiment showing extracted center position (green dot), orientation (green line). The red dot and line denote the set point (scale bar = 200 μm). (d) Time evolution of chiplet position and orientation, showing measured location and orientation (black curve) and corresponding set points (red curve). (Multimedia view) Movie S3 for (a): [URL: http://dx.doi.org/10.1063/1.4891957.3] Movie S4 for (b): [URL: http://dx.doi.org/10.1063/1.4891957.4] Movie S5 for (c): [URL: http://dx.doi.org/10.1063/1.4891957.5]

FIG. 3.

(a) Single chiplet following an arbitrary path on a 4 × 4 electrode array (scale bar = 1 mm). (b) Two chiplets simultaneously manipulated on the array. (c) Video frame of a closed-loop chiplet manipulation experiment showing extracted center position (green dot), orientation (green line). The red dot and line denote the set point (scale bar = 200 μm). (d) Time evolution of chiplet position and orientation, showing measured location and orientation (black curve) and corresponding set points (red curve). (Multimedia view) Movie S3 for (a): [URL: http://dx.doi.org/10.1063/1.4891957.3] Movie S4 for (b): [URL: http://dx.doi.org/10.1063/1.4891957.4] Movie S5 for (c): [URL: http://dx.doi.org/10.1063/1.4891957.5]

Close modal

For the set of experiments described thus far chiplets are manipulated in an open-loop mode, similar to directed assembly processes, as the applied potential sequences are pre-defined and are not adjusted in any way with information of their location. This strategy has the advantages of simple hardware requirements and negligible computing resources and so readily scales to a massively parallel system for assembling orders of magnitude more chips. For higher positioning accuracy and error correction, a closed-loop feedback strategy is necessary.14,15 In order to demonstrate this, a 4-electrode setup for fine position and orientation control with optical camera and image processing (60 FPS) was used (Figure 3(c), and Movie S5). Actual positions and orientations are compared to set points and fed into a proportional-integral (PI) controller implemented in LabView to control the voltages applied to the four electrodes (Figure 3(d)). Using this setup, final position accuracy can be achieved down to the limit imposed by the camera resolution (about 1 μm).

To understand the reliability and accuracy of the positioning process, we performed several tens of positioning manipulations with both the open-loop and feedback control approaches. For open-loop experiments, chiplets are first dropped in and transported to the center position as shown in Figure 2. After the final position is recorded by the camera, we either transport out the chiplets to outer spirals by applying the modified TW waveform in reverse order, or we simply wash out the chiplets and drop in new ones. The process is repeated to record new data. Similarly, for closed-loop experiments, the process shown in Figure 3(c) is either repeated by using the same chiplet with a new set position or a new chiplet is dropped in. As shown in Figure 4, for open-loop manipulation, the standard deviation is approximately 5 μm, which is acceptable for applications where high density interconnects are not necessary. For feedback control, the standard deviation shows that the accuracy can be improved to better than 1 μm, which enables very high density interconnects to be used.

FIG. 4.

Chiplet assembly accuracy. (a) Open loop: Histogram of deviation of chiplet center to designated location of 77 assembly events. (b) Closed loop: Histogram of chiplet center to set point deviation of 69 trials.

FIG. 4.

Chiplet assembly accuracy. (a) Open loop: Histogram of deviation of chiplet center to designated location of 77 assembly events. (b) Closed loop: Histogram of chiplet center to set point deviation of 69 trials.

Close modal

In summary, we have demonstrated a method for accurate and controlled digital manipulation of micro-objects using electric fields, an essential foundation for realizing an envisioned “chiplet printer.”1 An IC compatible, post-processing technique is used to formulate a chiplet ink, composed of micrometer sized Si chips with chemically induced charge or charge patterns immersed in dielectric fluid. These chiplets can be manipulated by an electric field to perform fundamental operations such as transport, positioning, and orienting. Both open-loop and close-loop control methods have been demonstrated and the positioning accuracy can be improved from 6.5 μm for open-loop method to less than 1 μm for the closed-loop method. This work provides a foundation from which larger arrays of micro-objects can be rapidly digitally assembled using a print-like process to address multiple unconventional electronics applications.

We thank Dr. Lara Crawford, Professor Benjamin Shapiro (University Maryland) and Dr. Jason M. Spruell (University of California, Santa Barbara) for many useful discussions and F. Endicott for assistance with microscopy. This work was partially supported by a NSF CMMI Grant (No. 1100872) and a DARPA STO Contract (W91CRB-12-C-006).

1.
See supplementary material at http://dx.doi.org/10.1063/1.4891957 for additional information, experimental detail description and movies associated with figures.
2.
L. B.
Schein
,
Electrophotography and Development Physics
(
Laplacian Press
,
1996
).
3.
J.
Tien
,
A.
Terfort
, and
G. M.
Whitesides
,
Langmuir
13
,
5349
5355
(
1997
).
4.
A. K.
Verma
,
M. A.
Hadley
,
H. J.
Yeh
, and
J. S.
Smith
, in
Proceedings of 45th Electronic Components and Technology Conference
(
1995
), pp.
1263
1268
.
5.
K. S.
Park
,
X.
Xiong
,
R.
Baskaran
, and
R. K. F.
Böhringer
, in
Proceedings of IEEE 23rd International Conference on Micro Electro Mechanical Systems (MEMS)
(
2010
), pp.
504
507
.
6.
M. T.
Tolley
,
M.
Krishnan
,
D.
Erickson
, and
H.
Lipson
,
Appl. Phys. Lett.
93
,
254105
(
2008
).
7.
Q.
Ramadan
,
Y. S.
Uk
, and
K.
Vaidyanathan
,
Appl. Phys. Lett.
90
,
172502
(
2007
).
8.
C. F.
Edman
,
R. B.
Swint
,
C.
Gurtner
,
R. E.
Formosa
,
S. D.
Roh
,
K. E.
Lee
,
P. D.
Swanson
,
D. E.
Ackley
,
J. J.
Coleman
, and
M. J.
Heller
,
IEEE Photonics Technol. Lett.
12
(
9
),
1198
(
2000
).
9.
W.
Zheng
and
H. O.
Jacobs
,
Adv. Mater.
18
,
1387
1392
(
2006
).
10.
S. W.
Lee
and
R.
Bashir
,
Adv. Mater.
17
,
2671
2677
(
2005
).
11.
M.
Mastrangeli
,
S.
Abbasi
,
C.
Varel
,
C.
Van Hoof
,
J.-P.
Celis
, and
K. F.
Böhringer
,
J. Micromech. Microeng.
19
(
8
),
083001
(
2009
) and references therein.
12.
A. C.
Arias
,
S. E.
Ready
,
R.
Lujan
,
W. S.
Wong
,
K. E.
Paul
,
A.
Salleo
,
M.
Chaninyc
,
R.
Apte
, and
R. A.
Street
,
Appl. Phys. Lett.
85
,
3304
(
2004
).
13.
Y.
Chen
,
K.
Denis
,
P.
Kazlas
, and
P.
Drzaic
, in
SID 01 Digest
(
2001
), p.
157
.
14.
J. H.
Daniel
,
B. S.
Krusor
,
N.
Chopra
,
R. A.
Street
,
P. M.
Kazmaier
,
S. E.
Ready
, and
J. H.
Ho
,
MRS Proc.
808
,
A10.8
(
2004
).
15.
P. P.
Mathai
,
P. T.
Carmichael
,
B. A.
Shapiro
, and
J. A.
Liddle
,
RSC Adv.
3
,
2677
2682
(
2013
).
16.
R.
Probst
,
Z.
Cummins
,
C.
Ropp
,
E.
Waks
, and
B.
Shapiro
,
IEEE Control Syst.
32
,
26
(
2012
).
17.
S.
Hoen
,
Q.
Bai
,
J. A.
Harley
,
D. A.
Horsley
,
F.
Matta
,
T.
Verhoeven
,
J.
Williams
, and
K. R.
Williams
, in
IEEE Transducers
(
2003
), p.
344
.
18.
B.
Comiskey
,
J. D.
Albert
,
H.
Yoshizawa
, and
J.
Jacobson
,
Nature
394
,
253
255
(
1998
).
19.
S. W.
Oh
,
C. W.
Kim
,
H. J.
Cha
,
U.
Pal
, and
Y. S.
Kang
,
Adv. Mater.
21
,
4987
4991
(
2009
).
20.
S.
Reuter
and
S.
Franke
,
J. Imaging Sci. Technol.
48
,
319
323
(
2004
).
21.
K. E.
Tettey
,
M. Q.
Yee
, and
D.
Lee
,
Langmuir
26
,
9974
9980
(
2010
).
22.
S.
Poovarodom
and
J. C.
Berg
,
J. Colloid Interface Sci.
346
,
370
377
(
2010
).
23.
G. S.
Roberts
,
R.
Sanchez
,
R.
Kemp
,
T.
Wood
, and
P.
Bartlett
,
Langmuir
24
,
6530
6541
(
2008
).
24.
Q.
Guo
,
J.
Lee
,
V.
Singh
, and
S. H.
Behrens
,
J. Colloid Interface Sci.
392
,
83
89
(
2013
).
25.
P. G.
Smith
, Jr.
,
M. N.
Patel
,
J.
Kim
,
T. E.
Milner
, and
K. P.
Johnston
,
J. Phys. Chem. C
111
,
840
848
(
2007
).
26.
Y. N.
Gartstein
and
J. G.
Shaw
,
J. Phys. D: Appl. Phys.
32
,
2176
2180
(
1999
), and references therein.

Supplementary Material