Au-gated SrTiO₃ field-effect transistors with large electron concentration and current modulation

Strong electron-electron interactions in complex oxide crystals give rise to many interesting emergent phenomena such as high-T_c superconductivity, metal-insulator transitions, and colossal magnetoresistance.^1–4 Reversible control of such phenomena by changing the carrier concentration using a field-effect is a promising pathway for tuning electron correlations and for using these materials for practical applications.^5–11 Realizing such devices is, however, challenging because the carrier concentration modulation needed to change correlated electron behavior is of the order of ∼10¹⁴cm⁻² and greater.^5–10 This concentration modulation is almost one order higher than the modulation typically achieved in traditional semiconductors, and therefore puts stringent requirements on the gate dielectric design. To modulate large carrier concentrations, the gate dielectric should have a large dielectric constant (large capacitance), low leakage and large breakdown field. Ionic liquids can satisfy all these conditions and have been used widely to modulate complex oxide properties.^7–10 However, ions have large mass and respond quite slowly to applied electric fields. As a result, transistors with ionic liquids as gate dielectrics can operate only at very low frequencies.¹² For practical applications, higher modulation frequencies are required and metal gates are therefore needed. To achieve large carrier concentration modulation using metal gates, we can use high-k oxides such as SrTiO₃ as the gate dielectric. In addition to having a high room temperature dielectric constant of ∼300, SrTiO₃ also has a large bandgap (∼3.2 eV) and, therefore, a large breakdown strength. Recently, electron concentration modulation of ∼1.1 ×10¹⁴ cm⁻² of a two-dimensional electron gas at the SrTiO₃/GdTiO₃ interface was reported using SrTiO₃ as a gate dielectric with Pt as the gate metal.¹³ 

In this work, using a higher Schottky-barrier height metal Au as gate in SrTiO₃ metal-semiconductor field effect transistors (MESFETs), we improve the electron concentration modulation to ∼1.6 × 10¹⁴cm⁻², almost by ∼50% compared to previous work.¹³ In this effort, we also improve the current density modulated in a SrTiO₃ MESFET by ∼20×, more than an order higher than earlier reports.¹³ On measuring the transistor characteristics of these FETs, we observe the pinch off voltage to be significantly larger than predicted by standard device physics. We ascribe this discrepancy to the presence of a low dielectric constant interfacial layer at the gate metal/SrTiO₃ interface. We also discuss the relative importance of the electric field-dependent dielectric constant of SrTiO₃ in increasing the pinch off voltage of the MESFET.

For fabricating the SrTiO₃ Schottky diodes and MESFETs, 160 nm thick SrTiO₃ thin films were grown on insulating (001) oriented (LaAlO₃)_0.3(Sr₂AlTaO₆)_0.7 (LSAT) substrates using hybrid molecular beam epitaxy (MBE). In this growth technique, Ti and O are provided using the organometallic precursor titanium tetra isopropoxide, and Sr is provided using an effusion cell. Additional O can be provided using an oxygen plasma source. However, for this study, oxygen plasma source was not used. The resultant oxygen deficient growth condition created vacancies, doping the sample with mobile electrons of concentration ∼10¹⁹cm⁻³. More details on the growth procedure and structural quality of grown epilayers have been reported elsewhere.^14–16 

Pt and Au gated diodes and MESFETs were fabricated on two halves of a grown sample. For isolating the devices, mesa etching was first performed using an inductively coupled plasma-reactive ion etching (ICP-RIE) system. A BCl₃/Ar plasma (45/5 sccm, 5 mTorr, 1000 W ICP, 75 W RIE) was used for etching. Subsequently, Al/Ni/Au (40/40/100 nm) ohmic contact metal stacks were deposited using e-beam evaporation. A contact resistance of ∼0.7 Ω-mm was extracted using transmission line measurements. An electron mobility of ∼5.3 cm²/V-sec and sheet electron concentration of ∼1.28 × 10¹⁴cm⁻² was obtained from Hall-effect measurements performed in a Van der Pauw geometry. This sheet electron concentration value is lower than the expected value of ∼1.6 × 10¹⁴cm⁻² because of surface depletion in the SrTiO₃ thin film.¹⁷ For a comparative gate stack study, Pt/Au (40/100 nm) and 160 nm Au was deposited by e-beam evaporation on the two samples, respectively. Prior to the Schottky metal deposition, Oxygen plasma treatment (20sccm, 333 mTorr, 16 W) of the SrTiO₃ surface was performed in a RIE system to reduce the gate leakage and improve rectification.¹⁸ No significant change in electron mobility and sheet electron concentration was observed in Hall-effect measurements done after the Oxygen plasma treatment.

For measuring the device characteristics, a Cascade probe station was used with a Keithley 4200 semiconductor characterization system. I-V characteristics of typical fabricated Pt and Au Schottky diodes are shown in Fig. 1(a). The characteristics shown are from 15 μm radius circular Schottky diodes. Clearly, both Pt and Au diodes exhibit rectifying characteristics. From the forward bias characteristics, the barrier height with Pt was found to be ∼0.87 eV with an ideality factor ∼1.46 and that of Au to be ∼1.01 eV with an ideality factor ∼1.57. In agreement with earlier reports, Au exhibits a larger Schottky barrier height with SrTiO₃ as compared to Pt, suggesting the greater charge modulation potential of Au gates.¹⁹ Both Schottky barrier height values in our devices are about ∼0.1 eV higher compared to the previous report.¹⁹ The reasons for this difference can be the lower doping in our samples that leads to lower image-force lowering and a different surface preparation recipe before the Schottky metal deposition. Capacitance-Voltage (C-V) measurements (frequency 100 kHz, signal amplitude 30 mV) of Pt and Au diodes are shown in Figs. 1(b) and 1(c), respectively. As a result of the large dielectric constant of SrTiO₃, high capacitance values of ∼2–3 μF/cm² are easily achievable in these diodes, suggesting the promise of SrTiO₃ as a gate dielectric for modulating large carrier concentrations.

The drain current-voltage I_ds-V_ds characteristics of a 1.85 μm gate length Au-gated MESFET are shown in Fig. 2(a). This figure shows that we are able to modulate 54 mA/mm current density or equivalently ∼1.28 × 10¹⁴cm⁻² of the electron concentration (as measured using Hall-effect) in SrTiO₃. This current density modulation is ∼20× times larger than the earlier reported values in SrTiO₃ MESFET.¹³ During measurement of V_gs-I_ds transfer characteristics of the MESFET shown in Fig. 2(b), a drain voltage of 10 V has been applied. This positive drain bias allows applying forward bias to the gate without causing gate leakage. Under this condition, we are able to modulate up to 68.6 mA/mm of current density or an equivalent carrier density of ∼1.62 × 10¹⁴cm⁻². This carrier density modulation is an improvement of almost ∼50% over the previous reported value.¹³ Also, the log scale V_gs-I_ds transfer characteristics in Fig. 2(b) show that we are able to achieve about 3 orders of ON/OFF current ratio and that the gate leakage current I_g is significantly lower than I_ds in the ON state. On reversing the scan direction of the gate voltage, we observe some hysteresis in I_g which is typical of metal/SrTiO₃ Schottky junctions. However, this hysteresis does not affect the modulation achieved in MESFET significantly. We are able to pinch off the MESFETs in both negative to positive and positive to negative scans of the gate terminal with more than two orders of ON/OFF current ratio.

From a linear fit to the $Ids$ vs V_gs characteristics of the MESFET, we extract a threshold voltage of −17.2 V. This corresponds to a measured pinch off voltage of $VPm$ = 17.2 + 1.01 V ∼ 18.2 V, where 1.01 V is the built-in bias (⁠$Vbi$⁠) due to the Au Schottky barrier. The expected value of the pinch off voltage can be calculated as²⁰ 

where $q$ is the electron charge, $ND$ = 10¹⁹cm⁻³ is the doping density, $d$ = 160 nm is the doped film thickness, $ε0$ is the vacuum permittivity, and $εr$ = 300 is the low field dielectric constant of SrTiO₃. The expected pinch off voltage $VP1$ as a function of doped SrTiO₃ film thickness is plotted in Fig. 3(b). For a film thickness of 160 nm, the calculated $VP1$ is ∼7.7 V. Clearly, the measured pinch-off voltage is much larger compared to the expected value. Two factors can contribute to this pinch off voltage increase: the field-dependent dielectric constant of SrTiO₃, and the presence of an interfacial low dielectric constant layer (so called dielectric dead layer) at the metal/SrTiO₃ interface.

The dielectric constant of SrTiO₃ decreases with the increase in applied electric field according to the empirical formula, $εr(E)=b/a+E2$⁠, where $a$ = 7.03 × 10¹⁵ V²/m², $b$ = 2.51 × 10¹⁰V/m are constants, and $E$ is the local electric field.^21,22 The pinch off voltage after including this effect is²³ 

$VP2$ as a function of the doped SrTiO₃ film thickness is also shown in Fig. 3(b). For 160 nm SrTiO₃ film thickness, $VP2$ ∼ 8.6 V. This pinch off voltage is still quite small compared to the measured pinch off voltage, suggesting the existence of some other factor responsible for increasing the pinch off voltage.

It is well known that the capacitance of thin film capacitors of high-k materials is smaller than expected and is usually ascribed to the presence of a thin interfacial layer with much lower dielectric constant compared to the bulk.^{13,21,24–26} Gauss's law requires the continuity of the displacement vector across the interface; because of the low dielectric constant of the interfacial layer, a large fraction of applied voltage drops across it (Fig. 4). If the interfacial layer thickness is small compared to the doped film thickness, the pinch off voltage of a MESFET with an interfacial layer of capacitance $Ci$ is calculated to be

where the first term is the voltage drop across the doped SrTiO₃ thin film and the second term is the voltage drop across the interfacial capacitance. To calculate $VP3$ for our MESFET device structure, we need an estimate of $Ci$⁠. Since this interfacial capacitance acts in series with the depletion capacitance, we can estimate its value from the reduction in measured capacitance of Au Schottky diodes compared to the expected capacitance value. The expected Schottky diode depletion capacitance is given as $Cd,ex(V)=qε0εrND/2V$⁠, where $V$ is the total voltage drop across the Schottky depletion region and for zero applied bias case, $V=Vbi$⁠.²⁰ For $εr$ = 300, $ND$ = 10¹⁹cm⁻³, and $V$ = 1.01 V, the expected zero bias capacitance for Au Schottky diode is ∼4.59 μF/cm². The measured zero bias capacitance value in Au Schottky diode is smaller ∼2.3 μF/cm², about half the expected value. The net capacitance is the series combination of $Ci$ and the depletion capacitance. However, the zero bias depletion capacitance value would be different from the expected value of 4.59 μF/cm², because part of the built-in voltage drops across $Ci$⁠. The modified depletion thickness in the presence of an interfacial capacitance layer can be expressed in terms of the total voltage drop across the device by inverting Eq. (3)

and the corresponding depletion capacitance would be given as $Cd(V)=ε0εr/d(V)$⁠. For zero applied bias case, $V$ = 1.01 V. Now, we have expressed $Cd(V)$ in terms of the interfacial capacitance $Ci$⁠. Solving, $Cd(V)Ci/(Cd(V)+Ci)$ = 2.3 μF/cm² for $Ci$⁠, we find the interfacial capacitance to be $Ci$ ∼ 2.66 μF/cm². The match between the measured capacitance and the series model $Cd(V)Ci/(Cd(V)+Ci)$ for the Au Schottky diode is shown in Fig. 3(a). Now, using Eq. (3), we can calculate the pinch off voltage $VP3$ when an interfacial layer with capacitance $Ci$ ∼ 2.66 μF/cm² is present. $VP3$ as a function of doped SrTiO₃ film thickness is shown in Fig. 3(b). For 160 nm film thickness, $VP3$ ∼ 17.3 V, quite close to the measured value of 18.2 V. This agreement with the measured value of the capacitance (Fig. 3(a)) and pinch off voltage (Fig. 3(b)) suggests that the interfacial layer is the main reason for the increase in the pinch off voltage of the MESFET, while the field dependent dielectric constant of SrTiO₃ plays only a minor role in the on-state characteristics.

Recently, it has been shown that these interfacial layers are a result of surface contamination that is insufficiently removed during room temperature gate metal processing.²⁵ These layers also affect the effective Schottky barrier height of the metal/SrTiO₃ interface and can therefore impact the reverse leakage currents.²⁵ It is therefore anticipated that with better processed and optimized metal electrodes, higher Schottky barrier heights and large gate capacitances can be achieved simultaneously.

To summarize this work, we have demonstrated record electron concentration modulation of ∼1.6 × 10¹⁴cm⁻² and record current modulation of ∼68.6 mA/mm in SrTiO₃ MESFETs using a higher Schottky barrier metal (Au) gate. This carrier density modulation is highest yet achieved using metal gates in any semiconductor device, and the MESFET current density is a ∼20× improvement compared to earlier SrTiO₃ MESFET reports. We have found that the pinch off voltage of SrTiO₃ MESFETs increases due to the presence of interfacial dielectric dead layer at the gate metal/SrTiO₃ interface. We hope that this work will help enable further improvements in large carrier concentration modulation in complex oxide devices, ultimately leading to reversible manipulation of emergent phenomena in these materials.

This work was supported by the Extreme Electron Concentration Devices (EXEDE) MURI program of the Office of Naval Research (ONR) through Grant No. N00014-12-1-0976.