Imaging of buried phosphorus nanostructures in silicon using scanning tunneling microscopy

The basic functional unit of the integrated circuit, the MOSFET (metal-oxide-semiconductor field effect transistor) contains dopants whose number and location form a random distribution. As MOSFETs are scaled down to channel lengths <30 nm, this randomness becomes problematic, limiting the reproducibility of MOSFET electrical characteristics, such as threshold voltage.¹ Consequently, it would be of great benefit to fabricate devices where the location and number of dopants were controlled exactly, for both conventional electronics and for applications based on quantum properties such as quantum computers.² A scheme to achieve such precision doping using scanning tunneling microscopy (STM) has been developed over the last decade,^3–5 recently culminating in the fabrication of an atomic scale buried dopant electrical wire⁶ and a buried single atom transistor.⁷ While buried dopant devices can be characterized electrically, knowledge of their spatial profile will be valuable if more complicated device architectures are to be developed.

The imaging of ionized dopants buried below the surface of semiconductors is possible because the buried charge modifies its local electrostatic environment, shifting the surface bands locally, which leads to a variation in the tunneling current in the vicinity of the buried charge.⁸ However, the imaging of dopants buried in Si is made harder by to the presence of surface states, which can partially pin the Fermi level at the surface, making the screened Coulomb potential of the ionized dopant difficult to resolve. These surface states can be removed by hydrogen terminating the surface and this approach was used to facilitate the identification of B,⁹ As,^10,11 and P^12,13 dopants buried below H:Si(001) surfaces. The imaging of buried P atoms below a clean Si(001) surface was achieved using large work function (approximately 5.6 eV) platinum/iridium tips to eliminate the Fermi-level pinning that hinders dopant identification in highly doped samples.¹⁴ In the above-mentioned dopant imaging work, all experiments studied randomly dispersed dopants and atomically flat surfaces were required for successful imaging. This latter requirement is particularly problematic if one wishes to image buried dopant nanostructures as the flash anneal (to >1000 °C) required to produce the atomically flat surface will also redistribute the dopants via diffusion,¹⁵ effectively destroying the nanostructure.

In this paper, we demonstrate imaging of deterministically fabricated buried P nanostructures in silicon. We first present a direct comparison of voltage-dependent STM imaging and current imaging tunneling spectroscopy (CITS)¹⁶ to image single buried P dopants, at room temperature. We then use STM lithography, phosphine (PH₃) dosing and Si epitaxy to fabricate buried dopant nanostructures and, using CITS, demonstrate that imaging subsurface dopant structures is possible even with residual surface roughness present after the Si epitaxy.

All experiments were performed in an ultra-high vacuum (UHV) chamber with a base pressure of <5 × 10⁻¹¹ millibars, housing a variable temperature scanning tunneling microscope (Omicron). Further details of our experimental arrangement are described elsewhere.⁴ The starting point is a flat, well-ordered Si surface prepared by annealing a phosphorus-doped 1 Ω cm silicon Si(001) wafer at 1150 °C for 30–60 s, quickly reducing the sample temperature from 1150 °C to 900 °C then cooling to room temperature at a rate of ∼3 °C/s. The STM measurements were taken at room temperature. Figure 1 shows (a) a filled- and (b) an empty-state STM image of the same area of a Si(001) surface below which several buried P atoms (dopants) reside. Unlike previous STM studies of P dopants in bulk-doped wafers,¹⁴ these dopants were deliberately introduced into the near-surface region of the substrate in controllable numbers.¹⁷ A delta-doped layer of P atoms was formed 5 monolayers (ML) below the surface by chemical vapor deposition of P from PH₃ followed by silicon encapsulation using molecular beam epitaxy at room temperature. A subsequent anneal to 450 °C for 5 s causes diffusion of some of the P atoms from the delta-layer, towards and away from the surface.¹⁷ Using this method of sample preparation, the local dopant density is in the range of 10¹⁸–10¹⁹cm⁻³.

Figure 1 shows a pair of filled- and empty-state STM images of a surface prepared as described above. We observe several long-range (∼3 nm) enhancements in the empty-state image (Fig. 1(b)) that are absent in the filled-state image (Fig. 1(a)). These features can be attributed to a position dependent bias voltage induced by ionized P dopant atoms in substitutional subsurface lattice sites.¹⁴ The features are not apparent in the filled-state image due to Fermi-level pinning at the conduction band edge induced by the strong tip-induced band bending. We also note that unambiguous identification of buried dopants in STM images is only possible on the areas of the surface away from steps and defects. In Fig. 1, the step-edge density, after a 450 °C anneal, is sufficiently high as to make the identification of every single buried dopant unfeasible using topographic filled and empty state imaging.

We now image buried P dopants using CITS. Figure 2 shows a direct comparison between STM and CITS imaging of individual subsurface P dopants. In the empty state STM image (Fig. 2(a), V_s = +1.1 V), the faint protrusion around the buried dopants is small compared to the height variation due to steps and terraces. The visibility is enhanced in Fig. 2(b) by adjusting the color scale for each terrace individually and piecing the STM image together. Here, subsurface dopants are visible as circular hillocks superimposed on the atomic lattice, similar to the appearance of the features seen by Brown et al.¹⁴ In Fig. 2(c), we present a CITS measurement of the same surface area. In CITS, a current-voltage characteristic is obtained at every topography data point (or a subset of these points)¹⁶ with the tip-sample distance fixed at the set point of the topographic measurement. This provides a spatial image of the tunneling current at each voltage over a specified voltage range. In Fig. 2(c), we show the current corresponding to V_s = +0.9 V. As for the STM data in Fig. 1, circular regions with increased current can be distinguished at the positions of subsurface dopants [Fig. 2(b)]. Here, the contrast in the images can be explained in complete analogy to STM imaging. The positive charge of the subsurface dopant locally shifts the surface bands downwards, thereby increasing the states available for tunneling into the sample at positive sample bias. The increased current around the buried P dopant is visible in the CITS image.

We now turn to fabricating and imaging buried phosphorus nanostructures. Fabrication of buried P dopant structures in UHV has been described elsewhere.¹⁸ A flat, clean Si(001) surface is terminated with a single monolayer of hydrogen, which acts as a resist mask that is subsequently patterned via the controlled atomic scale desorption of hydrogen using the STM.¹⁹ Phosphorus atoms are delivered to the patterned surface via the adsorption of PH₃ gas, which only adsorbs to the areas of the surface where H has been removed. Heating the wafer to 350 °C results in the substitution of P atoms into the surface and further heating to 470 °C desorbs the H-resist.²⁰ The final step is the encapsulation of the nanostructure with 5 ML of silicon from a silicon sublimation cell, and the temperature of the sample at which this occurs has implications for the subsequent imaging of the buried structure. During Si epitaxy, the sample is initially heated only by the radiation of the sublimation cell, reaching ∼110 °C, in order to minimize the thermally induced dopant redistribution. However, this low growth temperature has the unwanted side effect of increasing the surface roughness. Figure 3 shows STM images and root-mean-square roughness, R_rms, values of the typical surface at three stages of the fabrication process described above. The value of R_rms increases from ∼0.04 nm at the stage where the hydrogen resist has been desorbed (Fig. 3(a)), to ∼0.36 nm after subsequent growth of 5 monolayers of Si at ∼110 °C (Fig. 3(b)), due to the formation of large silicon clusters. This high value of R_rms prevents observation of buried P dopants using the topographic STM imaging method described in Fig. 1. While performing Si growth at elevated sample temperatures would have resulted in the formation of a flatter surface, we choose to keep the surface temperature low during Si growth to minimise P segregation and diffusion.¹⁷ A previous demonstration of imaging individual buried P dopants below a clean Si(001) surface¹⁴ was achieved after a surface anneal to ∼1250 °C. During an anneal at this temperature, P diffusion is likely to completely destroy a buried nanostructure. If necessary, the surface roughness can be decreased by annealing after encapsulation at which point segregation, a strictly surface phenomenon, does not occur. For example an anneal of 500 °C for 5 s lowers R_rms to ∼0.06 nm, as seen in Fig. 3(c). Here, the occasional individual buried dopant can be observed using topographic imaging, although the surface roughness masks more of the dopants. Nonetheless, to optimize structural integrity of buried nanostructures we strive to minimize the thermal budget during fabrication and, as we will show, buried dopant imaging can be achieved on rough surfaces, provided spectroscopic imaging (i.e., CITS) is used.

In Figs. 3(d)–3(f), we present patterning and CITS imaging of a planar buried P nanostructure following the above procedure. The STM image in Fig. 3(d) shows the pattern created in the hydrogen resist mask by STM lithography. The area of the surface where H has been desorbed is imaged more brightly than the terminated surface because the bare surface has a relatively increased electron density due to the presence of unsaturated dangling bonds.¹⁹ The pattern is approximately rectangular in shape with the dimensions of ∼260 nm × 530 nm. The three white “blobs” on the surface are lumps of material deposited from the tip by the application of a brief voltage pulse to the tip at specific positions on the surface to act as local registration markers enabling us to return to the same area of the surface after further processing, such as after Si encapsulation. Figure 3(e) shows a topographic STM image of the surface, obtained at a sample bias of −1.3 V, after the remaining fabrication steps: These were a PH₃ dose (30 s at a pressure of P_PH3 = 1 × 10⁻⁹ millibars), a 350 °C anneal for 5 s to incorporate the P donors, a 470 °C anneal for 5 s to desorb the H-resist, and a deposition of 5 MLs of Si to encapsulate the nanostructure. In this experiment, we have also reduced surface roughness by annealing the wafer at 500 °C for 5 s, after Si encapsulation, as described in Fig. 3(c). The topographic STM shows no evidence of the nanostructure, demonstrating that the Si growth was not significantly affected by the presence of the phosphorus. What we might expect however is that the presence of a high density of dopants would significantly modify the electronic properties of the Si, in the region of the nanostructure. This is borne out in CITS data obtained simultaneously with the topographic image of Fig. 3(e). In Fig. 3(f), we see a CITS image for a voltage slice obtained at +1.0 V. Here, the outline of the rectangle is clearly visible and has same dimensions of the pattern written in the resist (260 nm × 530 nm—Fig. 3(d)) within the estimated error of ±8 nm. The absence of topographic contribution cross-talk to the spectroscopic data in this image is evidenced by the fact that registration blobs are not clearly resolved in the CITS image. This image confirms both that the imaging of buried P-in-Si nanostructures is possible using CITS and that integrity of the nanostructure, as defined by H lithography, is retained after Si encapsulation and a 500 °C anneal. The reason why CITS is less affected by surface roughness than topographic STM imaging is because variations in the tunneling current translate into topographic height changes only by a weak logarithmic dependence.²¹ So, the height change associated with electronic structure differences on and away from the P nanostructure are significantly smaller than the surface roughness, in a topographic STM imaging. Therefore, contributions of the subsurface dopant pattern are hard to distinguish from the contribution of the surface roughness. Contrary to that, in the CITS measurements, the IV characteristics are recorded at virtually identical tip-sample separation and therefore yields the dopant contribution compensated for the height changes in a rough surface.

Having demonstrated the imaging of a planar buried P-dopant nanostructure, we now define a structure with sub-10 nm feature widths and this time dispense with the 500 °C post-anneal, i.e., contend with a greater surface roughness. Figure 4(a) shows a 750 nm × 750 nm STM image of a H terminated Si(001) surface after patterning the letters “CQCT”²² using the STM tip. The linewidth of the desorbed H lines in this pattern is ∼8 nm. Again three registration markers have been deposited around the patterned area. Figure 4(b) shows a topographic STM image of the same area of the surface after P incorporation, H desorption and 5 ML silicon encapsulation at room temperature. The three registration markers are still visible but the buried nanostructure is not. Figure 4(c) shows CITS data, obtained simultaneously with the topographic image, at +2.0 V. The width of the lines seen in Fig. 4(c) vary from 22 nm to 39 nm, significantly broader than the ∼8 nm wide lines of the H lithography pattern in Fig. 4(a). The major contributing factor to the apparent broadening of the nanostructured lines is lateral P diffusion during the thermal H desorption step. We know from separate investigations that the broadening of nanostructured lines during the thermal H desorption (before Si encapsulation) is around 8 nm in any direction,²³ which is likely to increase the width of the lines by around 16 nm. This would amount to an apparent width of around 24 nm wide after encapsulation. However, since the encapsulation was done at temperatures around 110 °C, segregation or lateral diffusion during growth is expected to be minimal.¹⁷ While the goal of this work was achieved, i.e., the imaging of a buried nanostructure on a very rough surface, further research will be required to determine the detailed contrast mechanisms at play in such experiments. Indeed the origin of the contrast observed in Fig. 4 is somewhat puzzling. The fact that the “CQCT” is seen as a depression instead of a protrusion in Fig. 4(c) reflects the fact that the filled states of that spectroscopic measurement were partially suppressed both on and away from the nanostructure, indicating an artifact in the imaging process, possibly caused by the high surface roughness effecting the properties of the tunnel junction or adding contaminant atom(s) to the end of the tip.

In conclusion, we have used STM and CITS to locate and image single phosphorus atoms and phosphorus dopant nanostructures buried beneath the Si(001) surface. The buried dopant nanostructures were fabricated in a bottom-up approach using scanning tunneling microscope lithography on Si(001).²⁴ We have shown that current imaging tunneling spectroscopy is suited to locate and image buried nanostructures with residual surface roughness present. The fact that images of buried nanostructures can be obtained even after low-temperature Si encapsulation could prove crucial in the future development of fabrication processes and architectures of buried dopant devices.

This work was conducted by the Australian Research Council Centre of Excellence scheme and ARO Contract No. DAAD19-01-1-0653. M.Y.S. acknowledges an ARC Fellowship.