A side-gated ultranarrow channel (width ) silicon field effect transistor (FET) with extreme threshold voltage tunability is described. A narrow inversion layer is formed on the top interface controlled by the top gate. The device body and side interfaces are accumulated by up to holes, drawn from the substrate by negatively biased side gates , increasing by , suppressing peripheral leakage currents and short channel effects. response to follows a square root behavior, , similar to that of body doping. Maximum linear tunability exceeds , average is .
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.© 2007 American Institute of Physics.
2007
American Institute of Physics
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