Multilevel charge storage in silicon nanocrystal multilayers

The feasibility of multilevel charges in layered arranged Si nanocrystals in a metal-oxide-semiconductor structure is investigated. The structures are created with up to three layers of size-controlled Si nanocrystals having a size of around $3.9nm$ $(±0.4nm)$⁠. Using a suitable write bias, the apparent states of charge storage are evident in the series of capacitance-voltage $(C‐V)$ curves. These memory effects are due to the successive charging of a varied number of Si nanocrystal layers in the floating gate. The widths of the memory windows were estimated by a modified charge equation for the multilayered nanocrystal samples, i.e., each memory window is quantified by charging a different number of Si nanocrystal layers. The static current-voltage $(I‐V)$ curve can be fitted by Fowler–Nordheim tunneling which represents the dominant tunneling behavior through the Si nanocrystal multilayers separated by thin silicon dioxide. Time retention investigations demonstrate the stability of the programming states. The results demonstrate the feasibility for using such a stack structure in multibit∕cell nonvolatile memories. In addition, due to the fact that more then one Si nanocrystal layer can be arranged and completely charged, the charge density can be easily increased to $3×1012cm−2$ as required for device applications.