We performed numerical simulations and experiments on Josephson vortex flow transistors based on parallel arrays of grain boundary junctions with a cross gate line allowing us to operate the same devices in two different modes named the Josephson fluxon transistor (JFT) and Josephson fluxon–antifluxon transistor (JFAT). The simulations yield a general expression for the current gain versus number of junctions and normalized loop inductance and predict higher current gain for the JFAT. The experiments are in good agreement with simulations and show improved coupling between gate line and junctions for the JFAT as compared to the JFT.
Comparison of Josephson vortex flow transistors with different gate line configurations
J. Schuler, S. Weiss, T. Bauch, A. Marx, D. Koelle, R. Gross; Comparison of Josephson vortex flow transistors with different gate line configurations. Appl. Phys. Lett. 19 February 2001; 78 (8): 1095–1097. https://doi.org/10.1063/1.1346625
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