A single-electron transistor (SET) with two gates was fabricated via the self-aligned evaporation of Al into a trench structure comprised of Si and The initial trench, which was comparable to 0.12 μm lines and defined by electron-beam lithography, was reduced to by a slightly anisotropic etching characteristic. These processes allow for the production of SET devices using current silicon fabrication techniques. The simultaneous formation of two gates allows for one gate to be used to control the background charge of each device. The shift of Coulomb oscillation peaks was clearly shown by controlling the second gate bias. An inverter logic operation at a temperature of 5 K with a gain of 1.3 was obtained. These characteristics indicate that such SET logic devices, based on a combination of the good performance of the Al SET and the high level of control of the fabrication of Si technology, have considerable potential for future use.
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2 April 2001
Research Article|
April 02 2001
Self-aligned double-gate single-electron transistor derived from 0.12-μm-scale electron-beam lithography
K. Nishiguchi;
K. Nishiguchi
Research Center for Quantum Effect Electronics, Tokyo Institute of Technology, 2-12-1 O-okayama, Meguroku, Tokyo 152-8552, Japan
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S. Oda
S. Oda
Research Center for Quantum Effect Electronics, Tokyo Institute of Technology, 2-12-1 O-okayama, Meguroku, Tokyo 152-8552, Japan
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Appl. Phys. Lett. 78, 2070–2072 (2001)
Article history
Received:
November 10 2000
Accepted:
February 08 2001
Citation
K. Nishiguchi, S. Oda; Self-aligned double-gate single-electron transistor derived from 0.12-μm-scale electron-beam lithography. Appl. Phys. Lett. 2 April 2001; 78 (14): 2070–2072. https://doi.org/10.1063/1.1360778
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