Integration of the emerging layered materials with the existing CMOS platform is a promising solution to enhance the performance and functionalities of the future CMOS based integrated circuits. In this direction, we have experimentally studied the suitability of the layered semimetals, namely, Td-WTe2, 1T′-MoTe2, 1T-PtTe2, and 1T-PtSe2, as an electrode with two most commonly used semiconductors, i.e., silicon (Si) and germanium (Ge) used in the CMOS technology. Two kinds of devices, i.e., metal–oxide–semiconductor (MOS) capacitors and metal-semiconductor (MS) diodes, are investigated with these semimetals as a conducting electrode. Through detailed electrical and physical characterizations, it is established that these semimetals form excellent interface with the underneath dielectric (SiO2) in the MOS structure and with the semiconductor (Ge) in the MS diode. Near ideal CV curves of MOS devices and large ON-current in the MS diodes signify that these semimetals act perfectly well as a contact electrode. Reduction in the Schottky barrier height of the MS diodes with decreasing values of the semimetal WF suggests the excellent interface of these semimetals with the Ge substrate. Most importantly, these semimetals do not add any unwanted series resistance across the current conduction path in the diode. Guided by these experimental observations, we propose that these semimetals can indeed be integrated with conventional CMOS platform, thus paving a way for an era of CMOS based heterogeneous electronics.
Layered semimetal electrodes for future heterogeneous electronics
Bubunu Biswal, Ramesh Rajarapu, Saroj Poudyal, Renu Yadav, Prahalad Kanti Barman, Manasi Mandal, Ravi Prakash Singh, B. R. K. Nanda, Abhishek Misra; Layered semimetal electrodes for future heterogeneous electronics. Appl. Phys. Lett. 11 September 2023; 123 (11): 113102. https://doi.org/10.1063/5.0164063
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