A fan-out circuit is a basic block for scaling up digital circuits for overcoming the limited driving capability of a single logic gate. It is particularly important for superconducting digital circuits as the driving power is typically weak for having high energy efficiency. Here, we design and fabricate a fan-out circuit for a superconducting nanowire cryotron (nTron) digital circuit. A classic splitter tree architecture is adopted. To transmit switching signal and avoid crosstalk among nTrons, we introduced an “R–L–R” interface circuit. Experimentally, a two-stage splitter tree of a fan-out number of four was demonstrated. Correct operation was observed with a minimum bit error rate (BER) of 10−6. The bias margin was 10% at BER of 10−4. The average time jitter was 82 ps. Moreover, crosstalk was not observed. Based on these results, we envision that the fan-out circuit can be used in future development of superconducting-nanowire-based circuits.
Splitter trees of superconducting nanowire cryotrons for large fan-out
Note: This paper is part of the APL Special Collection on Advances in Superconducting Logic.
Yang-Hui Huang, Qing-Yuan Zhao, Shi Chen, Hao Hao, Hui Wang, Jia-Wei Guo, Xue-Cou Tu, La-Bao Zhang, Xiao-Qing Jia, Jian Chen, Lin Kang, Pei-Heng Wu; Splitter trees of superconducting nanowire cryotrons for large fan-out. Appl. Phys. Lett. 27 February 2023; 122 (9): 092601. https://doi.org/10.1063/5.0139791
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