Atomic layer deposition of TiN/Ru gate in InP MOSFETs

InP channel planar and vertical MOSFETs utilizing atomic layer deposition of a TiN/Ru gate are fabricated. The performance of the TiN/Ru gate is compared to a Ru-only gate based on the C–V characteristics of MOS (metal–oxide–semiconductor) capacitors and peak transconductance (⁠$gm$⁠) and subthreshold swing (⁠$SS$⁠) in planar MOSFETs. Compared to devices with the conventional Ni/Au gate metal, these have a 70 mV/dec $SS$ [Tseng et al., in Device Research Conference (IEEE, 2019), pp. 183–184.] and a long gate length; TiN/Ru gate devices exhibit an average 68 mV/dec $SS$⁠, a record low value of InP, suggesting a high quality, low-damage high-k/InP interface. A record high peak $gm$ of 0.75 mS/μm at $VDS$ = 0.6 V on an InP channel is achieved in a planar gate length (⁠$Lg)=$ 80 nm device. A vertical MOSFET shows a reasonably conformal Ru coverage of the vertical fin and a high 0.42 mS/μm peak $gm$ for a $Lg$ = 50 nm device. The results of planar and vertical MOSFETs show that TiN/Ru gate metallization via atomic layer deposition is promising for non-planar III–V MOS devices.