Ferroelectric hafnium oxide (HfO2) has been extensively studied for over a decade, especially as a CMOS-compatible material in emerging memory applications. Most recently, it has gained a lot of attention for being applied in the field of beyond von-Neumann computing. The specific nature of different nonvolatile storage elements, particularly ferroelectric capacitors (FeCaps), tunnel junctions (FTJs), and field-effect transistors (FeFETs), dictates the boundary conditions of their adoption in “beyond von-Neumann” circuits and applications. While, for example, the scaling limits restrict the minimum feature size of FeCaps and FTJs, FeFETs have been proven to be highly scalable. On the other hand, HfO2-based FeFETs exhibit a lower cycling endurance than FeCaps, which has strong implications on their integration into circuits establishing beyond von-Neumann computing. This perspective points out some of the challenges that HfO2-based FeFETs encounter in reality and how they might be overcome by a suitable tuning of the device. Likewise, it is demonstrated how a suitable choice of application can partially or completely mitigate the imposed challenges.
REFERENCES
1.
J.
Backus
, “
Can programming be liberated from the von Neumann style?: A functional style and its algebra of programs
,” Commun. ACM
21
(8
), 613
–641
(1978
).2.
S.
Matsunaga
,
J.
Hayakawa
,
S.
Ikeda
,
K.
Miura
,
H.
Hasegawa
,
T.
Endoh
,
H.
Ohno
, and
T.
Hanyu
, “
Fabrication of a nonvolatile full adder based on logic-in-memory architecture using magnetic tunnel junctions
,” Appl. Phys. Express
1
, 091301
(2008
).3.
E.
Lehtonen
and
M.
Laiho
, “
Stateful implication logic with memristors
,” in IEEE/ACM International Symposium on Nanoscale Architectures
, San Francisco (2009
), pp. 33
–36
.4.
W.
Zhao
,
M.
Moreau
,
Y.
Zhang
,
J.-M.
Portal
,
J.-O.
Klein
,
M.
Bocquet
,
H.
Aziza
,
D.
Deleruyelle
,
C.
Muller
,
D.
Querlioz
,
N. B.
Romdhane
,
D.
Ravelosona
, and
C.
Chappert
, “
Synchronous non-volatile logic gate design based on resistive switching memories
,” IEEE Trans. Circuits Syst.
61
(2
), 443
–454
(2014
).5.
S.
Angizi
,
Z.
He
, and
D.
Fan
, “
ParaPIM: A parallel processing-in-memory accelerator for binary-weight deep neural networks
,” in ASPDAC'19: Proceedings of the 24th Asia and South Pacific Design Automation Conference
, Tokyo, Japan (2019
), pp. 127
–132
.6.
S.-Y.
Hu
,
L.
Cheng
,
Z.-R.
Wang
,
T.-C.
Chang
, and
S. M.
Sze
, “
Reconfigurable Boolean logic in memristive crossbar: The principle and implementation
,” IEEE Electron Device Lett.
40
(2
), 200
–203
(2019
).7.
G.
Santoro
,
G.
Turvani
, and
M.
Graziano
, “
New logic-in-memory paradigms: An architectural and technological perspective
,” Micromachines
10
(6
), 368
–324
(2019
).8.
J.
Tang
,
F.
Yuan
,
X.
Shen
,
Z.
Wang
,
M.
Rao
,
Y.
He
,
Y.
Sun
,
X.
Li
,
W.
Zhang
,
Y.
Li
,
B.
Gao
,
H.
Qian
,
G.
Bi
,
S.
Song
,
J. J.
Yang
, and
H.
Wu
, “
Bridging biological and artificial neural networks with emerging neuromorphic devices: Fundamentals, progress, and challenges
,” Adv. Mater.
31
(49
), 1902761
(2019
).9.
H.
Mulaosmanovic
,
J.
Ocker
,
S.
Müller
,
M.
Noack
,
J.
Müller
,
P.
Polakowski
,
T.
Mikolajick
, and
S.
Slesazeck
, “
Novel ferroelectric FET based synapse for neuromorphic systems
,” in Symposium on VLSI Technology-Digest of Technical Papers
, Kyoto, Japan (2017
), pp. T176
–T177
.10.
Z. Wang, W. Zhao, W. Kang, Y. Zhang, J.-O. Klein, and C. Chappert, “
Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture
,” in 2014 International Joint Conference on Neural Networks (IJCNN)
, Beijing (2014
), pp. 29
–34
.11.
Z.
Wang
,
W.
Zhao
,
W.
Kang
,
A.
Bouchenak-Khelladi
,
Y.
Zhang
,
Y.
Zhang
,
J.-O.
Klein
,
D.
Ravelosona
, and
C.
Chappert
, “
A physics-based compact model of ferroelectric tunnel junction for memory and logic design
,” J. Phys. D: Appl. Phys.
47
, 045001
(2014
).12.
M.
Al-Shedivat
,
R.
Naous
,
G.
Cauwenberghs
, and
K. N.
Salama
, “
Memristors empower spiking neurons with stochasticity
,” IEEE Trans. Emerging Sel. Top. Circuits Syst.
5
(2
), 242
–253
(2015
).13.
H.
Mulaosmanovic
,
E.
Chicca
,
M.
Bertele
,
T.
Mikolajick
, and
S.
Slesazeck
, “
Mimicking biological neurons with a nanoscale ferroelectric transistor
,” Nanoscale
10
, 21755
–21763
(2018
).14.
S.
Kim
,
M.
Ishii
,
S.
Lewis
,
T.
Perri
,
M.
BrightSky
,
W.
Kim
,
R.
Jordan
,
G. W.
Burr
,
N.
Sosa
,
A.
Ray
,
J.-P.
Han
,
C.
Miller
,
K.
Hosokawa
, and
C.
Lam
, “
NVM neuromorphic core with 64k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in-situ learning
,” in IEEE International Electron Devices Meeting (IEDM)
, Washington (2015
), pp. 17.1.1
–17.1.4
.15.
H.
Takasu
,
Y.
Fujimori
,
T.
Nakamura
,
H.
Kimura
,
T.
Hanyu
, and
M.
Kameyama
, “
Ferroelectric non-volatile logic devices
,” Integr. Ferroelectr.
61
, 83
–88
(2004
).16.
A.
Sheikholeslami
,
P. G.
Gulak
, and
T.
Hanyu
, “
Multiple-valued ferroelectric content-addressable memory
,” in Proceedings of the International Symposium on Multiple-Valued Logic
, Santiago de Compostela, Spain (1996
), pp. 74
–79
.17.
M.
Koga
,
M.
Iida
,
M.
Amagasaki
,
Y.
Ichida
,
M.
Saji
,
J.
Iida
, and
T.
Sueyoshi
, “
A power-gatable reconfigurable logic chip with FeRAM cells
,” in TENCON 2010—IEEE Region 10 Conference
, Fukuoka, Japan (2010
), pp. 317
–322
.18.
S.
Ishihara
,
N.
Idobata
,
M.
Hariyama
, and
M.
Kameyama
, “
Flexible ferroelectric-capacitor element for low power and compact logic-in-memory architectures
,” J. Mult.-Valued Log Soft Comput.
20
(5–6
), 595
–623
(2013
).19.
Z.
Wang
,
W.
Zhao
,
W.
Kang
,
Y.
Zhang
,
J.-O.
Klein
,
D.
Ravelosona
,
Y.
Zhang
, and
C.
Chappert
, “
Nonvolatile Boolean logic block based on ferroelectric tunnel memristor
,” IEEE Trans. Magn.
50
(11
), 1
–4
(2014
).20.
S.
Dünkel
,
M.
Trentzsch
,
R.
Richter
,
P.
Moll
,
C.
Fuchs
,
O.
Gehring
,
M.
Majer
,
S.
Wittek
,
B.
Müller
,
T.
Melde
,
H.
Mulaosmanovic
,
S.
Slesazeck
,
S.
Müller
,
J.
Ocker
,
M.
Noack
,
D.-A.
Löhr
,
P.
Polakowski
,
J.
Müller
,
T.
Mikolajick
,
J.
Höntschel
,
B.
Reis
,
J.
Pellerin
, and
S.
Beyer
, “
A FeFET based super-low-power ultra-fast embedded NVM technology for 22 nm FDSOI and beyond
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2017
), pp. 19.7.1
–19.7.4
.21.
M.
Trentzsch
,
S.
Flachowsky
,
R.
Richter
,
J.
Paul
,
B.
Reimer
,
D.
Utess
,
S.
Jansen
,
H.
Mulaosmanovic
,
S.
Müller
,
S.
Slesazeck
,
J.
Ocker
,
M.
Noack
,
J.
Müller
,
P.
Polakowski
,
J.
Schreiter
,
S.
Beyer
,
T.
Mikolajick
, and
B.
Reis
, “
A 28 nm HKMG super low power embedded NVM technology based on ferroelectric FETs
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2016
), pp. 11.5.1
–11.5.4
.22.
S.
Beyer
,
M.
Trentzsch
,
S.
Dünkel
,
J.
Müller
,
R.
Richter
,
P.
Moll
,
M.
Majer
,
S.
Wittek
,
B.
Müller
,
T.
Melde
,
E.
Breyer
,
H.
Mulaosmanovic
,
S.
Slesazeck
,
S.
Müller
,
J.
Ocker
,
M.
Noack
,
P.
Polakowski
,
T.
Mikolajick
, and
J.
Pellerin
, “
Embedded FeFETs as a low power and non-volatile beyond-von-Neumann memory solution
,” in IEEE Nonvolatile Memory Technology Symposium (NVMTS)
, Sendai, Japan (2018
), pp. 28
and 29
.23.
S.
George
,
K.
Ma
,
A.
Aziz
,
X.
Li
,
A.
Khan
,
S.
Salahuddin
,
M.-F.
Chang
,
S.
Datta
,
J.
Sampson
,
S.
Gupta
, and
V.
Narayanan
, “
Nonvolatile memory design based on ferroelectric FETs
,” in 53rd ACM/EDAC/IEEE Design Automation Conference (DAC)
, Austin (2016
), p. 118
24.
S.
Das
and
J.
Appenzeller
, “
FETRAM. An organic ferroelectric material based novel random access memory cell
,” Nano Lett.
11
(9
), 4003
–4407
(2011
).25.
X.
Li
,
J.
Wu
,
K.
Ni
,
S.
George
,
K.
Ma
,
J.
Sampson
,
S. K.
Gupta
,
Y.
Liu
,
H.
Yang
,
S.
Datta
, and
V.
Narayanan
, “
Design of 2T/cell and 3T/cell nonvolatile memories with emerging ferroelectric FETs
,” IEEE Des. Test
36
(3
), 39
–45
(2019
).26.
J.
Wu
,
H.
Zhong
,
K.
Ni
,
Y.
Liu
,
H.
Yang
, and
X.
Li
, “
A 3T/cell practical embedded nonvolatile memory supporting symmetric read and write access based on ferroelectric FETs
,” in Proceedings of the 56th Annual Design Automation Conference (DAC)
, Las Vegas (2019
), pp. 82
.27.
D.
Reis
,
M.
Niemier
, and
X. S.
Hu
, “
Computing in memory with FeFETs
,” in ISLPED'18: Proceedings of the International Symposium on Low Power Electronics and Design
, Seattle (2018
), p. 24
.28.
S.
Slesazeck
,
V.
Havel
,
E. T.
Breyer
,
H.
Mulaosmanovic
,
M.
Hoffmann
,
B.
Max
,
S.
Dünkel
, and
T.
Mikolajick
, “
Uniting the trinity of ferroelectric HfO2 memory devices in a single memory cell
,” in 2019 IEEE 11th International Memory Workshop (IMW)
, Monterey (2019
), pp. 1
–4
.29.
X.
Yin
,
A.
Aziz
,
J.
Nahas
,
S.
Datta
,
S.
Gupta
,
M.
Niemier
, and
X. S.
Hu
, “
Exploiting ferroelectric FETs for low-power non-volatile logic-in-memory circuits
,” in IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
, Austin (2016
), pp. 1
–8
.30.
E. T.
Breyer
,
H.
Mulaosmanovic
,
J.
Trommer
,
T.
Melde
,
S.
Dünkel
,
M.
Trentzsch
,
S.
Beyer
,
S.
Slesazeck
, and
T.
Mikolajick
, “
Compact FeFET circuit building blocks for fast and efficient nonvolatile logic-in-memory
,” IEEE J. Electron Devices Soc.
8
, 748
–756
(2020
).31.
X.
Chen
,
X.
Sun
,
P.
Wang
,
S.
Datta
,
X. S.
Hu
,
X.
Yin
,
M.
Jerry
,
S.
Yu
,
A. F.
Laguna
,
K.
Ni
,
M. T.
Niemier
, and
D.
Reis
, “
The impact of ferroelectric FETs on digital and analog circuits and architectures
,” IEEE Des. Test
37
(1
), 79
–99
(2020
).32.
D.
Wang
,
S.
George
,
A.
Aziz
,
S.
Datta
,
V.
Narayanan
, and
S. K.
Gupta
, “
Ferroelectric transistor based non-volatile flip-flop
,” in ISLPED'16: Proceedings of the International Symposium on Low Power Electronics and Design
, San Francisco (2016
), pp. 10
–15
.33.
X.
Li
,
S.
George
,
K.
Ma
,
W.-Y.
Tsai
,
A.
Aziz
,
J.
Sampson
,
S. K.
Gupta
,
M.-F.
Chang
,
Y.
Liu
,
S.
Datta
, and
Y.
Narayanan
, “
Advancing nonvolatile computing with nonvolatile NCFET latches and flip-flops
,” IEEE Trans. Circuits Syst.
64
(11
), 2907
–2919
(2017
).34.
I.
Bayram
and
Y.
Chen
, “
NV-TCAM: Alternative interests and practices in NVM designs
,” in IEEE Non-Volatile Memory Systems and Applications Symposium (NVMSA)
, Chongqing, China (2014
), pp. 1
–6
.35.
Y.
Long
,
D.
Kim
,
E.
Lee
,
P.
Saha
,
B. A.
Mudassar
,
X.
She
,
A. I.
Khan
, and
S.
Mukhopadhyay
, “
A ferroelectric FET based processing-in-memory architecture for DNN acceleration
,” IEEE J. Explor. Solid-State Comput. Devices Circuits
5
, 113
–122
(2019
).36.
D.
Reis
,
M. T.
Niemier
, and
X. S.
Hu
, “
A computing-in-memory engine for searching on homomorphically encrypted data
,” IEEE J. Explor. Solid-State Comput. Devices Circuits
5
(2
), 123
–131
(2019
).37.
M.
Lee
,
W.
Tang
,
B.
Xue
,
J.
Wu
,
M.
Ma
,
Y.
Wang
,
Y.
Liu
,
D.
Fan
,
V.
Narayanan
,
H.
Yang
, and
X.
Li
, “
FeFET-based low-power bitwise logic-in-memory with direct write-back and data-adaptive dynamic sensing interface
,” in ISLPED'20: Proceedings of the International Symposium on Low Power Electronics and Design
, Boston (2020
), pp. 127
–132
.38.
E. T.
Breyer
,
H.
Mulaosmanovic
,
T.
Mikolajick
, and
S.
Slesazeck
, “
Reconfigurable NAND/NOR logic gates in 28 nm HKMG and 22 nm FD-SOI FeFET technology
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2017
), pp. 28.5.1
–28.5.4
.39.
E. T.
Breyer
,
H.
Mulaosmanovic
,
S.
Slesazeck
, and
T.
Mikolajick
, “
Demonstration of versatile nonvolatile logic gates in 28 nm HKMG FeFET technology
,” in 2018 IEEE International Symposium on Circuits and Systems (ISCAS)
, Florence (2018
), pp. 1
–5
.40.
Z.
Wang
,
S.
Khandelwal
, and
A. I.
Khan
, “
Ferroelectric oscillators and their coupled networks
,” IEEE Electron Device Lett.
38
(11
), 1614
–1617
(2017
).41.
N.
Thakuria
,
A. K.
Saha
,
S. K.
Thirumala
,
B.
Jung
, and
S. K.
Gupta
, “
Oscillators utilizing ferroelectric-based transistors and their coupled dynamics
,” IEEE Trans. Electron Devices
66
(5
), 2415
–2423
(2019
).42.
Z.
Wang
,
B.
Crafton
,
J.
Gomez
,
R.
Xu
,
A.
Luo
,
Z.
Krivokapic
,
L.
Martin
,
S.
Datta
,
A.
Raychowdhury
, and
A. I.
Khan
, “
Experimental demonstration of ferroelectric spiking neurons for unsupervised clustering
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2018
), pp. 13.3.1
–13.3.4
.43.
S.
Dutta
,
A.
Saha
,
P.
Panda
,
W.
Chakraborty
,
J.
Gomez
,
A.
Khanna
,
S.
Gupta
,
K.
Roy
, and
S.
Datta
, “
Biologically plausible ferroelectric quasi-leaky integrate and fire neuron
,” in Symposium on VLSI Technology-Digest of Technical Papers
, Kyoto, Japan (2019
), pp. T140
–T141
.44.
B.
Suresh
,
M.
Bertele
,
E. T.
Breyer
,
P.
Klein
,
H.
Mulaosmanovic
,
T.
Mikolajick
,
S.
Slesazeck
, and
E.
Chicca
, “
Simulation of integrate-and-fire neuron circuits using HfO2-based ferroelectric field effect transistors
,” in IEEE International Conference on Electronics, Circuits and Systems (ICECS)
, Genoa, Italy (2019
), pp. 229
–232
.45.
Y.
Nishitani
,
Y.
Kaneko
,
M.
Ueda
,
T.
Morie
, and
E.
Fujii
, “
Three-terminal ferroelectric synapse device with concurrent learning function for artificial neural networks
,” J. Appl. Phys.
111
(12
), 124108
(2012
).46.
M.
Jerry
,
P.-Y.
Chen
,
J.
Zhang
,
P.
Sharma
,
K.
Ni
,
S.
Yu
, and
S.
Datta
, “
Ferroelectric FET analog synapse for acceleration of deep neural network training
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2017
), pp. 6.2.1
–6.2.4
.47.
T. S.
Böscke
,
J.
Müller
,
D.
Bräuhaus
,
U.
Schröder
, and
U.
Böttger
, “
Ferroelectricity in hafnium oxide thin oxide films
,” Appl. Phys. Lett.
99
, 102903
(2011
).48.
J.
Müller
,
T. S.
Böscke
,
S.
Müller
,
E.
Yurchuk
,
P.
Polakowski
,
J.
Paul
,
D.
Martin
,
T.
Schenk
,
K.
Khullar
,
A.
Kersch
,
W.
Weinreich
,
S.
Riedel
,
K.
Seidel
,
A.
Kumar
,
T. M.
Arruda
,
S. V.
Kalinin
,
T.
Schlösser
,
R.
Boschke
,
R.
van Bentum
,
U.
Schröder
, and
T.
Mikolajick
, “
Ferroelectric hafnium oxide: A CMOS-compatible and highly scalable approach to future ferroelectric memories
,” in IEEE International Electron Devices Meeting (IEDM)
, Washington (2013
), pp. 10.8.1
–10.8.4
.49.
H.-H.
Tseng
, “
The progress and challenges of applying high-k/metal-gated devices to advanced CMOS technologies
,” in Solid State Circuits Technologies
, edited by
J. W.
Swart
(
InTech
,
Rijeka
, 2010
), pp. 157
–183
.50.
K.
Florent
,
M.
Pesic
,
A.
Subirats
,
K.
Banerjee
,
S.
Lavizzari
,
A.
Arreghini
,
L. D.
Piazza
,
G.
Potoms
,
F.
Sebaai
,
S. R. C.
McMitchell
,
M.
Popovici
,
G.
Groeseneken
, and
J.
Van Houdt
, “
Vertical ferroelectric HfO2 FET based on 3-D NAND architecture: Towards dense low-power memory
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2018
), pp. 2.5.1
–2.5.4
.51.
E. T.
Breyer
,
H.
Mulaosmanovic
,
S.
Slesazeck
, and
T.
Mikolajick
, “
Flexible memory, bit-passing and mixed logic/memory operation of two intercoupled FeFET arrays
,” in 2020 IEEE International Symposium on Circuits and Systems (ISCAS)
, Seville, Spain (2020
), pp. 1
–5
.52.
H.
Mulaosmanovic
,
J.
Ocker
,
S.
Müller
,
U.
Schröder
,
J.
Müller
,
P.
Polakowski
,
S.
Flachowsky
,
R.
van Bentum
,
T.
Mikolajick
, and
S.
Slesazeck
, “
Switching kinetics in nanoscale hafnium oxide based ferroelectric field-effect transistors
,” ACS Appl. Mater. Interfaces
9
, 3792
(2017
).53.
G.
Pan
,
A.
Karymy
,
P.
Yu
, and
Y.
Jiang
, “
Novel low noise amplifier for neural signals based on STT-MTJ spintronic device
,” IEEE Access
7
, 145641
–145650
(2019
).54.
M.-M.
Jin
,
L.
Cheng
,
Y.
Li
,
S.-Y.
Hu
,
K.
Lu
,
J.
Chen
,
N.
Duan
,
Z.-R.
Wang
,
Y.-R.
Wang
,
Y.-X.
Zhou
,
T.-C.
Chang
, and
X.-S.
Miao
, “
Reconfigurable logic in nanosecond Cu/GeTe/TiN filamentary memristors for energy-efficient in-memory computing
,” Nanotechnology
29
(38
), 385203
–385211
(2018
).55.
T.
Schenk
,
M.
Pesic
,
S.
Slesazeck
,
U.
Schröder
, and
T.
Mikolajick
, “
Memory technology—A primer for material scientists
,” Rep. Prog. Phys.
83
(8
), 086501
(2020
).56.
L.
Ni
,
Z.
Liu
,
H.
Yu
, and
R. V.
Joshi
, “
An energy-efficient digital ReRAM-crossbar based CNN with bitwise parallelism
,” IEEE J. Explor. Solid-State Comput. Devices Circuits
3
, 37
–46
(2017
).57.
H.
Mulaosmanovic
,
E. T.
Breyer
,
T.
Mikolajick
, and
S.
Slesazeck
, “
Recovery of cycling endurance failure in ferroelectric FETs by self-heating
,” IEEE Electron Device Lett.
40
(2
), 216
–219
(2019
).58.
G.
Bersuker
,
D.
Heh
,
C.
Young
,
H.
Park
,
P.
Khanal
,
L.
Larcher
,
A.
Padovani
,
P.
Lenahan
,
J.
Ryan
,
B. H.
Lee
,
H.
Tseng
, and
R.
Jammy
, “
Breakdown in the metal/high-k gate stack: Identifying the “weak link” in the multilayer dielectric
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2008
), pp. 1
–4
.59.
A.
Kerber
and
E. A.
Cartier
, “
Reliability challenges for CMOS technology qualifications with hafnium oxide/titanium nitride gate stacks
,” IEEE Trans. Device Mater. Rel.
9
(2
), 147
–162
(2009
).60.
J.
Müller
,
P.
Polakowski
,
S.
Müller
,
H.
Mulaosmanovic
,
J.
Ocker
,
T.
Mikolajick
,
S.
Slesazeck
,
S.
Flachowsky
, and
M.
Trentzsch
, “
High endurance strategies for hafnium oxide based ferroelectric field effect transistor
,” in Non-Volatile Memory Technology Symposium (NVMTS)
, Pittsburgh (2016
), pp. 1
–7
.61.
T.
Ali
,
K.
Kühnel
,
K.
Mertens
,
M.
Czernohorsky
,
M.
Rudolph
,
P.
Duhan
,
D.
Lehninger
,
R.
Hoffmann
,
P.
Steinke
,
J.
Müller
,
J.
van Houdt
,
K.
Seidel
, and
L. M.
Eng
, “
Effect of substrate implant tuning on the performance of MFIS silicon doped hafnium oxide (HSO) FeFET memory
,” in 2020 IEEE International Memory Workshop (IMW)
, Dresden, Germany (2020
), pp. 1
–4
.62.
S.
Oh
,
J.
Song
,
I. K.
Yoo
, and
H.
Hwang
, “
Improved endurance of HfO2-based metal-ferroelectric-insulator-silicon structure by high-pressure hydrogen annealing
,” IEEE Electron Device Lett.
40
(7
), 1092
–1095
(2019
).63.
K.
Chatterjee
,
S.
Kim
,
G.
Karbasian
,
A. J.
Tan
,
A. K.
Yadav
,
A. I.
Khan
,
C.
Hu
, and
S.
Salahuddin
, “
Self-aligned, gate last, FDSOI, ferroelectric gate memory device with 5.5-nm Hf0.8Zr0.2O2, high endurance and breakdown recovery
,” IEEE Electron Device Lett.
38
(10
), 1379
–1382
(2017
).64.
K.
Ni
,
J. A.
Smith
,
B.
Grisafe
,
T.
Rakshit
,
B.
Obradovic
,
J. A.
Kittl
,
M.
Rodder
, and
S.
Datta
, “
SoC logic compatible multi-bit FeMFET weight cell for neuromorphic applications
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2018
), pp. 13.2.1
–13.2.4
.65.
M.
Halter
,
L.
Begon-Lours
,
V.
Bragaglia
,
M.
Sousa
,
B. J.
Offrein
,
S.
Abel
,
M.
Luisier
, and
J.
Fompeyrine
, “
Back-end, CMOS-compatible ferroelectric field-effect transistor for synaptic weights
,” ACS Appl. Mater. Interfaces
12
, 17725
–17732
(2020
).66.
E.
Yurchuk
,
J.
Müller
,
S.
Müller
,
J.
Paul
,
M.
Pesic
,
R.
van Bentum
,
U.
Schröder
, and
T.
Mikolajick
, “
Charge-trapping phenomena in HfO2-based FeFET-type nonvolatile memories
,” IEEE Trans. Electron Devices
63
(9
), 3501
–3507
(2016
).67.
W.-T.
Lu
,
P.-C.
Lin
,
T.-Y.
Huang
,
C.-H.
Chien
,
M.-J.
Yang
,
I.-J.
Huang
, and
P.
Lehnen
, “
The characteristics of hole trapping in HfO2∕SiO2 gate dielectrics with TiN gate electrode
,” Appl. Phys. Lett.
85
(16
), 3525
–3527
(2004
).68.
H.
Mulaosmanovic
,
E. T.
Breyer
,
T.
Mikolajick
, and
S.
Slesazeck
, “
Switching and charge trapping in HfO2-based ferroelectric FETs: An overview and potential applications
,” in IEEE Electron Devices Technology and Manufacturing Conference (EDTM)
, Penang, Malaysia (2020
), pp. 1
–4
.69.
J.
Ocker
,
S.
Kupke
,
S.
Slesazeck
,
T.
Mikolajick
,
M.
Drescher
,
A.
Naumann
,
E.
Erben
,
F.
Lazarevic
, and
R.
Leitsmann
, “
Influence of nitrogen trap states on the electronic properties of high-k metal gate transistors
,” in 2014 IEEE International Integrated Reliability Workshop (IIRW)
, South Lake Tahoe (2014
), pp. 86
–89
.70.
K.
Ni
,
P.
Sharma
,
J.
Zhang
,
M.
Jerry
,
J. A.
Smith
,
K.
Tapily
,
R.
Clark
,
S.
Mahapatra
, and
S.
Datta
, “
Critical role of interlayer in Hf0.5Zr0.5O2 ferroelectric FET nonvolatile memory performance
,” IEEE Trans. Electron Devices
65
(6
), 2461
–2469
(2018
).71.
H.
Mulaosmanovic
,
E. T.
Breyer
,
T.
Mikolajick
, and
S.
Slesazeck
, “
Ferroelectric FETs with 20-nm-thick HfO2 layer for large memory window and high performance
,” IEEE Trans. Electron Devices
66
(9
), 3828
–3833
(2019
).72.
W.
Chung
,
M.
Si
,
P. R.
Shrestha
,
J. P.
Campbell
,
K. P.
Cheung
, and
P. D.
Ye
, “
First direct experimental studies of Hf0.5Zr0.5O2 ferroelectric polarization switching
,” in Symposium on VLSI Technology-Digest of Technical Papers
, Honolulu (2018
), pp. 89
–90
.73.
X.
Lyu
,
M.
Si
,
P. R.
Shrestha
,
K. P.
Cheung
, and
P. D.
Ye
, “
First direct measurement of sub-nanosecond polarization switching in hafnium zirconium oxide
,” in IEEE International Electron Devices Meeting (IEDM)
, San Francisco (2019
), pp. 15.2.1
–15.2.4
.74.
M.
Li
,
X.
Yin
,
X. S.
Hu
, and
C.
Zhuo
, “
Nonvolatile and energy-efficient FeFET-based multiplier for energy-harvesting devices
,” in 25th Asia and South Pacific Design Automation Conference (ASP-DAC)
, Beijing, China (2020
), pp. 562
–567
.75.
P.
Wang
and
S.
Yu
, “
Ferroelectric devices and circuits for neuro-inspired computing
,” MRS Commun.
10
, 538
–511
(2020
).76.
See https://news.psu.edu/photo/625831/2020/07/15/stacking-layers (“Schematic of a proposed combined computing and memory chip”) for more information on prospective 3d stacked, ferroelectric-based processing unit (last accessed November 26, 2020).
77.
M. M.
Sabry Aly
,
M.
Gao
,
G.
Hills
,
C.-S.
Lee
,
G.
Pitner
,
M. M.
Shulaker
,
T. F.
Wu
,
M.
Asheghi
,
J.
Bokor
,
F.
Franchetti
,
K. E.
Goodson
,
C.
Kozyrakis
,
I.
Markov
,
K.
Olukotun
,
L.
Pileggi
,
E.
Pop
,
J.
Rabaey
,
C.
Re
,
H.-S. P.
Wong
, and
S.
Mitra
, “
Energy-efficient abundant-data computing: The N3XT 1000x
,” Computer
48
(12
), 24
–33
(2015
).©2021 Authors. Published by AIP Publishing.
2021
Author(s)
You do not currently have access to this content.
