Selective area heteroepitaxy of low dislocation density antiphase boundary free GaAs microridges on flat-bottom (001) Si for integrated silicon photonics

Integrating III–V gain elements in the silicon photonics platform via selective area heteroepitaxy (SAH) would enable large-scale and low-cost photonic integrated circuits. Here, we demonstrate antiphase boundary (APB)-free gallium arsenide (GaAs) microridges selectively grown on flat-bottom (001) silicon (Si) inside a recess. This approach eliminates the need for etching the patterned Si to form trapezoid or v-groove shapes, often leveraged for eliminating APBs. A low surface dislocation density of 8.5 × 10⁶ cm⁻² was achieved for 15-μm-wide GaAs microridges, quantified by electron channeling contrast imaging. The avoidance of APBs is primarily due to their self-annihilation, influenced by the sufficiently low temperature GaAs nucleation and subsequent higher temperature buffer overgrowth. Dislocation filtering approaches, namely, thermal cycle annealing and strained-layer superlattices, have been applied to effectively reduce the dislocation density. SAH of GaAs on trapezoidal-shaped Si pockets is also reported to illustrate the differing growth conditions for GaAs on (001) and (111) Si microplanes.