We describe the physics of the turn-off mechanism in source-gated transistors (SGTs), which is distinct from that of conventional thin-film field-effect transistors and allows significantly lower off currents, particularly in depletion-mode devices. The “n-type” SGT enters its off state when the potential applied across the semiconductor layer is decreased to low positive values or made negative through the applied gate bias, thus impeding charge injection from the source contact. Measurements on polysilicon devices were supported with TCAD simulations using Silvaco Atlas. Alongside the other known benefits of SGTs, including low saturation voltage, tolerance to process variations, and high intrinsic gain, the ability to efficiently block current at high negative gate voltages suggests that these devices would be ideal elements in emerging thin-film power management and rectification circuits.

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