The continuous scaling and challenges in device integrations in modern portable electronic products have aroused many scientific interests, and a great deal of effort has been made in seeking solutions towards a more microminiaturized package assembled with smaller and more powerful components. In this study, an embedded light-erasable charge-trapping memory with a high-k dielectric stack (Al2O3/HfO2/Al2O3) and an atomically thin MoS2 channel has been fabricated and fully characterized. The memory exhibits a sufficient memory window, fast programming and erasing (P/E) speed, and high On/Off current ratio up to 107. Less than 25% memory window degradation is observed after projected 10-year retention, and the device functions perfectly after 8000 P/E operation cycles. Furthermore, the programmed device can be fully erased by incident light without electrical assistance. Such excellent memory performance originates from the intrinsic properties of two-dimensional (2D) MoS2 and the engineered back-gate dielectric stack. Our integration of 2D semiconductors in the infrastructure of light-erasable charge-trapping memory is very promising for future system-on-panel applications like storage of metadata and flexible imaging arrays.
Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications
Long-Fei He, Hao Zhu, Jing Xu, Hao Liu, Xin-Ran Nie, Lin Chen, Qing-Qing Sun, Yang Xia, David Wei Zhang; Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications. Appl. Phys. Lett. 27 November 2017; 111 (22): 223104. https://doi.org/10.1063/1.5000552
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