Memristor based logic gates that can execute memory and logic operations are regarded as building blocks for non Von Neumann computation architecture. In this letter, Ta/GeTe/Ag memristors were fabricated and showed reproducible binary switches between high-resistance and low-resistance states. Utilizing a structure with two anti-serially connected memristors, we propose a logic operation methodology, based on which arbitrary Boolean logic can be realized in three steps, and the logic result can be nonvolatilely stored. A functionally complete logic operation: NAND is further verified by HSPICE simulation and experiments. The implementation of logic-in-memory unit may stimulate the development of future massive parallel computing.

1.
L. O.
Chua
,
IEEE Trans. Circuit Theory
18
,
507
(
1971
).
2.
D. B.
Strukov
,
G. S.
Snider
,
D. R.
Stewart
, and
R. S.
Williams
,
Nature
453
,
80
(
2008
).
3.
J.
Borghetti
,
G. S.
Snider
,
P. J.
Kuekes
,
J. J.
Yang
,
D. R.
Stewart
, and
R. S.
Williams
,
Nature
464
,
873
(
2010
).
4.
Y. V.
Pershin
and
M.
Di Ventra
,
Proc. IEEE
100
,
2071
(
2012
).
5.
S.
Kvatinsky
,
A.
Kolodny
,
U. C.
Weiser
, and
E. G.
Friedman
, in
Proceedings of the IEEE 29th International Conference on Computer Design
(
2011
), p.
142
.
6.
E.
Linn
,
R.
Rosezin
,
S.
Tappertzhonfen
,
U.
Böttger
, and
R.
Waser
,
Nanotechnology
23
,
305205
(
2012
).
7.
T. G.
You
,
Y.
Shuai
,
W.
Luo
,
N.
Du
,
D.
Böttger
,
I.
Skorupa
,
R.
Hübner
,
S.
Henker
,
C.
Mayr
,
R.
Schüffny
,
T.
Mikolajick
,
O. G.
Schmidt
, and
H.
Schmidt
,
Adv. Funct. Mater.
24
,
3357
(
2014
).
8.
S.
Kvatinsky
,
N.
Wald
,
G.
Satat
,
A.
Kolodny
,
U. C.
Weiser
, and
E. G.
Friedman
, in
Proceedings of the 13th International Workshop on Cellular Nanoscale Networks and their Applications
(
2012
), p.
1
.
9.
M.
Klimo
and
O.
Such
,
Memristors can implement fuzzy logic
(
Cornell University Press, Ithaca
,
NY, USA
,
2011
).
10.
Y.
Li
,
Y. P.
Zhong
,
J. J.
Zhang
,
X. H.
Xu
,
Q.
Wang
,
L.
Xu
,
H. J.
Sun
, and
X. S.
Miao
,
Appl. Phys. Lett.
103
,
043501
(
2013
).
11.
J. J.
Zhang
,
H. J.
Sun
,
Y.
Li
,
Q.
Wang
,
X. H.
Xu
, and
X. S.
Miao
,
Appl. Phys. Lett.
102
,
183513
(
2013
).
12.
S. J.
Choi
,
G. S.
Park
,
K. H.
Kim
,
S.
Cho
,
W. Y.
Yang
,
X. S.
Li
,
J. H.
Moon
,
K. J.
Lee
, and
K.
Kim
,
Adv. Mater.
23
,
3272
(
2011
).
13.
M. K.
Hota
,
M. N.
Hedhili
,
Q.
Wang
,
V. A.
Melnikov
,
O. F.
Mohammed
, and
H. N.
Alshareef
,
Adv. Electron. Mater.
1
,
3
(
2015
).
14.
S.
Shin
,
K.
Kim
, and
S.-M. S.
Kang
,
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
29
,
590
(
2010
).
15.
B.
Widrow
, “
Stanford Electronics Laboratories Technical Report
,” Tech. Rep. TR-1553-2, 23 October
1960
.
16.
S. P.
Adhikari
and
H.
Kim
,
Memristor Networks
(
Springer International Publishing
,
2014
), p.
95
.
17.
Q.
Xia
,
M. D.
Pickett
,
J. J.
Yang
,
X.
Li
,
W.
Wu
,
G.
Medeiros-Ribeiro
, and
R. S.
Williams
,
Adv. Funct. Mater.
21
,
2660
(
2011
).
You do not currently have access to this content.