The current transport across a p-Ge/n-Si diode structure obtained by direct wafer bonding and layer exfoliation is analysed. A low temperature anneal at 400 °C for 30 min was used to improve the forward characteristics of the diode with the on/off ratio at −1 V being >8000. Post anneal, the transport mechanism has a strong tunnelling component. This fabrication technique using a low thermal budget (T ≤ 400 °C) is an attractive option for heterogeneous integration.

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