Temperature dependent electrical characteristics of a junction field effect transistor for cryogenic sub-attoampere charge detection

Ultimate charge detection requires electrometers with an extremely large input impedance. This is typically achieved by use of field effect transistors (FET) on the input stage which allows to probe charge and voltage with current loads of ≤ 1 fA in commercially available devices. This is still insufficient for measurements of a few to hundreds of elementary charges. Cooling of the FET can improve the performance as it lowers the noise level and increases the input impedance. Operation of electronic devices at low temperatures has been a key technology for decades,¹ e.g., in space research, for satellites and charge sensitive particle or radiation detection. The field came to birth with the pioneering work of Gerritsen and van den Burg² in 1951.

In case of FETs, the gate is either isolated from the source-drain channel by an insulating layer (MISFET, MOSFET) or by a reverse biased pn-junction (JFET).³ While a typical MISFETs still works at liquid helium temperature the JFET stops operation below 50 K due to freezing-out of the charge carriers. However, the JFET exhibits the advantages of a lower noise level and a larger robustness to uncontrolled electrostatic discharges.⁴ Thereby, JFETs are the preferred input transistors in charge sensitive preamplifiers or impedance converters. The device characteristics at low temperatures have been studied widely in basic research^4–11 or, e.g., for Ge-based particle detectors,¹² for infrared detection¹³ or for low-noise electrometers.^14,15

The ultimate input impedance of the JFET is determined by the leakage current which is the current through the reverse-biased pn-junction of the gate contact. It decreases exponentially with lower temperature as already shown in an early study in the temperature range between 260 and 360 K.¹⁴ The authors measured in one of their devices a leakage current of 10⁻¹⁴ A at 260 K. Recently, we could demonstrate that this value can be reduced by orders of magnitude using the commercial JFET BF545B at 80 K in an ultrahigh vacuum (UHV) environment with almost perfect electrical and thermal isolation.¹⁶ With open gate, i.e., with no connection of the gate to any outer terminal we observe currents of a few 10⁻²⁰ A. Accordingly, the present study draws the attention on the temperature dependence of the DC input and output characteristics and of the leakage current. Using standard models, the data allow the quantitative deduction of device parameters and its material properties.

In the experiments the commercially available n-channel Si JFET BF545B in a plastic surface mounted package (SOT23) is used.¹⁷ The gate contact is a p⁺n-junction which is biased in reverse direction with a negative gate-source voltage U_G. The respective currents and voltages are explained in the schematic sketch in Fig. 1. All voltages are relative to the zero at the source contact. The build-in potential across the depletion layer in the p⁺n-junction equals³ 

with E_gap as the total band gap energy which is 1.12 eV at room temperature (RT). The quantities N_c and N_d denote the effective density of states of the Si conduction band (2.8 ⋅ 10¹⁹ cm⁻³ at RT) and the dopant concentration, respectively. The build-in potential is the same as the total band bending in the junction at thermal equilibrium. For N_d = 7 ⋅ 10¹⁶ cm⁻³ (see Results and Discussion), the build-in potential exhibits a slight temperature dependence as it is 0.96 V at RT and 1.09 V at 150 K.

In Fig. 1 the width of the depletion layer W_d varies along the source-drain-channel if the drain-source voltage U_D≠0. The quantity a stands for the total width of the source-drain channel. To characterize the device at low temperatures the input characteristics $ID(UG)UD,T$ and the output characteristics $ID(UD)UG,T$ are recorded where I_D is the source-drain current or in short the drain current. The indices denote the variable parameters.

Three different experimental setups are used to perform the measurements. For recording current-voltage (IV) curves between RT and 160 K, the device is mounted on a ceramic carrier attached onto the cold head of a liquid nitrogen cryostat in UHV. The pins of the device are electrically connected to three isolated terminals what allows to probe currents and voltages with a source-measure unit (Keithley SMU236). The setup gives rise to a stray capacitance at the gate contact and an external leakage resistance due to conductive layers on the carrier and the terminal isolations. From the time constant in which the gate is discharged by a 10 GΩ resistor we deduce a stray capacitance of a few 10 pF. Similarly, discharging the gate without an additional resistor yields a leakage resistance of 10¹³ − 10¹⁴ Ω. For IV measurements below 160 K the device is mounted onto a chip carrier which is attached to the cold head of a He cryostat.

The leakage resistance of the described setups is by far too low to observe internal leakage currents in the sub-attoampere range across the gate depletion layer. Therefore, for measurements of extremely small currents the JFET is freely attached to the tip carrier of a low-temperature scanning tunneling microscope as described in detail in our previous publication.¹⁶ Only source and drain pins are connected to external sourcemeters and the gate contact remains open. The gate-source voltage U_G is initially set to the desired potential by moving the gate into a tunneling contact with an electrode on the defined potential. After subsequent opening the tunneling contact, the temporal variation of the drain current I_D is monitored. By use of the input characteristics of the device the corresponding change of the gate-source voltage U_G is determined. It is found that U_G varies almost linearly in time which indicates a constant leakage current. We determine the intrinsic gate capacitance as 4 pF at 80 K which allows to determine the charge variation on the gate from U_G. With the observed decay of the open gate charge in time the leakage current can be calculated as lost charge per time. With this method the gate voltage can be measured with an accuracy of below 10 μV which corresponds to approximately 250 elementary charges. Due to the extreme sensitivity of the setup the suppression of any external electric stray fields must be as perfect as possible.

The input and output characteristics of the BF545B at RT are plotted in Fig. 2 in agreement with typical IV-curves from the manufactorer’s data sheet.¹⁷ Physical properties of the device can be deduced from the data. For instance, saturation of the drain current occurs for drain voltages which fulfill

with the pinch-off-voltage

where ϵ_r = 11.9 denotes the static dielectric constant of Si.³ As explained later, a donor concentration of N_d ≈ 7 ⋅ 10¹⁶ cm⁻³ is expected. If the band bending at the drain contact reaches U_P the depletion layer at that contact extends over the entire source-drain channel width a.

The identification of the saturation voltages in Fig. 2(b) is somehow arbitrary because the I_D(U_D) curves exhibit a non-vanishing slope beyond saturation due to thermal heating and channel length effects.³ The blue line represents an intuitive guess which may be used to estimate the channel width a. For U_G = 0 a saturation value U_Dsat ≈ 5 V is observed. With the build-in voltage at the p⁺n-interface of U_bi = 1 V, a channel width of a ≈ 260 ± 30 nm is calculated from Eqs.(2) and (3).

At T = 165 K the drain current increases significantly for small absolute values of U_G as shown in Fig. 3. The negative slopes of the I_D(U_D) curve for large drain currents and voltages can be attributed to local heating of the device. The decrease of the drain current is related to the dissipated electric power. As expected from Eq.(2), there is hardly any change in the drain voltage at saturation because U_bi increases by only 0.1 V when the device is cooled down.

The variation of the input characteristics I_D(U_G) in the temperature range between 165 K and 296 K is displayed in Fig. 4 for U_D = 2 V. A strong increase of I_D is observed for vanishing gate voltage when the temperature is reduced. As explained later, this behaviour is due to the increase of the electron mobility in the source-drain channel. For larger absolute values of the gate voltage the variation of I_D becomes weaker. At U_G ≈ 2.1 V, the drain current stays constant and is almost independent of any temperature change. This remarkable result is elucidated when the drain current is described within the constant mobility model and for homogeneous doping. Then, the drain current up to saturation obeys the relation³ 

with

as the channel conductance. Its temperature dependence is determined by the electron mobility μ(T) as long as the free electron concentration n is constant. This regime is called charge carrier saturation since all dopant atoms are ionized, i.e., n ≈ N_d.

In case of silicon, μ(T) follows a power law T^−x with exponents x between 2.33 for low dopant concentrations and almost 0 for degenerate doping. Larger electron concentrations enhance the electron-electron scattering which finally dominates the temperature dependent electron-phonon interaction.

The function f(T) in Eq.(4) exhibits a weak linear temperature dependence governed by f(T) ≈ a(U_G) + bT with constants a and b. For U_G = 0 the constant a is much larger than bT and the conductance has a temperature dependence similar to the electron mobility. For U_G < 0, the constant a decreases and the linear relationship bT start to compensate the T^−x dependence of μ(T).

In Fig. 5 the drain current is plotted as a function of temperature for various gate voltages in a double-logarithmic diagram. The dashed lines represent linear fits to the data. The slopes are equal to the exponents − x. Obviously, the sign and the value of the exponent depend significantly on the gate voltage. For zero gate voltage, the relation

is found.

We apply the analytical formula for the electron mobility μ(T, n) in Si from Ref. 18 to estimate the charge carrier concentration in the source-drain channel, i.e.,

with T in K and n in cm⁻³. The T⁻¹ dependence of the mobility requires an electron concentration of n ≈ 7 ⋅ 10¹⁶ cm⁻³. Hence, the experimental data reveal a relative high donor concentration of the Si material but still well below degenerate doping.

For temperatures well below 100 K, free charge carriers start to freeze out. As a consequence, the channel conductance and accordingly the drain current drops exponentially with T. In Fig. 6 the input characteristics is plotted for assorted temperatures in the range between 30 K and 110 K and for U_D = 2.8 V. As before, we take the I_D at zero gate voltage to analyse the temperature dependence of the electron conductivity.

In Fig. 7 the respective drain current is plotted as a function of reciprocal temperature in an Arrhenius-type diagram. It demonstrates that the decrease of the electron concentration is governed by an exponential function below 50 K. In that region, it is expected that

where the activation energy ΔE is the energy difference between the conduction band minimum and the single donor ground state level, i.e., the ionization energy of the donor atom. According to Eq.(7) the temperature dependence of the mobility can be neglected in the freeze-out regime. The prefactor in front of the exponential in Eq.(8) has a weak T^0.75 temperature dependence due to the effective density of states. If we ignore the T^0.75 prefactor an activation energy of 38 meV is calculated from the linear fit in Fig. 7. Including T^0.75 yields ΔE = 33 meV.

We underestimate the ionization energy due to heating of the device. Most likely, the temperature of the device at cryostat temperature of 30 K is slightly higher. Hence, we expect ΔE ≈ 40 meV with an uncertainty of ± 10 meV. The value agrees well with the ionization energy of phosphorus atoms as donors in Si which is n-Si of 46 meV.³ 

In Fig. 7, the temperature dependence of the drain current between 50 and 100 K is again governed by the electron mobility which decreases with lower temperature due to the dominating electron-ionized donor scattering.

To determine the leakage through the gate depletion layer the device is brought into the thermally isolated environment of a low-temperature STM. At first, the gate contact is set on a defined reverse potential (U_G = −2 V) and it is then permanently opened. From the measured temporal variation of the drain current the decrease of the gate charge with time is calculated using the known input characteristics and gate capacity.

With lower temperatures the leakage current I_L drops exponentially and reaches a constant value below 160 K. This is demonstrated in the Arrhenius-type diagram in Fig. 8 which plots the normalized leakage current I_L/T^1.5 as a function of the reciprocal temperature. As explained below, the division by T^1.5 takes the weak temperature dependence of exponential prefactor into account. The leakage current arrives at the outstandingly small value of 5 ⋅ 10⁻²⁰ A at 80 K. Such currents may be due to discharging the gate by cosmic radiation or by parasitic currents through high-resistive layers.

Leakage in a pn-diode at very low temperatures is due to a generation current induced by thermal creation of electron-hole pairs at deep level traps in the depletion layer. We apply the Shockley-Read-Hall (SRH) theory^3,19,20 to yield its temperature dependence. Assuming mid-gap traps in a non-degenerate semiconductor the theory predicts a leakage current density under reverse conditions of

with W_d as the depletion layer width and τ as the generation lifetime which both are slowly varying functions of temperature. However, the intrinsic charge carrier density n_i depends exponentially on the temperature, i.e.,³ 

The solid line in Fig. 8 represents a linear fit to the exponential decrease over seven orders of magnitude. The slope corresponds to a gap energy of 1.13 ± 0.05 eV which is in perfect agreement with the expected Si band gap energy of 1.16 eV at T = 0 K.

In addition, the results in Fig. 8 demonstrate that JFETs at low temperatures can be used as impedance converters with an exceptionally large input resistance which is by orders of magnetude higher than what is heretofore available. As described earlier, also the bandwidth of the device is remarkably high.¹⁶ At a bandwidth of 10 kHz, a sensitivity of 250 elementary charges is observed.

The input and output characteristics as well as the gate leakage current of the JFET BF545B is studied in the temperature range between 30 and 300 K. The thermal variation of the drain current can be attributed to the electron conductance in the source-drain channel. As long as all donors are ionized, the temperature dependence of the drain current at zero gate voltage allows the determination of the dopant concentration. However, for a certain gate voltage the drain current becomes almost temperature independent. When the charge carriers begin to freeze out, the ionization energy of the dopant atoms can be determined from the drain current. A value of 40 meV is found in accordance to phosphorus as donor atom. The exponential decrease of the gate leakage current with lower temperatures is observed over seven orders of magnitude to values in the 0.01 attoampere range under open-gate conditions. There is clear evidence that the leakage current is due to the generation current in the reverse biased p⁺n-junction since the data reproduce the Si band gap energy when the Shockley-Read-Hall theory is applied. Impressively, the results demonstrate that cooled JFETs can be used as input transistors of ultra-sensitive electrometers and impedance converters with current loads in the sub-attoampere range.

We thank Prof. Dr. Axel Lorke and Dennis Oing (University of Duisburg-Essen) for the technical support and the opportunity to use a He-cryostat. The financial support by the Deutsche Forschungsgemeinschaft through No. SFB1242: Non-equilibrium dynamics of condensed matter in the time domain is gratefully acknowledged.