Moore’s law realities for recording systems and memory storage components: HDD, tape, NAND, and optical

Data are stored in isolated regions on media in storage components, i.e. in magnetic bits on tape media in cartridges, in magnetic bits on disk platters in HDDs, or in electric charge levels on silicon based NAND chips in SSDs. This paper examines the storage landscape trends for bit density and cost/bit associated with technologies that produce TAPE, HDD, and NAND/SSD components. Storage application decisions are dependent on density (i.e. component capacity) and cost. In the past, such decisions have assumed geometric progress, i.e. that an increasing figure of merit (density) grows by a factor (1+α)ⁿ where n is the number of years, 100α is the annual percentage increase and that a decreasing figure of merit (cost/bit) reduces by a factor (1-β)ⁿ where n is the number of years, 100β is the annual percentage decrease. Ideal Moore’s Law progress has α=0.41 (bit density doubles every two years) and β=0.29 (cost/bit halves every two years). An observation of this paper is that storage technologies are not achieving ideal Moore’s Law metrics. Physics and economic trends will be cited as reasons for this observation.

In 1965, Gordon Moore projected that the number of components (transistors, resistors, capacitors) in an integrated circuit (IC) would increase exponentially and the individual components would decrease in cost exponentially.¹ In 1975 Gordon Moore refined this projection by specifying that IC complexity would double on a two-year basis for the same cost.² For an IC, the doubling of the number of components and the halving of cost per component on a two-year basis became Moore’s Law. For storage applications, Moore’s Law is two-fold. First, it sets the expectation that any increase in bit density yields a proportional decrease in cost/bit; a statement that the cost to produce a unit area of storage stays constant when Moore’s Law expectations are satisfied. Second, it sets the ideal expectation that the increase in bit density doubles on a two-year basis and the cost/bit halves on a two-year basis. These two criteria imply β=α/(1+α) with α=0.41 and β=0.29 corresponding to the ideal Moore’s Law expectation.

In order examine the cost/bit and areal density characteristics for storage technologies, Table I presents updated 9-year technology trends³ for three storage media classes: NAND Flash, HDD, and LTO Tape Media. Data for this table are obtained from publically available sources: LTO Consortium, DRAMeXchange, Quarterly Report Statements from Seagate, Western Digital, Samsung, and Micron. Cost/bit data represents a value averaged over all products; total component revenue divided by total bits shipped in a year. Areal density refers to the maximum areal density in any product recognizing that technologies offer an array of products using different areal densities. Tape media data is for the LTO product space. NAND data is for manufactured dies and excludes solid-state drives using these components. LTO Tape Media data is for cartridges. After 2014 there is a discontinuity in the LTO Tape Media data for cost/bit related to changes in the LTO Consortium reporting of cartridge and bit shipments.

From these data, areal density and cost/bit trends are shown in Figure 1 and Figure 2. These logarithmic plots illustrate geometric characteristics as anticipated. Optical disc BD-XL media data are added for reference. Note that cost/bit data is for unit counts > 50 disks and that no public data exist for Exabyte shipments or industry revenue for this class of optical media.

Areal density and cost per bit data from Table I are recast in Table II by examining annual change trends over the last 8-year, 3-year, and 1-year ranges to better compare the growth of storage metrics relative to Moore’s Law performance. It should be noted that 1-year trends are subject to variability due to new product introduction timing. The 3-year averages are more representative of technology performance. From Table II areal density trends show no technology achieving the ideal 41% Moore’s Law metric for areal density; the driver for increased component capacity. NAND aided by lithography for fabricating smaller features and a migration from 2 bit/cell to 3 bit/cell structures has realized 33% annual increases in areal density. The typical two-year product cycles for LTO TAPE distort its 1-year areal density trend since the next LTO Tape product will be introduced in 2017. HDD areal density increases lag by a factor of ∼2 both the NAND and TAPE values. $/GB trends for NAND, HDD, and LTO Tape Media show annual decreases in the 20% range rather than the perceived Moore’s Law metric of 29%.

A graphical representation of these observations is shown in Figure 3 where cost/bit decrease (β) is plotted vs areal density increase (α) for the 8-year and 3-year time ranges along with the ideal Moore’s Law curve β=α/(1-α). For both LTO TAPE and NAND the 8-year data are $on̲$ the Moore’s Law curve while 3-year data fall below the Moore’s Law curve implying 1) market forces and/or 2) more cost with attaining the higher areal density. For HDD 8-year and 3-year data are above the Moore’s Law curve implying 1) market force competition with multiple suppliers and/or 2) incremental areal density improvements are cost effective since less development investment is required. General observations show that while 8-year cost/bit reductions were in the 20% to 25% range the 3-year cost per bit reductions were significantly reduced. The technology reality is that bit scaling is becoming more difficult with significant deviations from the Moore’s Law relationship between cost and density.

Bit scaling strategies for storage technologies are illustrated in Figure 4. Magnetic based technologies use traditional two-dimensional (2-D) scaling while NAND, and to some extent, optical technologies are moving to three-dimensional (3-D) scaling. The issue for 3-D scaling is processing multiple layers of bit cells simultaneously to control cost while the issue for 2-D scaling is the physics associated with smaller bit cells and the signal to noise ratio (SNR) associated with fewer state variables (i.e. charge, magnetic grains, phase change grains) within the bit cell.

For LTO Tape, large bit cells, in comparison with present day HDD cell sizes, are retained during scaling.⁴ Successful scaling to higher densities should be achieved since sensors and bit cells would be in the 500nm length scale range, significantly larger than present day HDD products. Further, LTO Tape bit cells can use the present and proven HDD technology to support these scaled bits. Moore’s Law metrics will be sustained assuming economic issues (single source suppliers) do not impact cost. Conversely, the scaled bit cells in HDD must approach the <20nm length scale (∼40X smaller than LTO Tape media length scales) which implies sensor widths/mechanical positioning in the sub 10nm range. These dimensions suggest that future scaling would be challenging for HDD and require new and costly magnetic, i.e. heat assisted,⁵ strategies. The HDD’s present low areal density annual rate increases of ∼10% demonstrate this deviation from Moore’s Law performance.

Recognizing processing issues associated with producing bit cells below the 25nm length scale, NAND is designing multi-layer or 3-D bit cell structures.⁶ NAND is increasing the physical bit area by a factor of N but adding N layers of cells in a stack and, most critically, processing all N layers simultaneously. As an example, for a NAND areal density of 1500 Gbit/in², a traditional planar cell with 19nm x 19nm or 379nm² area is equivalent to a 3-D cell with 84nm x 84nm or 7056nm² area if 19 layers of cells are stacked above this cell. Cost efficiency is achieved since all cells in the 20-layer stack are processed simultaneously like a planar cell.

Optical bits are recorded on the land region of a grooved media surface on which thermally sensitive material is deposited. Optical scaling uses two strategies:⁷ moving to recording on both the land and the valley region of the groove by increasing the groove pitch and using multiple layers of grooved media surfaces on the disc. The multi-layer strategy does not provide significant cost/bit benefits (Figure 2) since each layer on the disk is individually processed. Moving from 3-layer single sided disks to 6 layer double-sided disks adds twice the processing cost for twice the capacity. The cost/bit stays constant.

Moore’s Law has served as a technology metric for storage components for 40+ years. Tape, HDD, and NAND, and Optical technologies are no longer achieving the cost benefits from bit cell scaling relative to Moore’s law expectations. For non-magnetic based technologies planar scaling has moved to 3-D scaling strategies with significant success for NAND structures but with cost/bit deficiencies for Optical. Magnetic based technologies do not have 3-D scaling options. For HDD, 2-D scaling has become problematic with density increase rates significantly below Moore’s law expectation. For Tape, 2-D scaling continues since bit cells are 100X larger in area than HDD bit cells. In sum, both NAND and Tape should provide several generations of storage products that approach Moore’s Law expectations for component capacity and component cost.