Graphene–ZnO:N barristor on a polyethylene naphthalate substrate

Future flexible display technology requires flexible and transparent devices that have the ability to drive high-density pixel arrays with a high drive current. Several device options including organic thin film transistors (TFTs),^1–4 oxide semiconductor TFTs,^5–8 and 2D TFTs, such as graphene or transition metal dichalcogenide (TMD),⁹ are being actively investigated. Oxide semiconductor TFTs have both high mobility (1–100 cm²/Vs) and high transparency in visible wavelength range is already implemented in active-matrix organic light-emitting diode (AMOLED) display applications.^10,11 Organic TFTs have excellent physical properties suitable for flexible display applications and can be fabricated at low temperatures. However, their electrical properties such as drive current and carrier mobility (0.1–10 cm²/Vs) are still less competitive than other TFT devices.^12,13 As a result, there is currently no leading device technology for flexible TFT applications.

Graphene FET has promising physical characteristics for flexible TFT applications such as high carrier mobility (∼3000 cm²/Vs in Chemical Vapor Deposition (CVD) graphene), transparency (2.3% absorption per monolayer graphene), and flexibility (Young’s modulus is ∼1 Tpa).^14–16 Additionally, graphene can be transferred to any substrate in large scale, such as SiO₂ wafers or a plastic substrate such as polyethylene naphthalate (PEN) and Polyethylene terephthalate (PET).¹⁷ However, it is well known that the on/off ratio of graphene FET is too low to be utilized for most switching device applications. Various approaches to improve the on/off ratio of graphene FETs by generating a bandgap in graphene have not been successful because of concurrent mobility degradation.

As a result, alternative approaches utilizing the Schottky junction formed at the interface with other semiconducting materials have been actively pursued. The first Schottky junction device, dubbed as a barristor, was demonstrated using a graphene-silicon Schottky junction.¹⁸ It exhibited a high on/off ratio (10⁵) while maintaining high mobility characteristics of graphene. However, the graphene–silicon combination is not suitable for flexible display applications because the silicon device process is not compatible with the flexible substrate. Thus, other kinds of semiconductors that can be directly deposited on graphene with minimal process damage to graphene and a flexible substrate are required.

We have chosen ZnO for this purpose as ZnO has a wide direct band gap (E_g ∼ 3.4 eV at 300 K)^19–21 and can be easily etched in all acids and alkalis. Moreover, the doping type of ZnO can be modulated while maintaining optical transparency. Furthermore, the low temperature atomic layer deposition (ALD) process has been developed for ZnO and a high-quality thin film can be deposited onto a flexible substrate.²² Graphene-ZnO:N heterojunction devices fabricated on a SiO₂/silicon substrate have already been reported with a very high on/off ratio (∼10⁷).²³ 

In this study, the flexible, electrical, mechanical, and optical properties of the graphene-ZnO:N barristor fabricated on a flexible PEN substrate have been systematically examined to demonstrate the feasibility of the graphene-ZnO:N barristor for flexible TFT applications.

The schematic device fabrication process is illustrated in Fig. 1. A PEN substrate (thickness =125 μm) was attached to a 90-nm-thick SiO₂/silicon substrate after applying Polydimethylsiloxane (PDMS) as an adhesion layer. The SiO₂/silicon substrate works as a handling substrate holding the flexible substrate during the device fabrication process. The hard handling substrate prevents the distortion of flexible substrate and drastically improves the performance of the flexible device.¹⁷ The bottom-gate electrodes (Au, 50 nm) deposited on the PEN substrate using an e-beam evaporator were patterned using photolithography and a metal wet etch process. As a gate dielectric, a 30-nm-thick layer of Al₂O₃ was blanket-deposited. Then, a large sheet of CVD-grown graphene was transferred onto the substrate using a vacuum transfer method.²⁴ After the graphene transfer, the devices were annealed in a vacuum annealing chamber at 200 °C for 1 h at approximately 10^–7 Torr to improve the bonding strength of graphene, followed by a 30-nm-thick layer of gold hard mask deposition using the e-beam evaporator. After patterning the gold hard mask using photolithography and the metal wet etch process, the unnecessary portion of graphene outside the source electrode and the channel region was removed using the oxygen plasma based reactive ion etching (RIE) process. Then, the source electrode (Au, 50 nm) was formed on the PEN substrate using the e-beam evaporator, photolithography, and metal wet etch process.

After forming the source electrode on the graphene channel, 75 nm of ZnO:N layer was deposited by the ALD process for 500 cycles at 150 °C. To incorporate nitrogen into the ZnO layer, an in-situ nitrogen doping process was used with Zn (C₂H₅)₂ (DEZ) and NH₄OH (27%) as a precursor and reactant, respectively.²³ The ZnO:N layer was used to reduce the excessive electron concentration in the ZnO layer so that the Schottky barrier height (SBH) can be increased. The high SBH is a critical factor to achieve a high on/off ratio. The ZnO:N layer was patterned with an HCl:H₂O (1:400) solution to form the ZnO:N region on the graphene channel, which works as a Schottky junction region between graphene and ZnO:N. The area of ZnO:N layer was extended beyond the graphene channel region to form a contact-pad region landing a probe tip on the ZnO:N region. Finally, the PEN substrate with completed graphene-ZnO:N barristors was detached from the handling substrate.

Since all the device fabrication processes were carried out at temperatures below 200 °C, this process can be applied to a glass substrate or any other flexible substrates.²⁵ A photograph of the final device is shown in Fig. 2(a). The area enclosed with the red dashed line is the Schottky junction region. ZnO:N is placed on the graphene channel region, and the back-gate electrode controls only the Fermi level of graphene without affecting the conductivity of ZnO:N region on the graphene.

For display applications, the transmittance of the display driver device is an important factor. The optical transmittance of the same material stack used in this study, 75 nm ZnO:N/graphene/30 nm Al₂O₃/PEN substrate, was tested in a wavelength range of 400–800 nm. The transmittance of the total stack was over 80% in the visible wavelength range as shown in Fig. 2(b). The optical transmittances of the PEN substrate and stacked sample at 550 nm were 88% and 85.5%, respectively, as shown in Fig. 2(b). The additional reduction in the transmittance due to the device layer was only 2.5–3%. Since all the film stacks used in this study, except the Au electrode, exhibited high transmittance, a graphene-ZnO:N barristor with a transparent electrode can be a promising device option for a display driver device in terms of transmittance.

Fig. 3(a) shows a schematic band diagram of graphene-ZnO:N Schottky junction. The Fermi level of graphene can be modulated by the bottom gate electrode, which is not shown in the figure. Depending on the polarity of the gate bias, the Fermi level of graphene moves up (+ bias) and down (- bias). Relatively free movement of the Fermi level is a unique characteristic of graphene. Thus, the SBH decreases (+ bias) and increases (- bias) accordingly as we modulate the gate bias. As a result, a very high on/off ratio could be achieved with 2 V/dec subthreshold swing with 30 nm Al₂O₃ gate dielectric, as shown in Fig. 3(b). Since all the carriers measured at the drain have to go over the Schottky barrier, the actual barrier height can be extracted by modeling the current using a diode equation.

where A is the area of the Schottky junction at the graphene-ZnO:N contact region, A* is the effective Richardson constant, I_sat is the saturation current, q is the elementary charge, η is the ideality factor, R is the series resistance, k is the Boltzmann constant, T is the absolute temperature, and Φ_b is the Schottky barrier height. The ideality factor η extracted using $η=qkBTdVdlnI$ was ∼1.5, indicating that the quality of the interface between graphene and ALD-deposited ZnO:N was reasonable. The Richardson constant of ZnO:N showed a considerable amount of scattering within a range of 2–50 A/cm²K². Yet, it is not severely deviated from the theoretical value of the Richardson constant for ZnO, which is ∼32 A/cm²K². The experimentally extracted SBH was in the range from 0.47 eV to 0.73 eV at +15 V to −15 V, range as shown in Fig. 3(c). Since the work function of intrinsic graphene is 4.6 eV and the electron affinity of ZnO:N is 4.2 eV, theoretically, the initial SBH between graphene and ZnO:N should be ∼0.4 eV. The discrepancy between the theoretically predicted SBH and the experimentally extracted SBH was ∼0.22 eV. This difference can be attributed to the error in the experimental SBH extraction due to the series resistance component.

Once the SBH is set by the gate bias, the drain bias applied to ZnO:N layer controls the amount of current passing through the Schottky barrier. When a positive drain bias is applied, the electron in the graphene should go over the Schottky barrier. As a result, the current level is low, as in the case of the reverse current of Schottky diode shown in Fig. 3(d). On the other hand, when a negative bias is applied to the drain, the current level is very high, as in the case of the forward current of Schottky diode because the barrier height at the ZnO:N is relatively small. This rectifying behavior is less pronounced when a positive gate bias is applied because the SBH is already relatively small. Experimentally, ∼340 meV of SBH appears to be enough to generate an on/off ratio of over 10⁴. The on/off current of the graphene-ZnO:N barristor cannot be directly compared to those of other TFT devices because the drain current of the barristor increases in proportion to the area of Schottky junction while the current of the TFT devices is proportional to the channel width and inversely proportional to the channel length. Thus, the unit of the drive current shown in Fig. 3(d) is in A/cm² for the barristor. To compare the performance of a barristor with other TFT devices, the drive currents of various devices are normalized with the channel width, as shown in Table I. The off current of graphene-ZnO:N barristor (∼10⁻⁸ A/μm) is competitive with other TFT devices and can be further reduced by scaling down the length of the channel.

While there is a lot of room to improve the performance of graphene-ZnO:N barristor, the demonstration of very high carrier mobility, high on/off ratios, and good transmittance are very attractive attributes for flexible display applications. Thus, we performed the bending test for the graphene-ZnO:N barristor on a flexible PEN substrate to confirm the feasibility for flexible display applications. The graphene-ZnO:N barristors used for the bending test were fabricated on a 15 mm × 15 mm PEN substrate. The bending test was performed with bending radii of 10 and 20 mm while applying 0.5 V of drain bias to flow the current high enough for the reliability test. The strain applied to the device is calculated using the equation below.

where h is the thickness of substrate (125 μm), r is the bending radius, l_Top is the length of the top side of the substrate, l₀ is the intrinsic length of the substrate, θ is the angle, and ε is the strain.²⁶ The amount of strain is ∼0.3% at 20 mm bending radius and ∼0.6% at 10 mm bending radius. These values are commonly used in the bending tests of oxide TFT devices.

The on-current appears to decrease slightly as the bending radius is reduced from 20 to 10 mm, as shown in Fig. 4(a). However, the current level was fully recovered after the completion of the bending test. Similar results were observed at the repeatability test with a 10 mm bending radius. The on/off ratio of ∼10⁴ could be achieved, but slowly decreased by ∼20% after the 600 bending cycles, as shown in Fig. 4(b); however, no substantial physical damage was observed. The degradation rate during the repeatability test was 3.8% per 100 cycles. This value is better than that of the oxide TFTs, but worse than that of the organic TFTs.

Overall, the graphene-ZnO:N barristor on a flexible PEN substrate demonstrated very promising characteristics in terms of the leakage current, the process thermal cycle, and the bending test. These results are summarized in Table I. This is promising as there are many other aspects of graphene-ZnO:N Schottky barristor that can be further adjusted to improve the on/off current. Since the device stack degrades the total transmittance by only 2.5–3%, the graphene-ZnO:N Schottky barristor combined with a proper transparent electrode such as ITO can be a good candidate for flexible and transparent display systems in the future.

This research was supported by the Nano-Material Technology Development Program (2016M3A7B4909942) and Global Frontier Program through the Global Frontier Hybrid Interface Materials (GFHIM) (NRF-2013M3A6B1078873) of the National Research foundation of Korea (NRF), funded by the Ministry of Science and ICT, Korea.