Memory resistor based on GaAs 2D-bilayers

Equilibrium resonant electron tunneling is a well-established single-particle phenomenon in density-balanced bilayer two-dimensional electron gases (2DEGs). This tunneling process has been successfully modeled by considering the conservation of energy and in-plane electron momentum.^1–4 The calculation for the tunneling current is based on the tunneling probability for a single particle, which is determined by Fermi’s golden rule.^4–6 Recent studies on bilayer systems such as bilayer graphene-h-BN, graphene-WSe₂, WSe₂, and GaAs bilayers have revived interest in density-balanced tunneling,^7–11 demonstrating significantly enhanced interlayer tunneling.

Here, we investigate the transport characteristics of electron bilayers, consisting of two GaAs quantum wells (QWs). These are separated by Al(Ga)As barriers of exceptionally narrow widths, which have not been systematically investigated so far. A method of epitaxially integrating patterned back gates developed in our group allows us to establish ohmic contacts to each QW independently. The tunneling conductivities in our devices agree remarkably well with the single-particle resonant tunneling (RT) model. As expected, current–voltage dependent (I–V) characteristics show an augmented interlayer conductivity at balanced densities and a negative differential resistance (NDR) for interlayer voltages going beyond balanced densities.

However, under forced tunneling currents, the voltage–current dependent (V–I) curve features distinct discontinuities. The 2D–2D tunneling conductivity slowly decreases from its maximal value for increasing tunneling currents, until a critical tunneling current is reached. At this point, a pronounced interlayer voltage build-up immediately misaligns the Fermi levels of the 2DEGs, abruptly reducing the absolute tunneling conductivity. Furthermore, the V–I trace is hysteretic due to the NDR behavior of the device. This hysteretic dependence on the tunneling current enables the device to function as a hysteretic threshold current switch, also known as volatile memory resistors, which have been investigated in a variety of material systems.^12–16 

In addition, we show that 2D–2D RT is highly susceptible to a perpendicular magnetic field and increasing temperature, as previously reported for RT.^3,17,18 Specifically, we show that the critical current for the threshold switch is reduced and the step-like increase in conductivity becomes progressively smoother for increasing magnetic fields as well as for increasing temperatures. Consequently, such volatile memory resistors are well suited as low-power cryogenic neuromorphic computing hardware.¹⁹ 

Our devices are grown by molecular beam epitaxy on GaAs substrates. Device A has two 18.7 nm wide GaAs QWs and an Al_0.8Ga_0.2As barrier of 6 nm, similar to the device investigated in Ref. 11. Device B has two 25 nm wide GaAs QWs and an Al_0.8Ga_0.2As barrier of 8 nm. The heterostructure was designed to achieve balanced densities in the QWs and high charge carrier mobilities, utilizing an optimized design of large setback distances and asymmetric δ-layers of Si-dopants above and below the QW region. Device A exhibits a mobility of $≈1.8⋅106$ cm² V⁻¹ s⁻¹ at a density of 0.92 · 10¹¹ cm⁻² in each QW. Device B has a mobility of $≈2⋅106$ cm² V⁻¹ s⁻¹ at a density of 1.3 · 10¹¹ cm⁻² in each QW.

A Hall bar, 200 μm wide and 1250 μm long, was fabricated by photolithography and wet-chemical etching. A patterned, conducting, silicon doped GaAs epilayer with local oxygen ion implantation forms pinch-off back gates, allowing to contact the two layers independently.^20,21 Similarly, Hall bar spanning global top and back gates allow tuning the electron densities of each 2DEG independently.

We record the interlayer tunneling conductivity at cryogenic temperatures in the mK range in a dilution refrigerator, using two different methods—active and passive measurement—depicted in Figs. 1(a) and 1(b). The active measurement technique enables precise control of the interlayer voltage and allows us to extract the tunneling conductivity and analyze non-linear effects, such as NDR. The passive measurement is vital to observe hysteresis. For the active method, a voltage regulator controls the interlayer voltage via a four-point measurement. The regulator adjusts the current flow to and from each 2DEG independently until the desired interlayer bias is reached. The input and output signals of the regulator are controlled by lock-in amplifiers. The tunneling conductivity is calculated from the interlayer bias and the tunneling current provided by the regulator. The second method is passive, whereby a current is forced to tunnel between the two 2DEGs, and the resulting interlayer voltage drop between the layers is recorded. The tunneling current is generated by a source measure unit with a 1 MΩ preresistor. The tunneling conductance is calculated from the measured interlayer voltage and the current drawn from the source unit.

In Fig. 2, we display I–V and dI/dV data from device B using the voltage regulator. In (a), the gate voltages are set such that the densities in the two 2DEGs are balanced, n_top = n_bot = 1.3 · 10¹¹ cm⁻². The inset magnifies the region from −0.5 to 0.5 mV. Whenever the Fermi levels of the two QWs align, the rate of change for the tunneling current becomes maximal, resulting in a Lorentzian peak for the conductivity and a peak tunneling conductivity of up to 3.25 mS/mm², as seen in the inset of (b).

In the off-resonant tunneling regime, the conductance remains in the low microsiemens range. Notable is the interlayer bias region around the steep slope in Fig. 2(a). Here, the tunneling current drops and exhibits a negative differential behavior. The sudden reduction in tunneling current and conductivity stems from the misalignment of the Fermi levels between the two 2DEGs provoked by the interlayer bias. We note that this misalignment of the Fermi levels may be modified by the quantum capacitance of the bilayer system as it affects how sensitive the Fermi levels respond to an applied interlayer bias. Small density variations near the threshold current could slightly influence the NDR and the hysteresis of the device. In Fig. 2(b), we show the dI/dV for different ratios of top to bottom layer densities. The conductivity peak shifts linearly with the change in the density ratio.

The calculation of the RT current is based on Fermi’s golden rule. An electron can tunnel between the layers only when the state it occupies in one QW is unoccupied in the other, i.e., the energy and the in-plane momentum of the electron must be conserved. The conservation of both properties strongly limits the available states. 2D–2D tunneling occurs in the narrow region for balanced densities and zero interlayer bias where the Fermi levels of the two 2DEGs align and whenever the finite interlayer bias voltage compensates for the imbalanced densities.

The calculated tunneling current at resonance agrees with the experiment, as shown in Fig. 2(a). The full-width at half-maximum in the inset in Fig. 2(b) determines the quasi-particle broadening 2Γ = 97.4 μeV for our calculation. This value is obtained by fitting a Lorentzian to the dI/dV curve. Our Γ = 48.7 μeV is small compared to values reported by Murphy et al.¹ The short quantum lifetimes may be a result of the high RT conductivity in our devices with thin barriers.

The remaining parameter for the calculation of the tunneling current is Δ_SAS. A tunnel splitting of Δ_SAS = 140 μeV fits the measured tunneling current best. This value agrees with the expected value for a bilayer system with an 8 nm barrier, where the energy level splitting between the symmetric and antisymmetric wave functions is calculated quantum mechanically.²² 

For passive measurement, a constant current is forced to tunnel between the two density balanced layers. Due to the finite tunneling resistance, any tunneling current leads to an interlayer voltage between the two 2DEGs. For small currents, the device operates in the RT regime, exhibiting a high conductivity and hence showing small interlayer voltages, as seen in Fig. 3(a). At a critical current of $≈200$ nA, the interlayer voltage jumps discontinuously to several millivolts. This discontinuity arises from a positive feedback loop. The tunneling current misaligns the Fermi levels, leading to a decrease in tunneling conductivity, which in turn enhances the misalignment of the Fermi levels. This positive feedback loop acts until potential build-up in the layer becomes large enough for electrons to overcome the potential barrier imposed by the pinch-off gates.^23,24 The critical current, related to the limit of the RT regime, is determined by the discontinuity in the interlayer voltage. On the other hand, starting from a high tunneling current, the Fermi levels are initially misaligned and an interlayer voltage in the millivolt regime is measured. This high interlayer voltage persists for tunneling currents below the critical current due to the NDR, which causes a direction dependent hysteresis. The hysteresis is symmetric around 0 tunneling current.

As shown in Fig. 3(b), we investigate the interlayer voltage for forced tunneling currents in device A, subjected to perpendicular magnetic fields. We observe a strong magnetic field dependence. The critical tunneling current of $≈±4μA$ at zero field is first reduced and vanishes for stronger magnetic fields. For increasing magnetic fields, the curve becomes continuous. The suppression of RT for increasing magnetic fields appears to be gradual, with no critical magnetic field B_c. This suppression of RT is due to the formation of a gap in the tunneling density of states, until inter-Landau-level RT occurs.^2,3,18,25,26

In Fig. 3(c), the temperature dependence of the tunneling conductance at balanced densities for device A is shown for forced tunneling currents. Increasing the temperature from 70 mK to 0.95 K has little effect on the interlayer voltage. For temperatures above 1.3 K, the critical current increases while the step height decreases, due to broadening of the Fermi distributions. This allows for a higher interlayer voltage before the Fermi levels are misaligned. Given that conductivity in the RT regime is unchanged for higher temperatures, the increased interlayer voltage range results in an increased critical current. Furthermore, this broadening excites electrons to higher momenta and energy states. This allows them to overcome the potential barrier posed by the pinch-off gates, reducing the step height.²⁴ For temperatures as high as 3 and 5 K, the discontinuity eventually vanishes. As seen, the thermal broadening smears the curve completely and the slope around zero current increases, reducing the tunneling conductance.

The symmetric behavior of the device is also seen in Figs. 4(a)(i)–4(a)(iii) for time dependence. Panel (i) shows the linear current voltage behavior below threshold. In this regime, the interlayer conductivity is high, corresponding to RT. The hysteresis is observed once the tunneling current surpasses the threshold current, as seen in panels (ii) and (iii). The interlayer voltage abruptly changes and remains in the high millivolt range until the tunneling current reaches zero. The difference between panels (ii) and (iii) is that the critical current is reached after a shorter time.

The threshold switching behavior and the hysteresis observed in the passive measurements are an implementation of a volatile memory resistor. Here, the absolute conductivity is dependent on the history of the tunneling current. For density balanced gate configurations, the two 2DEGs function as a symmetric two terminal current-switch, with the critical current being the threshold value. The characteristics of such a current-switch depend on the device geometries. First, the RT conductivity depends on the barrier thickness and on the barrier height. The barrier height is governed by the aluminum concentration within the barrier. Since devices A and B have the same Al_0.8Ga_0.2As barrier composition, we can compare the tunneling conductivity between the different barrier thicknesses at zero bias. Device A has a tunneling conductance of 400 mS/mm², and device B has a conductance of 3.25 mS/mm². These values are comparable to those reported by Blount et al.²³ Furthermore, the RT conductivity also determines the critical current since the interlayer voltage equates to the tunneling current divided by the conductivity. A higher conductivity leads to a higher maximal RT current. This is clearly seen by the comparison of devices A and B with ≈4 μA and ≈200 nA, respectively. The tunneling conductivity is proportional to the active tunneling area. Both our devices have the same device geometry.

Second, from Fig. 4(a)(ii), an on-off ratio of 23:1 is established. This ratio mainly depends on the interlayer voltage sustained by the off resonant state. As mentioned above, the interlayer voltage will mainly drop off at the potential barrier imposed by the pinch-off gates at the Hall bar leads.^23,24 The pinch-off gate voltage influences this off resonant state voltage. As shown in Fig. 3(a), the pinch-off gate barrier potentials have been set asymmetrically. Hence, the interlayer voltage for negative currents is lower than that for positive currents. As shown in Fig. 4(a), the potential barriers imposed by the pinch-off gates have been tuned symmetrically and are roughly 10 meV. Furthermore, increasing the widths of the pinch-off gates would improve the on-off ratio of the device, as would larger negative pinch-off gate voltages.

Finally, the geometry of the device also affect the frequency dependence of the volatile memory resistor. In Fig. 4(b), we show the time dependence of device B in the passive measurement setup. In panels (i)–(iii), the interlayer voltage jumps as the tunneling current passes the threshold current. At frequencies of 400 Hz and 1 kHz [panel (iv) and (v)], the current threshold for negative currents is not met, resulting in a low negative interlayer voltage. We attribute this frequency dependence to be intrinsic to our device. The two layers of the device form a plate capacitor. The asymptotic behavior of the reactance of the capacitor leads to an increase in the tunneling conductivity. This increase in conductivity increases the critical current, and hence, the device remains in the RT regime. The measurement lines and low-pass filters built in the experimental setup can be excluded as a cause for the observed frequency dependence, as their cutoff frequency is well above 5 kHz. To operate the device at a higher frequency, one could force larger tunneling currents or reduce the capacitance by shrinking the device. As a last point, we want to remark that there is a capacitive lag of the dilution fridge and the device, causing a constant delay in the interlayer voltage response relative to the input signal. Independent of the input frequency, we get a phase delay of 1 ms, which can be seen in panels (ii)–(iv).

In conclusion, we measure RT behavior for bilayer devices with 6 and 8 nm barriers. The dI/dV tunneling conductivity matches the numerical calculations backed by Fermi’s golden rule. Breaking the RT condition, we observe an NDR behavior for bias voltages that exceed the range of aligned Fermi levels. For current forced measurements, the NDR results in a step-like increase for the interlayer voltage and for the absolute conductivity going beyond the critical current. There is a hysteresis due to the NDR in the I–V curve; hence, the bilayer system functions as a threshold current switch. For balanced 2DEG densities, this volatile memory resistor operates symmetrically with respect to the sign of the tunneling current. The thickness of the barrier governs the conductivity in the linear RT regime as well as the value of the critical current. Furthermore, we show that the critical tunneling current is reduced in magnetic fields. As the tunneling conductivity decreases with magnetic field, the critical current and the interlayer voltage step diminish. Similarly, the voltage step in the V–I curve vanishes for increased temperature due to the thermal broadening of the Fermi distribution that obstructs the NDR.

We acknowledge the financial support from the Swiss National Science Foundation (SNSF) and the NCCR QSIT (National Center of Competence in Research - Quantum Science and Technology).

The authors have no conflicts to disclose.

C. Marty: Data curation (lead); Formal analysis (lead); Project administration (equal); Visualization (lead); Writing – original draft (lead). Z. Lei: Formal analysis (supporting); Writing – original draft (supporting). S. Silletta: Data curation (supporting). C. Reichl: Resources (supporting); Writing – original draft (supporting). W. Dietsche: Formal analysis (supporting); Writing – original draft (supporting). W. Wegscheider: Formal analysis (supporting); Project administration (equal); Supervision (equal); Writing – original draft (supporting).

The data that support the findings of this study are available from the corresponding author upon reasonable request.