This article investigates the failure mode and mechanism of copper pillar solder joints in temperature cycling experiments, focusing on a Cu/nano Ag/Cu solder joint structure. The hot pressing bonding condition at 300 °C with insulation for 10 s is chosen for the experiments. Based on the life test results, the thermal cycling fatigue life of the nanosilver solder joint is determined to be 2050 cycles. To gain further insights, finite element software ANSYS is employed to simulate nanosilver solder joints in flip chips, revealing the stress–strain distribution within the solder joints. The simulation utilizes the Anand viscoplastic constitutive model for the solder joint, providing a reasonable representation of the stress–strain behavior under thermal cycling load. Notably, the simulation highlights that the maximum stress and strain occur in the contact area between the solder joint and the copper column. To enhance accuracy, the calculation equation is refined using relevant experience, resulting in a prediction of the thermal fatigue life of nanosilver solder joints. This prediction aligns closely with the experimental results. The research outcomes not only contribute valuable insights into the behavior of nanosilver solder but also serve as a reference for its application in electronic packaging.

Nanosilver paste is a prospective electronic packaging interconnect material, and it can overcome some insufficiencies in alloy solder.

  1. Metal silver with high heat conductivity (410 W/m K); some research works show when nanosilver paste firing, the thermal conductivity can also reach (229 W/m K), able to fulfill the demand for the cooling of high power density packaging systems.

  2. Simultaneously, because of the size effects of nano, the melting point and sintering temperature of nanosilver particles are much lower than those of bulk silver. The surface melted nanoparticles are sintered together through the action of liquid-phase capillary force, ultimately forming a sintered material with a melting point similar to that of bulk materials. Nanosilver paste sintered connect can be obtained at lower processing temperatures and work at higher temperatures, avoiding the occurrence of remelting during the packaging and interconnection process. This feature is very suitable for multi-level packaging.1–3 

  3. The sintered joints of nanosilver slurry are composed of a homogeneous microstructure. Through sustained aging experiments, the shear strength exhibits minimal variation. The nanoscale silver particles effectively immobilize dislocations and impede crack growth, thereby enhancing the fatigue life of the solder joints.

There are few studies on the application of nanosilver paste in flip chip interconnection. This study focuses on the interconnection of flip chip using nanosilver slurry. The particle size diameter of the nanosilver slurry used in this article is 30 nm, with a mass fraction of 82%. Nanosilver is considered a viscoplastic material, and the Anand unified viscoplastic constitutive model is adopted for its characterization. The thermal cycling process is simulated using finite element analysis, and the stress-strain state and cyclic failure of nanosilver solder joints are predicted and analyzed.

The flip chip used in this paper is customized by the Wuxi Huajin semiconductor company. The upper chip contains 54 chips with a diameter of 100 µm nanosilver paste solder joint, and the bottom plate is the silicon substrate, as shown in Figs. 1(a) and 1(b).

FIG. 1.

Flip chip and bottom plate: (a) flip chip (upper chip) and (b) bottom plate (lower chip).

FIG. 1.

Flip chip and bottom plate: (a) flip chip (upper chip) and (b) bottom plate (lower chip).

Close modal

Copper pillar solder joints can effectively alleviate current congestion in solder joints, improving the electromigration life of solder joints, effectively reducing the pitch of solder joints, but also introducing high stress inside the solder joints. Under this background, copper pillar’s thermal mechanical reliability and the performance of nanosilver solder joints at cyclic temperatures are important reliability issues.

The temperature cycling equipment used in the experiment is the SD-308 single box temperature cycling test chamber, as shown in part 1 of Fig. 2. The temperature rise and fall rate of this circulation box is 25 °C/min, and the temperature range was −60 to 200 °C, possessing two modes of speed control and time control. To ensure that each cycle has the same cycle, this article uses a time control model to write programs, as shown in part 2 of Fig. 2. Combined with the JEDEC104 standard, the temperature cycle range is selected as −50 to 150 °C, and peak temperature’s soaking time of 10 min. Based on the actual operating conditions of the equipment, the temperature rise and fall time is set to 8 min, so each cycle is 36 min. The temperature change curve used in the experiment is shown in Fig. 3.

FIG. 2.

Temperature cycling test chamber.

FIG. 2.

Temperature cycling test chamber.

Close modal
FIG. 3.

Temperature cycling curve for the experimental setup.

FIG. 3.

Temperature cycling curve for the experimental setup.

Close modal

The sample used in the experiment has a diameter of 100 µm Cu-Pillar Bumps flip chip, made using the CB-600 inverted bonding machine. The bonding temperature, pressure, and time of 300 °C, 0.05 N, and 10 s were selected, combining literature research and finite element simulation results. Five samples were used for the experiment. Based on the resistance monitoring results, the experimental chip takes out corresponding samples when the resistance changes and the circuit is open circuit. Epoxy resin for the cold embedding of removed chips was used, and the sample was ground to the outermost row of welding points using a diameter of 1 µm polishing with diamond suspension. Then, the metallographic SEM analysis was conducted to observe the morphology and structural changes of the solder joints.

In the experiment, one of the daisy chains of the chip was selected for resistance testing to preliminarily determine the lost efficacy of internal solder joints. The resistance detection equipment is shown in part 3 of Fig. 2; as a DC current source, it can output resistance changes during testing and set a safe voltage. When the daisy chain resistance of the chip exceeds the set value, the current can be disconnected.

Based on the results of resistance changes in the experiment, we take out a certain amount of chips for metallographic analysis when the resistance value just changes and the resistance is open circuit. Figure 4 shows the diagram of the variation of chip resistance with cycle time. As shown in the figure, the resistance of chip daisy chains varies with cyclic temperature, always fluctuating between 0.4 and 0.6 Ω, and then, the resistance delayed rises. Finally, complete open-circuit failure occurred. According to the resistance value detection situation, we take out the chip grinding sample at points A and B in the corresponding figure to observe the cross-section.

FIG. 4.

Daisy chain resistance variation diagram of copper pillar tin silver solder joints.

FIG. 4.

Daisy chain resistance variation diagram of copper pillar tin silver solder joints.

Close modal

The sample was extracted, which exhibits the initial resistance change at point A, and then, we examined its cross-sectional image. In Fig. 5, the cross-sectional perspective displays all solder joints in the initial row of the chip, where the resistance values are situated at point A. After undergoing 2050 cycles, a noticeable alteration in the resistance value of the sample becomes apparent. As illustrated in the figure, the solder joint positioned at the array’s corner exhibits a crack, extending throughout the entire solder joint region. In Fig. 6, the cross-sectional depiction of the chip at point B in the resistance variation diagram is presented. After 2780 cycles, the daisy chain of the sample has undergone complete disconnection. Although the chip retains a certain level of connection strength, a majority of the internal solder joints have fractured. In addition, the solder joints located at the corners of the array exhibit substantial crack gaps.

FIG. 5.

Cross-sectional diagram of the first row of solder joints with resistance value at point A.

FIG. 5.

Cross-sectional diagram of the first row of solder joints with resistance value at point A.

Close modal
FIG. 6.

Cross-sectional diagram of the first row of solder joints with resistance value at point B.

FIG. 6.

Cross-sectional diagram of the first row of solder joints with resistance value at point B.

Close modal

Following 2050 temperature cycles, the inverted chip underwent the resistance measurement, revealing a significant increase in resistance. The examination of the outermost row of solder joints through SEM imaging revealed fractures within the solder joints located at the corner of the array, as depicted in Fig. 7. This figure illustrates the fracture interface of the solder joints. The visual analysis indicates a noticeable deviation of the copper pillar from its initial position in both left and right directions. Moreover, a pattern of regular voids and gaps exists between the cracks of the solder on the upper and lower sides. Specifically, the crack on the right half of the solder joint closely aligns with the interface between the copper pillar and the solder. In contrast, the crack on the left extends into the tin solder body.

FIG. 7.

SEM image of the fracture section of the corner solder joint.

FIG. 7.

SEM image of the fracture section of the corner solder joint.

Close modal

The cross-sectional image of the corner weld after 2780 cycles is presented in Fig. 8. A clear observation from the figure reveals that the cracks, progressively expanding on both sides, are reaching toward the center and initiating a merging process. Notably, as depicted in Fig. 8, when a crack initiates in the corner of the copper pillar, it traverses through the interface between the copper pillar and the solder. Under the reciprocating influence of cyclic stress, this process gradually gives rise to wavy linear cracks in the solder. Further analysis of Fig. 8 illustrates that the serrated cracks and voids primarily stem from cyclic stress induced by temperature fluctuations. As the cyclic stress acts upon the solder, it undergoes shearing movements, resulting in the gradual formation of new voids within the solder body. These newly formed voids merge with the endpoints of the existing cracks, leading to the creation of elliptical micropores and a distinctive wavy crack morphology when the residual connected solder is ultimately torn.

FIG. 8.

Cross-sectional SEM images of corner weld points after 2780 cycles.

FIG. 8.

Cross-sectional SEM images of corner weld points after 2780 cycles.

Close modal

Continuing the investigation, the inverted chip with an open daisy chain resistance value was subjected to 2780 cycles, extending the analysis until 3000 cycles of overheating. Following this, the sample chip was carefully pulled and cut off the substrate for a detailed examination of the cross-sectional morphology of the copper pillar on the chip side under an electron microscope. Figure 9 vividly depicts the solder’s dimples, providing a clear visual representation. Ductile dimples emerge as the primary characteristic of metal plastic fracture, encompassing the fracture surface of microporous aggregates. These dimples represent the morphology left on the cross-section due to the nucleation, growth, and merging of microvoids, ultimately resulting in connection fracture. The figure prominently displays tearing edges surrounding the dimples, indicative of a typical ductile fracture resulting from the aggregation of dimples. In contrast, the cross-sectional morphology of the residual solder on the outer edge of the copper pillar differs. It is not characterized by ductile dimples but rather closely resembles the fatigue-induced striation morphology. The extension direction of the striation aligns parallel to the direction of cyclic stress on the solder joint.

FIG. 9.

Tough dimples and fatigue striations on the cross-section of copper columns.

FIG. 9.

Tough dimples and fatigue striations on the cross-section of copper columns.

Close modal
The Anand model, introduced by Anand and Brown4 among others, constitutes a viscoplastic framework specifically devised for modeling the thermal processing of metals. Applicable for delineating significant viscoplastic and minor elastic deformations, the viscoplastic Anand model establishes the saturated stress–strain rate relationship as expressed by the following formula:
σ*=sξε̇pAexpQRTnsinh1ε̇pAexpQRTm.
(1)
The formulation depicting the correlation between stress and strain under varying temperatures and strain rates is articulated as follows:
σ=σ*σ*cs01α+α1ch0σ*αεp11α,α1.
(2)

The above equation contains nine parameters of Anand’s constitutive equation: A, Q/R, ξ, s′, n, m, α, h0, s0. The constitutive equation model parameters for nanosilver include constants, such as activation energy divided by the gas constant, stress multiplier, saturation coefficient of deformation impedance, strain rate sensitivity, strain rate sensitivity index, strain hardening parameter, strengthening coefficient, and the initial value of deformation impedance. These parameters were calculated through formula derivation and are presented comprehensively in Table I.5 

TABLE I.

Anand model parameters of the nanosilver matrix.

A (s−1)Q/R (1/k)mnξs′ (MPa)h0 (MPa)s0 (MPa)α
9.81 5709 0.6572 0.003 26 11 67.389 15 800 2.768 
A (s−1)Q/R (1/k)mnξs′ (MPa)h0 (MPa)s0 (MPa)α
9.81 5709 0.6572 0.003 26 11 67.389 15 800 2.768 

To streamline the investigation into the thermal fatigue impact on solder joints, simplifying the model becomes imperative. Leveraging the symmetry, we can focus on a quarter of the chip as the research subject, encompassing 12 solder joints. The model, illustrated in Fig. 10, is established accordingly. Refer to Tables II and III for the material parameters of each component.6 

FIG. 10.

Schematic diagram of the finite element model.

FIG. 10.

Schematic diagram of the finite element model.

Close modal
TABLE II.

Material properties of each component.

MaterialElastic modulus (GPa)Poisson’s ratioThermal expansion coefficients (10−6/°C)
Chip (silicon) 131 0.3 2.8 
Copper pillar 110 0.34 16.4 
Nanosilver See Table III  0.37 19.6 
MaterialElastic modulus (GPa)Poisson’s ratioThermal expansion coefficients (10−6/°C)
Chip (silicon) 131 0.3 2.8 
Copper pillar 110 0.34 16.4 
Nanosilver See Table III  0.37 19.6 
TABLE III.

Elastic modulus of nanosilver at different temperatures.

Temperature (°C)−5002560120150
Elastic modulus (GPa) 9.01 7.96 6.28 4.52 2.64 1.58 
Temperature (°C)−5002560120150
Elastic modulus (GPa) 9.01 7.96 6.28 4.52 2.64 1.58 

The size of grid divisions plays a pivotal role in both calculation time and the ultimate analysis results. To strike a balance between ensuring grid effectiveness, maintaining calculation accuracy, and optimizing computation time, it is imperative to adopt varied grid divisions for each component. In the mesh division of this model, a size controller with a length of 0.005 was employed for solder joints and copper columns, while a size controller with a length of 0.02 was applied to the chip part. Both implementations utilized mapped mesh divisions, resulting in a total of 1 334 400 mesh units. Figure 11 visually depicts the mesh division configuration.

The thermal cycle loading load is determined based on potential scenarios encountered during service. This involves subjecting the material to a temperature range spanning from −50 to 150 °C. The temperature experiences a rise and fall at a rate of 25 °C/min. Specifically, it is held at the highest temperature for 10 min and similarly maintained at the lowest temperature for another 10 min. This entire thermal cycle, from the lowest to the highest and back, constitutes a period lasting 36 min. Based on current research findings, solder joints undergo periodic variations in stress and strain during thermal cycling. As these joints experience multiple cycles of loading, the observed results gradually stabilize. For the purpose of this model, the analysis focuses on five specific cycles,7 as shown in Fig. 3.

The substrate is securely installed on the fixture. Zero displacement constraints are applied in all directions to the bottom surface of the lower chip. Simultaneously, single-direction zero displacement constraints are imposed on the two symmetrical surfaces of the upper chip.

The simulation endured for a total of 20 400 s. Following its completion, we utilized the POST_26 post-processing program to examine the stress and strain diagrams encompassing the entire chip. The analysis revealed an absence of notable stress or strain in the chip area, as depicted in Figs. 12(a) and 12(b).

FIG. 12.

The stress–strain diagram of the chip after simulation is completed: (a) chip equivalent stress diagram, (b) chip equivalent strain diagram, (c) enlarged diagram of equivalent stress of the solder joint, and (d) enlarged diagram of the equivalent strain of the solder joint.

FIG. 12.

The stress–strain diagram of the chip after simulation is completed: (a) chip equivalent stress diagram, (b) chip equivalent strain diagram, (c) enlarged diagram of equivalent stress of the solder joint, and (d) enlarged diagram of the equivalent strain of the solder joint.

Close modal

Upon closer examination of the stress–strain diagram at the solder joint, depicted in Figs. 12(c) and 12(d), a noteworthy observation emerges. A substantial amount of stress manifests at the contact interface between the outer edge of the solder joint and the upper and lower copper columns. Simultaneously, a considerable amount of strain is evident within the solder joint itself. The peak stress–strain occurs at the center of the solder joint, gradually propagating outward under the influence of cyclic temperature loading. As this stress reaches the contact surface with the upper and lower copper columns, deformation transpires due to the disparate material properties of the two components. From these observations, one can infer that if the simulation persists, fatigue cracking will likely initiate at the interface between the solder joint and the upper and lower copper pillars, ultimately resulting in chip failure.

To enhance the clarity of analyzing the stress–strain behavior of solder joints under thermal cycling loads, the focus is directed toward a specific node positioned at the center of the solder joint. A stress–strain curve is plotted for meticulous analysis, as depicted in Figs. 13(a) and 13(b). The graph illustrates the equivalent shear stress curve of the middle node within the solder joint over time. The horizontal axis denotes time, while the vertical axis represents the stress variation of the node. Notably, the equivalent shear stress of the node exhibits periodic fluctuations concomitant with the progression of thermal cycling.

FIG. 13.

Equivalent stress–strain curve of solder joints: (a) equivalent stress curve of solder joints over time and (b) curve of solder joint equivalent strain over time.

FIG. 13.

Equivalent stress–strain curve of solder joints: (a) equivalent stress curve of solder joints over time and (b) curve of solder joint equivalent strain over time.

Close modal

Figure 14 illustrates the gradual increase in the viscoplastic strain energy density of the solder joint over time. Remarkably, the increment in this density during each cycle remains consistent.

FIG. 14.

Strain energy density of solder joints over time.

FIG. 14.

Strain energy density of solder joints over time.

Close modal

The stress–strain hysteresis curve of the internal nodes within the solder joint is depicted in Fig. 15. The horizontal axis represents the equivalent shear strain of the internal nodes of the solder joint, while the vertical axis represents the equivalent shear stress of that node. From the graph, it can be observed that, with the loading of temperature cycling loads, the stress–strain hysteresis.

FIG. 15.

Stress–strain hysteresis curve of solder joints.

FIG. 15.

Stress–strain hysteresis curve of solder joints.

Close modal

Under the influence of thermal cycling loads, the stress–strain characteristics of solder joints become intricate. Various factors, including time, temperature, and solder composition, contribute to the overall performance of these joints. It is crucial to note that plastic strain serves as the primary factor leading to the cracking and ultimate failure of solder joints. Consequently, we employ the Manson Coffin strain fatigue model for the prediction of solder joint life.

In the 1950s, Coffin and Manson published a paper proposing the relationship equation of NfΔεpβ.8,9 It relates the fatigue life Nf to the amplitude of the applied inelastic strain Δɛp. The index β is commonly observed to be close to 2 in pure metal materials, irrespective of their microstructure. This phenomenon holds true particularly when the plastic strain amplitude is significant, and the law is applicable in defining the low cycle fatigue state (LCF).10 There is a relationship between fatigue life (Nf) and nonlinear strain amplitude (Δɛp) during low cycle thermal cycling, regardless of residence time,
Nf=CΔεpβ.
(3)

In the formula, Nf represents the fatigue life, C and β are a constant number of samples, and Δɛp is the amplitude of inelastic strain.

Above, we introduced a method for predicting thermal fatigue life—the Coffin Manson empirical equation based on the strain range. However, this equation has limitations because it solely considers the influence of strain amplitude on thermal fatigue life and neglects the impact of temperature. To address this limitation and enhance the accuracy of life predictions, Engel Maier’s Coffin Manson correction equation (also known as the Engel Maier correction equation) has emerged as a more precise derivative equation. This correction equation is given by
Nf=12Δγ2εf1c.
(4)
Among them, Δγ represents the equivalent plastic shear strain range Δγ=3Δε, and εf represents the fatigue toughness coefficient (typically taken as 0.325). C represents the fatigue toughness index, and it can be determined by the following formula:
C=0.4426×104Tm+1.74×102ln(l + f).
(5)

In the formula, Tm represents the arithmetic mean of high and low temperatures, and f is the number of loading times per unit time. The Engel Maier correction formula not only reduces the number of model parameters but also simplifies its structure. By incorporating temperature-influencing factors, the results obtained through this formula tend to be relatively accurate. Consequently, it finds widespread application in calculating the thermal fatigue life of solder joints.

By comparing and calculating the strain ranges of various nodes in the center of the solder joint using the ANSYS program, the node with the maximum strain range can be obtained. The equivalent plastic strain range of this node is 0.0082, and the plastic shear strain range is calculated to be 1.42 × 10−2. The average temperature of the temperature cycle loading load Tm = (150 − 50)/2 = 50 °C, with each thermal cycle of 36 min. The temperature cycle frequency f = 1.67 cyc/h can be calculated, substituting into formula (5) can calculate C = −0.455, and substituting the above data into formula (4) can calculate Nf = 2166 weeks.

  1. This work focuses on investigating the failure mode and mechanism of Cu/nano Ag/Cu solder joint structures subjected to hot pressing bonding conditions at 300 °C with insulation for 10 s. Specifically, it delves into understanding the behavior of copper pillar solder joints during temperature cycling experiments. The obtained life test results indicate a thermal cycling fatigue life of 2050 cycles for the nanosilver solder joints.

  2. The simulation results, derived from modeling the nanosilver solder using Anand’s unified viscoplastic constitutive model, offer valuable insights into the chip interconnection of nanosolder. Throughout the finite element simulation of thermal cycling loading, there is a gradual accumulation of stress and strain within the solder joint. The continuous increase in plastic deformation eventually culminates in the final failure of the solder joint.

  3. By employing the C-M correction formula and finite element method, we have calculated the thermal fatigue life of the solder joint to be 2166 cycles under specific conditions: a solder joint diameter of 0.1 mm and a height of 0.02 mm. The correlation between these parameters and the thermal fatigue life is evident from our analysis. Notably, the finite element simulation results align closely with the experimental data. This agreement serves as compelling evidence, affirming the accuracy of our fatigue model.

The authors have no conflicts to disclose.

Hui Yang: Writing – original draft (equal). Shuai Cheng: Writing – review & editing (equal).

The data that support the findings of this study are available from the corresponding author upon reasonable request.

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