DLTS analysis of interface and near-interface bulk defects induced by TCO-plasma deposition in carrier-selective contact solar cells

Silicon (Si) carrier-selective contact (CSC) solar cells are on the front of achieving conversion efficiencies that approach theoretical limits. These cells adopt metal–insulator–semiconductor (MIS)-like structures for electrical contact instead of traditional metal–semiconductor junctions.^1–5 A thin insulating layer, comprising materials such as SiO₂ or amorphous Si (a-Si), inhibits the minority carrier recombination at the Si/insulator interface. This increases both photo-induced current and open-circuit voltage. While traditional solar cells use a pn-junction for carrier separation, CSC solar cells utilize carrier-selective heterojunctions to separate electrons and holes, which are generated by light absorption. The carriers move from the Si crystal through the insulating layer to the electrode. Different types of materials work as electron and hole contacts and are designed to transport only electrons or holes from Si to the contact material. These junctions block either electrons or holes and conduct the other. Various materials, such as doped a-Si and transition metal oxides (TMOs), are candidates for electron and hole contacts.^3,6–11 However, these materials often have high resistivity, which increases the series resistance and consequently decreases both the fill factor (FF) and the conversion efficiency. To mitigate these issues, transparent conductive oxides (TCOs), such as indium tin oxide (ITO), are deposited on the CSC contact materials, followed by the formation of metal electrodes.

The silicon heterojunction (SHJ) solar cell, configured as TCO/nano-crystal-SiO_x(n)/a-Si:H(i)/n-c-Si/a-Si:H(i)/a-Si:H(p)/TCO, is a type of CSC solar cell that has achieved impressive conversion efficiencies up to 26.81%.¹² Despite these advancements, certain fabrication techniques, such as reactive plasma deposition (RPD), introduce defects that act as carrier recombination centers, thereby deteriorating solar cell performance.^7,13 RPD is frequently used to deposit TCO layers because it is a relatively low-damage process.^14,15 However, it generates defects near the Si/insulator interface region.^16–18 To mitigate this issue, a deeper understanding of the formation mechanisms, structural attributes, and electrical properties of these defects induced by the process is strongly required. Deep level transient spectroscopy (DLTS) has been used for evaluating the electrical properties of defects.¹⁹ However, the RPD process induces the defects at both the insulator/semiconductor interface and in the bulk material near the interface.^20,21 In addition, they cannot be evaluated by the conventional DLTS methods. Therefore, a new technology to study them simultaneously should be realized.

In this study, we propose an advanced DLTS method designed to determine the electrical properties of defects at the interface and in the crystal near the interface of the MOS structure. By controlling the surface potential during the DLTS measurement, three-dimensional DLTS (3D-DLTS) spectra are obtained, which illustrate the relationship between DLTS signal intensity, temperature, and surface potential. By analyzing these spectra, at the interface, the defect density and capture cross section as a function of energy level are obtained. In the crystal near the interface, the energy levels, capture cross sections, and defect concentrations are obtained as a function of the distance from the interface. This proposed method is applied to evaluate the characteristics of the SiO₂/Si interface and the bulk defects induced by RPD. The obtained 3D-DLTS spectra are analyzed using machine learning with Bayesian optimization, and the following results are obtained. Three types of electron traps are induced by the process, which exist at ∼100 nm from the interface. The energy levels and capture cross sections suggest that the oxygen related defects are one of the candidates to decrease the minority carrier lifetime. At the interface, this energy-level dependent variation in capture cross sections indicates to the formation of P_L centers, that is, a dangling bond of Si bonded to oxygen, at the SiO₂/Si interface during the process.

The proposed DLTS analysis method is described in this section as follows: In order to analyze the defects induced in the CSC solar cells, a metal–oxide–semiconductor (MOS) structure sample was used. Here, it is assumed that defects with continuous energy levels at the interface and discrete defect levels in the bulk exist in the MOS structure. When the pulse voltage V_p is applied to the electrode of the MOS structure in this state, a depletion layer is formed near the interface in the Si crystal and a surface potential ψ(V_p) is introduced into the Si crystal near the interface, as shown in Fig. 1(a). In the depletion region, the conduction band minimum E_c(x), the valence band maximum E_v(x), and bulk defect level E_t(x) are expressed as a function of spatial depth from interface x, while Fermi level E_F is spatially constant under the steady-state condition. At the interface, the defects with energy levels equal to E_F are defined as the maximum interface defect level E_tVp and the interface defects deeper than E_tVp are filled with electrons. In contrast, within the depletion region in the Si crystal, the bulk defects with E_t(x) above E_F emit the captured electrons, while the bulk defects are occupied by electrons that are farther than x_vp.

Subsequently, reverse voltage V_r is applied, and the surface potential is increased to ψ(V_r). At the interface, the energy level of interfacial defects with an energy level equal to E_F deepens to E_tVr. The defects with energy levels deeper than E_tVr retain the captured electrons. Conversely, electrons trapped in the E_tVp to E_tVr range, which are shallower than E_F, are thermally released into the conduction band after V_r is applied [Fig. 1(b)]. In semiconductors, the Fermi level is crossed with E_t(x) and the intersection shifts from x_vp to x_vr, causing electrons to be emitted from bulk defects in that range. During DLTS measurements, this electron emission, occurring as the voltage switches from V_p to V_r, is detected as a capacitance transient in the MOS structure. The schematic image of the obtained capacitance transient is shown in Fig. 2. These transient curves can be expressed as exponential functions of time t, as shown in Fig. 2. The intensity of the capacitance transient changes depending on both V_p and V_r.

When the difference between ψ(V_p) and ψ(V_r) is fixed at a small value, DLTS signals of defects located at the interface energies of E_tVp and E_tVr are obtained. Then, by analyzing these DLTS signals, the interface defect density D_it(E_tVp ≤ E_t ≤ E_tVr) and σ(E_tVp ≤ E_t ≤ E_tVr) of the defects distributed in that energy region can be obtained as a function of the defect energy level E_t. These values are then averaged in the range of E_tVp to E_tVr. On the other hand, for defects in the crystal, bulk defect density N_t, σ, and E_t of defects located between x_vp and x_vr can be obtained. If the difference between V_p and V_r is fixed and V_r is varied, D_it(E_t) and σ(E_t) are obtained at the interface with an error of approximately E_tVr – E_tVp. Similarly, in the bulk, density N_t(E_t, x) and capture cross section σ(E_t, x) of defects distributed between the spatial regions x_vp to x_vr are obtained with an error of approximately x_vr – x_vp.

When defects have similar energy levels and capture cross sections, their DLTS spectra overlap, complicating the extraction of peak temperatures specific to each defect. Therefore, Bayesian optimization is adopted to perform 3D-DLTS analysis. The distinct properties of each defect are extracted.

Al/SiO₂/Si/Al structured MIS diodes were fabricated for capacitance–voltage (C–V) and DLTS measurements, as illustrated in Fig. 3. The substrates were n-type Czochralski (Cz)-Si (100) wafers, doped with phosphorus (P). To create the Al/(ITO)/SiO₂/Si/Al structure, the following steps were undertaken. First, the substrate surfaces were cleaned using a mixture of H₂O, H₂O₂, and NH₃ at a 5:1:1 ratio and subsequently treated with HF solution to eliminate the native oxide film. The unpolished side of the Si wafer was thermally doped with a high concentration of P to achieve a sheet resistivity of 60 Ω/sq, which realizes the Ohmic contacts at the back of the DLTS samples. These wafers were then dry oxidized at 950 °C in an O₂ atmosphere, resulting in a 10 nm-thick SiO₂ layer. This value was verified by ellipsometry.

To deposit ITO films, an RPD process was employed. Argon (Ar) plasma was generated using a plasma gun with a controlled Ar flow rate of 20 SCCM. This plasma was discharged into the growth chamber and steered by a magnetic field toward an ITO target containing 5 wt. % Sn doping. ITO evaporation occurred, coating the oxidized wafer with an ITO film. The O₂ gas supply to the chamber was maintained at 85 SCCM, with a regulated growth pressure of 0.3 Pa. The substrate temperature was ∼80 °C, not intentionally controlled, and was plasma-heated. The grown ITO film had a thickness of 90 nm. For subsequent C–V measurements, the ITO layer on the front side of the fabricated structure was etched away using an HCl solution. For back-side metallization, the SiO₂ layer on the rear was removed using an HF solution. Finally, aluminum contacts were thermally evaporated onto both sides.

The temperature-dependent behavior of E_c(∞) – E_F was determined using a 1/C² plot. To derive ψ(V_p) and ψ(V_r) as functions of both applied voltage and temperature, the measurement temperature was varied and the C–V measurements were used to estimate the flat-band voltage shift in the MOS structure.

To determine V_p, V_r was derived from the MOS C–V characteristics at various temperatures. The relationship between capacitance and voltage as a function of temperature is shown in Fig. 4. The dashed line represents the flat-band voltage at each temperature, which shows a negative shift with increasing temperature. This shift suggests that the charge states of either the oxide layer or the interface are temperature-sensitive, making the flat-band voltage a temperature-dependent parameter.

Using the C–V curve, the energy gap between the conduction band minimum and Fermi level E_c(0) – E_F(V, T) was estimated as a function of voltage at each temperature using Eq. (11), as shown in Fig. 5. As the temperature increases, E_c(0) – E_F(V, T) becomes shallower, causing the DLTS detection region to also become shallower. On the other hand, V_r and V_p were determined in each temperature scan to maintain a constant energy detection width E_tVr – E_tVp fixed at 50 meV at the interface.

The 3D-DLTS spectrum was obtained as a function of temperature T, the Fermi level at the interface under applied V_r E_c(0) – E_tVr, and DLTS signals, as shown in Fig. 6. Here, DLTS signals were calculated from the transients by using the sine weighting function. This type of DLTS signal is called b1.²² In this case, t_w was set at 1 s, and E_c(0) – E_tVr was determined as an energy resolution of 50 meV. The spectrum is organized along three axes: temperature T, E_c(0) – E_tVr, and the DLTS signal. The temperature axis corresponds to the energy level and capture cross section. In the case of interface defects, the E_c(0) – E_tVr axis represents the energy distribution, while it corresponds to the spatial distribution for the bulk defect spectrum. While almost no signal was detected in the sample without RPD, a high intensity DLTS signal, as shown in Fig. 6, was obtained from the sample that has been through the RPD process. Therefore, this spectrum is obtained from the defects induced by RPD.

The 3D-DLTS spectrum was converted to a contour map, as shown in Fig. 7. This contour map was generated by complementing the measured data every 50 meV. The white dashed line refers to the theoretical spectrum peak position of an interface defect as a function of E_c(0) – E_tVr and T. Here, we assumed that the capture cross section is 1 × 10⁻¹⁵ cm². The theoretical peak position shows a linear increase with increasing temperature. Experimentally, the signal peak is shifted toward higher temperatures in the range of E_c(0) – E_tVr from 0.3 to 0.5 eV. This behavior is well explained by the theoretical line. Therefore, the spectrum in this region corresponds to the interface defects. On the other hand, the experimental peak did not shift above E_c(0) – E_tVr = 0.6 eV, as shown by the black dashed line in Fig. 7. This feature cannot be explained by the theoretical line of the interface defects. The peak temperature in this region is lower than the estimated theoretical line. According to the discussion in chapter 2, it can be concluded that the spectrum in this energy range mainly originated from the bulk defects.²⁴ 

The cross-sectional spectrum at E_c(0) – E_tVr = 0.6 eV is shown in Fig. 8. This corresponds to the bulk defects. The obtained signal cannot be explained by a single discrete bulk defect. This indicates that the spectrum comprises several types of signals originating from different defects. Spectrum analysis using Bayesian inference concluded that this DLTS spectrum is composed of at least three signals obtained from three types of defects (E1, E2, and E3) in the bulk. The estimated energy levels and capture cross sections of these defects are listed in Table I.

The energy levels of E1, E2, and E3 range from 0.55 to 0.45 eV. According to prior studies, the potential candidates of defects with such energy levels include metal impurities such as gold (Au) and zinc (Zn), oxygen vacancies, oxygen-vacancy complexes, and dangling bonds such as P_b centers.^22,23 Although the Si crystal contains a few metal impurities, it has a relatively high concentration of oxygen due to its growth via the Cz method. Therefore, oxygen-related defects such as oxygen-related complexes (E_c – 0.55 eV) are considered to be formed by RPD.²⁵ 

The defect levels of E1, E2, and E3 are shown in Fig. 9 as a function of E_c(0) – E_tVr, which corresponds to the distance from the interface. As shown in Fig. 9, E1, E2, and E3 persist even when E_c(0) – E_tVr is increased. This feature shows that these defects are generated in the Si crystal near the SiO₂/Si interface and that these electrical properties are almost the same, independent of the position where these defects exist. The spatial distribution of these defect concentrations was obtained, where x denotes the distance from the interface, as determined by the detected defect levels using Eq. (8). This further suggests that these defects are distributed throughout the Si crystal, consistent with the contour map’s implications. The estimated distribution depths for these defects fall within the range of ∼70 nm, as shown in Fig. 10. The depth distribution of all these defects is fairly uniform, pointing to a shared formation mechanism. The previous results suggested that ultraviolet (UV) light induces defects during the RPD process.²⁶ The estimated depth is almost the same as the penetration depth of UV light into Si, supporting the idea that the short-wavelength light during the process may generate the bulk defects.

The cross-sectional spectrum derived from the 3D-DLTS at E_c(0) − E_tVr = 0.45 eV measurements is shown in Fig. 11. As shown in Fig. 7, this spectrum specifically relates to defects at the SiO₂/Si interface. Bayesian optimization was employed to estimate these interfacial defect properties as well. These spectra were explained by multiple spectra that originated from different defect characteristics, as shown by the dashed line in Fig. 11. Consequently, the density of interface defects D_it(E_t) and capture cross section σ_n(E_t) were estimated as a function of the energy level from the analysis using Bayesian optimization. The estimated D_it(E_t) and σ_n(E_t) are summarized in Fig. 12. The spectra feature multiple broad peaks, indicating a complex composition that includes bulk defects. Due to this complexity, we estimated errors in the characteristics from variations in their corresponding values. The resultant interface defects have energy levels ranging from E_c(0) − E_tVr = 0.35 eV to E_c(0) − E_tVr = 0.45 eV, with a density of ∼10¹¹ cm⁻²/eV and capture cross sections between 10⁻¹⁷ and 10⁻¹⁵ cm². The capture cross sections share the same dependence on the energy level as the P_L centers.²⁷ Therefore, these results suggest that oxygen atoms are involved in the formation of both interface defects and bulk defects. These findings will help clarify the degradation mechanisms at and near the heterojunction interface in the RPD process and will contribute to optimizing the RPD process to fabricate heterojunction devices with lower damage.

An advance DLTS method was proposed, which can evaluate the properties of defects at the interface of the MOS structure and in the bulk near the interface simultaneously. These defects were generated through the RPD method, which is commonly used for depositing TCO in the fabrication of CSC-type solar cells. The surface potential in the near-surface Si region was manipulated by applying voltage, allowing us to obtain DLTS signals as functions of temperature and the energy difference between the conduction band minimum and the Fermi energy. Machine learning techniques were employed to analyze the 3D-DLTS spectra, enabling us to quantify the capture cross sections, energy levels, densities, and depth profiles of the defects induced by the process. For bulk defects, we identified three types of electron traps spanning from the interface to ∼70 nm in depth. The electrical properties of these bulk defects suggest that they likely comprise oxygen complex defects, specifically an oxygen divacancy complex formed during the RPD process. Meanwhile, D_it(E_t) and σ_n(E_t) correlate with P_L centers, exhibiting an increase as E_t decreases from ∼10⁻¹⁷ to 10⁻¹⁵ cm².

This work was financially supported by the Research Center for Smart Energy Technology under the Ministry of Education, Culture, Sports, Science, and Technology (MEXT) and partially supported by the New Energy and Industrial Technology Development Organization (NEDO), Japan.

The authors have no conflicts to disclose.

Tomohiko Hara: Conceptualization (equal); Data curation (equal); Formal analysis (equal); Investigation (equal); Methodology (equal); Project administration (equal); Software (equal); Writing – original draft (equal). Yoshio Ohshita: Conceptualization (equal); Writing – original draft (equal); Writing – review & editing (equal).

The data that support the findings of this study are available from the corresponding author upon reasonable request.