Spin—Based voltage comparator using spin-hall effect driven nanomagnets Open Access

In order to keep the number of transistors per chip consistent with Moore’s law, the electronics community relies excessively on scaling the dimensions of the existing CMOS transistor to decrease the area occupied per circuit. However as we reach the 7nm technology node, further scaling of the existing structures is challenged by problems of fabrication and short channel effects. To overcome these challenges there has been an extensive search for reliable beyond-CMOS technologies such as spintronics.

In this paper, we propose a model implementation of a compact spin-based voltage comparator using a hybrid spin-CMOS approach. The circuit is based on the spin hall effect (SHE) property of tungsten (β-W).¹ The spin-based comparator design in this paper is attractive mainly in terms of ease of implementation and its ability to provide a competent resolution to its CMOS counterparts due to the low switching currents observed in the thermal activation regime.² 

The remainder of this paper is organized as follows. Section II describes the various modules used to develop the 3T-MTJ model of the comparator. In section III, we discuss the working mechanism of the model along with benchmarking it against existing experimental results in the literature. Section IV discusses the MTJ integration with CMOS transistors to build the comparator and its working mechanism. Section V presents the results of the comparator operation and its delay performance. Section VI discusses the directions for future work and finally, the paper is concluded in section VII.

In this section, we describe spin-transport modules used to construct the 3T-MTJ device model.

The dynamics of the magnetization reversal of the free layer of the MTJ is described as a function of the torque applied to the ferromagnet (FM) using the LLGS equation given by Eq. (1). This torque includes the effects due to an effective magnetic field (H_eff) and the spin-transfer torque.

Here α is the gilbert damping constant, γ is the gyromagnetic ratio, µ₀ is the permeability of free space. The effective field (H_eff) contributes the effect due to the uniaxial anisotropy field (H_k), the demagnetization field (H_D), the external field (H_ext) and the thermal field (H_th). $τ→DL$ and $τ→FL$ correspond to the damping-like and field-like torque respectively. The thermal fluctuations in the FM are included using a randomly fluctuating field (H_th) whose spatial magnitudes follow a Gaussian distribution of zero mean and standard deviation $2KBTαγVμ02MsΔt$ as in.² Here K_B is the Boltzmann constant, T is the temperature, V is the volume of the FM, Ms is the saturation magnetization and Δt is the time step of the simulation. The differential equation was implemented using a network of capacitors and current sources with spatial components of H_eff represented as voltage sources as in.³ 

We modeled SHE generated spin-polarized current using a spin circuit model⁴ based on the spin diffusion across a bilayer system. For a charge current I_c, the spin injection efficiency (χ) of heavy metal (HM) is given by equation (2).

Here θ_SHE is the spin hall angle, T_HM is the thickness, σ_g is the conductivity and λ_sf is the spin-flip length of the HM layer. G_L is the conductivity of the FM layer which acts as a spin-load. β is called the gain factor of the spin injection. W_FM, L_FM correspond to the dimensions of the FM and W_HM, L_HM correspond to the dimensions of the HM layer. β can be dimensionally optimized by decreasing the area of the HM layer within the fabrication limits.

The interaction between the HM non-magnetized layer and the FM free layer of an MTJ can be modeled using the conduction matrix.⁵ 

here $Geff↑↓$ and $Gint$ correspond to the effective spin mixing conductance and interface conductivity of the bilayer system (HM/FM) and P is the polarization of the FM. $R(m^)$ is the rotation matrix corresponding to the spatial orientation of the FM free layer of the MTJ.

The MTJ has been modeled using a variable conductor whose conductance (G_MTJ) is related to the angle (φ) between the reference layer (RL) and the free layer (FL) and is given by

where $G0=(GP+GAP)/2$⁠. Here G_P and G_AP represent the MTJ conductance in the parallel and anti-parallel configuration. P₁ and P₂ represent the polarization factors of the FL and RL. The values of P₁ and P₂ are related to the tunnel magnetoresistance (TMR) of the MTJ by Julliere’s formula given by

In this work, we assume P₁ and P₂ are equal to each other and independent of the voltage bias across the MTJ.

In this section, we describe the working mechanism of the 3T-MTJ model along with validating it against experimental results^1,7 consisting of β-Ta and β-W HM layers. The charge current is applied between the terminals T1 and T2 (as shown in Fig. 1.) and the generated spin current (I_s) is injected in the NM/FM interface which is coupled with the LLGS module as in.^3,6 The status of the magnetic orientation is updated every time step in the NM/FM interface and the MTJ module. The TMR of the device is measured using a suitable reading voltage (V_read) and reading resistance (R _read) connected at T₃.

The benchmarking results plotted in Fig. 2, show that our model is in good accordance with the symmetric switching currents obtained in experimental demonstrations.^1,7 However, the model does not capture the roll-off in the TMR due to mechanisms beyond its scope, like voltage-dependent polarization factors and the possible multi-domain features of the nanomagnets in the experimental studies.

In this section, our purpose is to show how the constructed 3T-MTJ model can be used as a comparator using a hybrid spin-CMOS approach. The operation of the comparator is divided into three phases: the comparison phase, the read phase, and the reset phase. As seen in Fig. 3, the terminals are connected to clock-controlled CMOS switches (CLK and CLK_READ) which separate the phases of operation. The FL and the RL of the MTJ are initially in the parallel configuration. The comparison phase starts when the clock goes low. In this phase, the voltage sources to be compared (V_in1 and V_in2) are connected to terminals T₁ and T₂, respectively, and generate a charge current proportional to the voltage difference (V₁ – V₂) in the HM layer. Depending on the magnitude of charge current the MTJ either switches to the anti-parallel configuration or remains in its initial parallel orientation. In the read phase, the terminals T₁ is grounded to read the resistance of the MTJ via terminal T₃. This is followed by the reset phase where the reset pulse (V_reset) is sent through T₂ to reset the MTJ to a parallel configuration. The terminal T₃ of the 3T-MTJ is connected to a pair of inverters to obtain a rail to rail output. The magnetic orientation of the FL changes only when the generated charge current due to the voltage sources exceeds the required critical switching current (I_cr). I_cr is lower than the zero thermal switching current (I_c0) given by Eq. (3) due to the thermal effects which may result in a hypothetical lowering of the energy barrier of the FM.⁸ Here e is the electron charge, $ℏ$ is the reduced Planckʾs constant and t_FM is the FM layer thickness.

To increase the resolution of the comparator, we increase the spin injection efficiency of the 3T-MTJ by modifying the gain factor (β) of SHE by decreasing the dimensions of the HM layer and choosing an HM layer with high θ _SHE and low resistivity(β-W¹). In addition, reducing the length of the HM layer decreases its resistance thereby decreasing the required writing voltage for switching. Fig 4 shows the spin injection efficiency for the MTJ stack in¹ with the varying dimensions of the HM layer.

As shown in Fig. 5 we obtain I_cr≈98µA for the optimized 3T-MTJ device which corresponds to a comparator resolution of 50mV.

In this section, we demonstrate the comparator operation along with analyzing the delay performance of the optimized 3T-MTJ and the comparator. Fig. 6(a) shows the output of the comparator with the clock-signals (inset 6(a)). Fig. 6(b) shows the magnetization dynamics of the free layer during the operation. We compare the mean switching delay of the optimized 3T-MTJ in the low, intermediate and high current regimes with analytical boundary conditions for an FM with IMA.⁹ We found that as we approach the zero thermal fluctuation current the switching time matches the behavior predicted by the intermediate model that follows after the low-current regime when the energy barrier reduction (Eq. 2.) of the classic Neel-Brown model¹⁰ is no longer valid. Fig. 7 (a) shows the mean switching delay of the 3-T MTJ mathematically fitted with the parameters mentioned as per.⁹ The inverters at the output introduce an additional delay of approximately 400ps.

The mono-domain FM based simple approach discussed in this paper can be extended to develop comparators with complex spintronics phenomena like domain–wall motion using electrical currents.¹¹ In addition, ADCs designed using the mentioned comparator methodology can provide better control on each bit of operation due to the integration of separable comparator units in comparison to a voltage-controlled magnetic anisotropy based method.¹² Using a recently studied spin funneling mechanism can further help in improving the resolution and the switching delay of the comparator by increasing the spin injection up to ten times.¹³ 

We propose a novel spin-based voltage comparator implemented with standard spintronic elements. We started with a comprehensive validation of the 3T-MTJ model by benchmarking it against two established experimental results. We then dimensionally optimized the model to demonstrate a comparator with a resolution of 50mV. We also believe that our 3T- MTJ model can serve as a toolbox for new SOT based device and circuit applications using a hybrid spin-CMOS approach as demonstrated in this paper.

See the available supplementary material for the parameters used to conduct the simulations described in the paper.