Although the rapid scaling of integrated circuit (IC) technology is a widely recognized phenomena, Hutchinson recently proclaimed that the semiconductor industry has entered the world of nanoelectronics. For the next fifteen years, the industry will be extending CMOS technology through new materials and device structures. The new transistor designs that enable this scaling will be referred to as non‐classical CMOS. The gate length of nanotransistors will shrink to less than 10 run over the next fifteen years. The electrical properties of nano‐transistors have moved into regime of short channel devices and will continue to migrate away from the well‐understood physics of long channel transistors. The number of transistors in a single IC is already approaching a number that results 2 billion functions per IC by 2010. The astoundingly small size and high density will challenge metrology and characterization and most certainly move measurement further into the world of nanotechnology.
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9 September 2005
CHARACTERIZATION AND METROLOGY FOR ULSI TECHNOLOGY 2005
15-18 March 2005
Richardson, Texas (USA)
Research Article|
September 09 2005
Metrology (including Materials Characterization) for Nanoelectronics
Alain C. Diebold
Alain C. Diebold
SEMATECH, Austin, TX 78741
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AIP Conf. Proc. 788, 21–32 (2005)
Citation
Alain C. Diebold; Metrology (including Materials Characterization) for Nanoelectronics. AIP Conf. Proc. 9 September 2005; 788 (1): 21–32. https://doi.org/10.1063/1.2062935
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