This paper presents our study on the effect of thermal treatment to bulk silicon properties using careful surface chemical treatments and passivation. The procedures used for estimating carrier lifetime in silicon include transient photoconductance decay (TPD), photoluminescence (PL) intensity and PL decay time imaging. To exclude any effect of graphite succeptor contamination on the measurements, 10 µm-thick silicon layer was removed from each side of the wafers by etching (texturing) in KOH+IPA solution. All the samples had been cleaned with SC-1 and SC-2 carefully and were passivated by deposition of a-Si:H thin layer. According to the results obtained, rapid thermal annealing within the temperature range of 380-700 °C has led to decrease in minority carrier lifetime. The difference in the rate of carrier lifetime degradation with annealing temperature for p- and n-type Si wafers was found. In both cases short-term heating of silicon up to a temperature of 700 °C led to significant lifetime degradation.

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