Electromigration mechanism in dual‐damascene Cu interconnects was studied using conventional package level accelerated tests and in‐situ SEM characterization technique. Improvement in electromigration performance was observed for upper as well as lower layer via‐fed structures when the Cu/dielectric cap interface was modified by various Cu surface treatments after chemical mechanical polishing. Electromigration mechanism consisting void movement along the Cu/dielectric cap interface and agglomeration at the cathode via was revealed during in‐situ electromigration characterization. This mechanism is different from the current understanding of electromigration. Mechanisms of void trapping at grain boundaries and the radius dependence of void velocity were experimentally observed. Analytical models to elucidate these observations have been proposed.

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