Major issues faced by the Tunneling Field-Effect Transistor (TFET) are lower on-current, higher subthreshold swing, and the nature of ambipolarity. Here, we have engineered a single junction-based p-n TFET that can mitigate all the challenges addressed along with the ease of fabrication. The maximum on-current of 79.70 µA/μm, and a subthreshold swing of 32.88 mV/decade were achieved for a gate-length of 120 nm which is well suited for low power applications. The effect of each geometrical parameter was studied keeping higher on current as of the main key parameter. All the electrical parameters of the proposed architecture are found to be comparable with the conventional p-i-n based TFET. The proposed device has been designed using the Sentaurus TCAD tool.
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31 May 2023
EMERGING TECHNOLOGIES; MICRO TO NANO: Proceedings of ETMN-2021
8–9 October 2021
Jaipur, India
Research Article|
May 31 2023
PN-junction based nano transistors for low power applications Available to Purchase
S. Shukla;
S. Shukla
1
Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science Pilani
, Rajasthan- 333031(India
)
Search for other works by this author on:
P. Arora
P. Arora
a)
1
Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science Pilani
, Rajasthan- 333031(India
)a)Corresponding author: [email protected]
Search for other works by this author on:
S. Shukla
1
P. Arora
1,a)
1
Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science Pilani
, Rajasthan- 333031(India
)
a)Corresponding author: [email protected]
AIP Conf. Proc. 2752, 060002 (2023)
Citation
S. Shukla, P. Arora; PN-junction based nano transistors for low power applications. AIP Conf. Proc. 31 May 2023; 2752 (1): 060002. https://doi.org/10.1063/5.0135940
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