Printed circuit board (PCB) owns the most significant development in circuit packaging. It provides electrical connectivity for various electronic components, fixed in position surface-mounted by soldering. During high temperature reflow soldering process, there is a possibility of having mismatch of coefficients of thermal expansion (CTE) where PCB materials experience expansion in different dimensions. CTE mismatch leads to deformation of the board and package side. Solder balls experience cyclical stress from the warp, causing cracks in solders hence disjoint. In this study, the thermal induced warpage in multi-layer SSD PCB arrays are measured using Shadow Moiré method. During experiment, bottom part of the board may experience more heating than the top part of the board, which results in temperature difference between the top and bottom sides of PCB, ΔT. ΔT was controlled in Shadow Moiré by changing the heating powers (30%, 80%, and 100%) and by using different heating profiles. Finite element analysis (FEA) are carried out to determine the warpage of the PCB arrays. Simulation results are compared to the Shadow Moiré measurements.
Effect of heating profile on printed circuit boards using Shadow Moiré and simulations
Sim Jui Oon, Khai Shiang Tan, Teck Yong Tou, Seong Shan Yap, Chun Sean Lau, Yoong Tatt Chin; Effect of heating profile on printed circuit boards using Shadow Moiré and simulations. AIP Conf. Proc. 5 February 2021; 2319 (1): 070007. https://doi.org/10.1063/5.0036981
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