This paper presents a procedure for the implementation of control algorithms for hardware-bit compatible with the standard IEC61131-3. The described transformation based on the sets of calculus and graphs, allows translation of the original form of the control program to the form in full compliance with the original, giving the architecture represented by two tick. The proposed method enables the efficient implementation of the control bits in the FPGA with the use of a standardized programming language LD.
REFERENCES
1.
M.
Chmiel
and E.
Hrynkiewicz
, The dynamic properties investigation of the PLC CPU implemented in FPGA, Programmable Devices and Embedded Systems, PDES’12
, May 23-25, Czech Republic
, 2012
, pp. 151
–156
2.
M.
Chmiel
, On reducinq PLC response time
, Bulletin Polish Academy of Sciences
, Vol. 5
, (3
), 2006
, pp. 229
–238
3.
R.
Cupek
, A.
Ziębiński
and M.
Franek
, FPGA based OPC UA embedded industrial data server implementation
, Journal of Circuits, Systems and Computers
, vol. 22
, (8
), 2013
, pp. 1
–18
4.
P.
Czekalski
, K.
Tokarz
and B.
Pochopień
, A Modern Approach to the Asynchronous Sequential Circuit Synthesis
, Theoretical and Applied Informatics
, Vol. 26
, No. 1-2
, 2014
, pp. 25
–37
5.
M.
Kobylecki
and D.
Kania
, Dwutaktowa realizacja sterowania bitowego
, Przegląd Elektrotechniczny
, Vol. 90
, No 9
, 2014
, pp. 240
–245
6.
A.
Milik
and A.
Pułka
, Automatic implementation of arithmetic operation in reconfigurable logic controllers
, Proceedings of ECCTD 2011 Conference
, Linköping, Sweden
, Aug. 27-30
, 2011
, pp. 721
–724
7.
A.
Milik
and A.
Pułka
, On FPGA dedicated SFC synthesis and implementation according to IEC61131
, Proceedings of IEEE International Conference on Signals and Electronic Systems, ICSES 2014
, Poznań, Poland
Sept.11-13, 2014
8.
J.
Mocha
and D.
Kania
, Sprzętowa realizacja programu sterowania w strukturach FPGA
, Przegląd Elektrotechniczny
, Vol. 88
, No 12a
, 2012
, pp. 95
–100
9.
R.
Wisniewski
, A.
Barkalov
, L.
Titarenko
and W.
Halang
, Design of microprogrammed controllers to be implemented in FPGAs
, International Journal of Applied Mathematics and Computer Science
, Vol. 21
, No. 2
, 2011
, pp. 401
–412
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