Monte Carlo - MC methods, requiring heavy computations of large data volume, can be used to predict the amplitude distribution and variance of outputted electron charge in Micro Channel Plates - MCPs, which are fed with primary emitted electrons in their inputs. The concept of parallel and serial combination of separate stages of such stochastic processes, which can be applied in MCP systems and simulated using MC computations, has recently proposed and shown interesting theorems and results. Separating the electron multiplication procedures, occurring in the channels of MCP systems, into sub-procedures, which are similar in nature and occur either in parallel or in consecutive manners, is equivalent to splitting the relevant stochastic system calculations into smaller ones, which can be performed concurrently and/or sequentially. In this way, calculations similar in nature, can be executed only once, thus, eliminating a great percentage of heavy computations. However, when designing and implementing the calculation inferences of the derived theorems using High Performance Computation - HPC techniques, the overall computation cost can further and significantly be reduced. In this paper, the hardware mappings of the relevant theorem inferences onto parallel computing architectures, resulting in circuits of computing blocks for calculation purposes of MCP system stochastic processes, are investigated. Each of the designed and implemented computing circuits corresponds to a theorem inference or to a combination of inferences. The parallelism of the proposed circuits consists of both the concurrent functioning of all the system blocks and of the simultaneous operation of each block, which is processing pieces of data, for many parts of the whole circuit in which it belongs. All the circuits are designed and tested using Altera Quartus II environment and can be implemented as chips, which can be incorporated in computing devices to assist Monte Carlo computations for the estimation of different MCP electron multiplication system performances.
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Research Article| January 22 2015
High performance techniques for micro channel plate computations in photo multipliers
AIP Conf. Proc. 1642, 551–554 (2015)
S. G. Fountoukis; High performance techniques for micro channel plate computations in photo multipliers. AIP Conf. Proc. 22 January 2015; 1642 (1): 551–554. https://doi.org/10.1063/1.4906740
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