TCAD modeling of stress impact on performance and reliability in 3D IC structures Available to Purchase

This paper demonstrates a TCAD based stress modeling approach for analyzing thermal mechanical stress evolution and evaluating stress induced performance and reliability effects in 3D IC structures. A typical 3D IC fabrication and assembly process is examined. It is observed that various TSV and micro-bump process and design parameters need to be optimized in order to minimize the stress impact and fabricate robust 3D structures. TSV copper anisotropy effect is also investigated. Strategies to minimize device performance variation and improve structural reliability are discussed.