Physics-based simulation of EM and SM in TSV-based 3D IC structures

Evolution of stresses in through-silicon-vias (TSVs) and in the TSV landing pad due to the stress migration (SM) and electromigration (EM) phenomena are considered. It is shown that an initial stress distribution existing in a TSV depends on its architecture and copper fill technology. We demonstrate that in the case of proper copper annealing the SM-induced redistribution of atoms results in uniform distributions of the hydrostatic stress and concentration of vacancies along each segment. In this case, applied EM stressing generates atom migration that is characterized by kinetics depending on the preexisting equilibrium concentration of vacancies. Stress-induced voiding in TSV is considered. EM induced voiding in TSV landing pad is analyzed in details.