We describe the development of large format array of superconducting tunnel junction detectors that is readout by SONY GaAs‐JFET cryogenic integrated circuits. High quality SIS photon detectors have high dynamic impedance that can be readout by low gate leakage GaAs‐JFET circuits. Our imaging array design, with niobium SIS photon detectors and GaAs‐JFET cryogenics electronics, uses integrating amplifiers, multiplexers and shift‐registers to readout large number of pixels that is similar to CMOS digital cameras. We have designed and fabricated GaAs‐JFET cryogenic integrated circuits, such as AC‐coupled capacitive trans‐impedance amplifier, multiplexers with sample‐and‐holds and shift‐registers, for 32‐channel readout module. The Advanced Technology Center of National Astronomical Observatory of Japan have started extensive development program for large format array of SIS photon detectors.

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