Development of cryogenic analog amplifiers based on GaAs‐JFET technology for high impedance array sensors

We have been developing a cryogenic ASIC for high impedance terahertz detectors. The ASIC is made up of depletion and enhancement n‐type GaAs‐JFETs produced by SONY, which have excellent performance even at less than 1 K. The ASIC needs high precision and low power preamplifiers. However, the previous design could not satisfy the requirement on the open loop gain. So, we designed and fabricated new 6 and 16‐channel reset integrating amplifiers whose open loop gains are more than 2000. Each preamplifier consists of a common source amplifier, a cascode amplifier with active load and source follower buffers. We measured one of the cascode amplifiers, which is the improved part of the new preamplifier. The test results showed that the gain and the power consumption were 560 and 1.1 μW. Considering the gain of the first stage common source amplifier is ∼10, the open loop gain of the preamplifier will achieve the requirement value.